| Satyajit Desai | 66b6c45 | 2017-06-27 17:10:46 -0700 | [diff] [blame] | 1 | * JTAG-MM |
| 2 | |
| 3 | The jtag-mm entry specifies the memory mapped addresses for the debug and ETM |
| 4 | registers. The jtag-mm driver uses these to save and restore the registers |
| 5 | using memory mapped access during power collapse so as to retain their state |
| 6 | across power collapse. This is necessary in case cp14 access to the registers |
| 7 | is not permitted. |
| 8 | |
| 9 | Required Properties: |
| 10 | compatible: component name used for driver matching, should be: |
| 11 | "qcom,jtag-mm" - for jtag-mm device |
| 12 | "qcom,jtagv8-mm" - for jtagv8-mm device supporting ARMv8 targets |
| 13 | |
| 14 | reg: physical base address and length of the register set |
| 15 | reg-names: should be "etm-base" for etm register set and "debug-base" |
| 16 | for debug register set. |
| 17 | qcom,coresight-jtagmm-cpu: specifies phandle for the cpu associated |
| 18 | with the jtag-mm device |
| 19 | qcom,si-enable : boolean, indicating etm save and restore is |
| 20 | supported via system instructions |
| 21 | qcom,save-restore-disable : boolean, to disable etm save and restore |
| 22 | functionality |
| 23 | |
| 24 | Example: |
| 25 | jtag_mm: jtagmm@fc332000 { |
| 26 | compatible = "qcom,jtag-mm"; |
| 27 | reg = <0xfc332000 0x1000>, |
| 28 | <0xfc333000 0x1000>; |
| 29 | reg-names = "etm-base","debug-base"; |
| 30 | |
| 31 | qcom,coresight-jtagmm-cpu = <&CPU0>; |
| 32 | }; |