Pavan Kumar Chilamkurthi | 5719f21 | 2017-07-20 15:02:21 -0700 | [diff] [blame] | 1 | * Qualcomm Technologies, Inc. MSM Camera FD |
| 2 | |
| 3 | The MSM camera Face Detection device provides dependency definitions |
| 4 | for enabling Camera FD HW. MSM camera FD is implemented in multiple |
| 5 | device nodes. The root FD device node has properties defined to hint |
| 6 | the driver about the FD HW nodes available during the probe sequence. |
| 7 | Each node has multiple properties defined for interrupts, clocks and |
| 8 | regulators. |
| 9 | |
| 10 | ======================= |
| 11 | Required Node Structure |
| 12 | ======================= |
| 13 | FD root interface node takes care of the handling Face Detection high level |
| 14 | driver handling and controls underlying FD hardware present. |
| 15 | |
| 16 | - compatible |
| 17 | Usage: required |
| 18 | Value type: <string> |
| 19 | Definition: Should be "qcom,cam-fd". |
| 20 | |
| 21 | - compat-hw-name |
| 22 | Usage: required |
| 23 | Value type: <string> |
| 24 | Definition: Should be "qcom,fd". |
| 25 | |
| 26 | - num-fd |
| 27 | Usage: required |
| 28 | Value type: <u32> |
| 29 | Definition: Number of supported FD HW blocks. |
| 30 | |
| 31 | Example: |
| 32 | qcom,cam-fd { |
| 33 | compatible = "qcom,cam-fd"; |
| 34 | compat-hw-name = "qcom,fd"; |
| 35 | num-fd = <1>; |
| 36 | }; |
| 37 | |
| 38 | ======================= |
| 39 | Required Node Structure |
| 40 | ======================= |
| 41 | FD Node provides interface for Face Detection hardware driver |
| 42 | about the device register map, interrupt map, clocks, regulators. |
| 43 | |
| 44 | - cell-index |
| 45 | Usage: required |
| 46 | Value type: <u32> |
| 47 | Definition: Node instance number. |
| 48 | |
| 49 | - compatible |
| 50 | Usage: required |
| 51 | Value type: <string> |
| 52 | Definition: Should be "qcom,fd41". |
| 53 | |
| 54 | - reg-names |
| 55 | Usage: optional |
| 56 | Value type: <string> |
| 57 | Definition: Name of the register resources. |
| 58 | |
| 59 | - reg |
| 60 | Usage: optional |
| 61 | Value type: <u32> |
| 62 | Definition: Register values. |
| 63 | |
| 64 | - reg-cam-base |
| 65 | Usage: optional |
| 66 | Value type: <u32> |
| 67 | Definition: Offset of the register space compared to |
| 68 | to Camera base register space. |
| 69 | |
| 70 | - interrupt-names |
| 71 | Usage: optional |
| 72 | Value type: <string> |
| 73 | Definition: Name of the interrupt. |
| 74 | |
| 75 | - interrupts |
| 76 | Usage: optional |
| 77 | Value type: <u32> |
| 78 | Definition: Interrupt line associated with FD HW. |
| 79 | |
| 80 | - regulator-names |
| 81 | Usage: required |
| 82 | Value type: <string> |
| 83 | Definition: Name of the regulator resources for FD HW. |
| 84 | |
| 85 | - camss-vdd-supply |
| 86 | Usage: required |
| 87 | Value type: <phandle> |
| 88 | Definition: Regulator reference corresponding to the names listed |
| 89 | in "regulator-names". |
| 90 | |
| 91 | - clock-names |
| 92 | Usage: required |
| 93 | Value type: <string> |
| 94 | Definition: List of clock names required for FD HW. |
| 95 | |
| 96 | - clocks |
| 97 | Usage: required |
| 98 | Value type: <phandle> |
| 99 | Definition: List of clocks required for FD HW. |
| 100 | |
| 101 | - clock-rates |
| 102 | Usage: required |
| 103 | Value type: <u32> |
| 104 | Definition: List of clocks rates. |
| 105 | |
| 106 | - src-clock-name |
| 107 | Usage: required |
| 108 | Value type: <string> |
| 109 | Definition: Source clock name. |
| 110 | |
| 111 | - clock-cntl-level |
| 112 | Usage: required |
| 113 | Value type: <string> |
| 114 | Definition: List of strings corresponds clock-rates levels. |
| 115 | Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo. |
| 116 | |
| 117 | Examples: |
| 118 | cam_fd: qcom,fd@ac5a000 { |
| 119 | cell-index = <0>; |
| 120 | compatible = "qcom,fd41"; |
| 121 | reg-names = "fd_core", "fd_wrapper"; |
| 122 | reg = <0xac5a000 0x1000>, |
| 123 | <0xac5b000 0x400>; |
| 124 | reg-cam-base = <0x5a000 0x5b000>; |
| 125 | interrupt-names = "fd"; |
| 126 | interrupts = <0 462 0>; |
| 127 | regulator-names = "camss-vdd"; |
| 128 | camss-vdd-supply = <&titan_top_gdsc>; |
| 129 | clock-names = "gcc_ahb_clk", |
| 130 | "gcc_axi_clk", |
| 131 | "soc_ahb_clk", |
| 132 | "cpas_ahb_clk", |
| 133 | "camnoc_axi_clk", |
| 134 | "fd_core_clk_src", |
| 135 | "fd_core_clk", |
| 136 | "fd_core_uar_clk"; |
| 137 | clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>, |
| 138 | <&clock_gcc GCC_CAMERA_AXI_CLK>, |
| 139 | <&clock_camcc CAM_CC_SOC_AHB_CLK>, |
| 140 | <&clock_camcc CAM_CC_CPAS_AHB_CLK>, |
| 141 | <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, |
| 142 | <&clock_camcc CAM_CC_FD_CORE_CLK_SRC>, |
| 143 | <&clock_camcc CAM_CC_FD_CORE_CLK>, |
| 144 | <&clock_camcc CAM_CC_FD_CORE_UAR_CLK>; |
| 145 | src-clock-name = "fd_core_clk_src"; |
| 146 | clock-cntl-level = "svs"; |
| 147 | clock-rates = <0 0 0 0 0 400000000 0 0>; |
| 148 | }; |
| 149 | |