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gerrit-public.fairphone.software / kernel / msm-4.9 / 84a47e8cf6f87952efa16773bb39fe0c4a3cde28 / . / drivers / gpu / drm / msm / sde_dbg.c
blob: 768dfbdc42e855e9c2bf4c251a427d5cdb7994cb [file] [log] [blame]
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]1/* Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
14
15#include <linux/delay.h>
16#include <linux/spinlock.h>
17#include <linux/ktime.h>
18#include <linux/debugfs.h>
19#include <linux/uaccess.h>
20#include <linux/dma-buf.h>
21#include <linux/slab.h>
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]22#include <linux/list_sort.h>
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]23
24#include "sde_dbg.h"
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]25#include "sde/sde_hw_catalog.h"
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]26
27#define SDE_DBG_BASE_MAX 10
28
29#define DEFAULT_PANIC 1
30#define DEFAULT_REGDUMP SDE_DBG_DUMP_IN_MEM
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]31#define DEFAULT_DBGBUS_SDE SDE_DBG_DUMP_IN_MEM
32#define DEFAULT_DBGBUS_VBIFRT SDE_DBG_DUMP_IN_MEM
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]33#define DEFAULT_BASE_REG_CNT 0x100
34#define GROUP_BYTES 4
35#define ROW_BYTES 16
36#define RANGE_NAME_LEN 40
37#define REG_BASE_NAME_LEN 80
38
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]39#define DBGBUS_FLAGS_DSPP BIT(0)
40#define DBGBUS_DSPP_STATUS 0x34C
41
42#define DBGBUS_NAME_SDE "sde"
43#define DBGBUS_NAME_VBIF_RT "vbif_rt"
44
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]45/* offsets from sde top address for the debug buses */
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]46#define DBGBUS_SSPP0 0x188
47#define DBGBUS_SSPP1 0x298
48#define DBGBUS_DSPP 0x348
49#define DBGBUS_PERIPH 0x418
50
51#define TEST_MASK(id, tp) ((id << 4) | (tp << 1) | BIT(0))
52
53/* following offsets are with respect to MDP VBIF base for DBG BUS access */
54#define MMSS_VBIF_CLKON 0x4
55#define MMSS_VBIF_TEST_BUS_OUT_CTRL 0x210
56#define MMSS_VBIF_TEST_BUS_OUT 0x230
57
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]58/* Vbif error info */
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]59#define MMSS_VBIF_PND_ERR 0x190
60#define MMSS_VBIF_SRC_ERR 0x194
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]61#define MMSS_VBIF_XIN_HALT_CTRL1 0x204
62#define MMSS_VBIF_ERR_INFO 0X1a0
63#define MMSS_VBIF_ERR_INFO_1 0x1a4
64#define MMSS_VBIF_CLIENT_NUM 14
65
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]66/* print debug ranges in groups of 4 u32s */
67#define REG_DUMP_ALIGN 16
68
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]69/**
70 * struct sde_dbg_reg_offset - tracking for start and end of region
71 * @start: start offset
72 * @start: end offset
73 */
74struct sde_dbg_reg_offset {
75 u32 start;
76 u32 end;
77};
78
79/**
80 * struct sde_dbg_reg_range - register dumping named sub-range
81 * @head: head of this node
82 * @reg_dump: address for the mem dump
83 * @range_name: name of this range
84 * @offset: offsets for range to dump
85 * @xin_id: client xin id
86 */
87struct sde_dbg_reg_range {
88 struct list_head head;
89 u32 *reg_dump;
90 char range_name[RANGE_NAME_LEN];
91 struct sde_dbg_reg_offset offset;
92 uint32_t xin_id;
93};
94
95/**
96 * struct sde_dbg_reg_base - register region base.
97 * may sub-ranges: sub-ranges are used for dumping
98 * or may not have sub-ranges: dumping is base -> max_offset
99 * @reg_base_head: head of this node
100 * @sub_range_list: head to the list with dump ranges
101 * @name: register base name
102 * @base: base pointer
103 * @off: cached offset of region for manual register dumping
104 * @cnt: cached range of region for manual register dumping
105 * @max_offset: length of region
106 * @buf: buffer used for manual register dumping
107 * @buf_len: buffer length used for manual register dumping
108 * @reg_dump: address for the mem dump if no ranges used
Alan Kwongaa53e682017-07-31 18:21:15 -0400[diff] [blame]109 * @cb: callback for external dump function, null if not defined
110 * @cb_ptr: private pointer to callback function
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]111 */
112struct sde_dbg_reg_base {
113 struct list_head reg_base_head;
114 struct list_head sub_range_list;
115 char name[REG_BASE_NAME_LEN];
116 void __iomem *base;
117 size_t off;
118 size_t cnt;
119 size_t max_offset;
120 char *buf;
121 size_t buf_len;
122 u32 *reg_dump;
Alan Kwongaa53e682017-07-31 18:21:15 -0400[diff] [blame]123 void (*cb)(void *ptr);
124 void *cb_ptr;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]125};
126
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]127struct sde_debug_bus_entry {
128 u32 wr_addr;
129 u32 block_id;
130 u32 test_id;
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]131 void (*analyzer)(struct sde_debug_bus_entry *entry, u32 val);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]132};
133
134struct vbif_debug_bus_entry {
135 u32 disable_bus_addr;
136 u32 block_bus_addr;
137 u32 bit_offset;
138 u32 block_cnt;
139 u32 test_pnt_start;
140 u32 test_pnt_cnt;
141};
142
143struct sde_dbg_debug_bus_common {
144 char *name;
145 u32 enable_mask;
146 bool include_in_deferred_work;
147 u32 flags;
148 u32 entries_size;
149 u32 *dumped_content;
150};
151
152struct sde_dbg_sde_debug_bus {
153 struct sde_dbg_debug_bus_common cmn;
154 struct sde_debug_bus_entry *entries;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]155 u32 top_blk_off;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]156};
157
158struct sde_dbg_vbif_debug_bus {
159 struct sde_dbg_debug_bus_common cmn;
160 struct vbif_debug_bus_entry *entries;
161};
162
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]163/**
164 * struct sde_dbg_base - global sde debug base structure
165 * @evtlog: event log instance
166 * @reg_base_list: list of register dumping regions
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]167 * @dev: device pointer
168 * @power_ctrl: callback structure for enabling power for reading hw registers
169 * @req_dump_blks: list of blocks requested for dumping
170 * @panic_on_err: whether to kernel panic after triggering dump via debugfs
171 * @dump_work: work struct for deferring register dump work to separate thread
172 * @work_panic: panic after dump if internal user passed "panic" special region
173 * @enable_reg_dump: whether to dump registers into memory, kernel log, or both
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]174 * @dbgbus_sde: debug bus structure for the sde
175 * @dbgbus_vbif_rt: debug bus structure for the realtime vbif
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]176 * @dump_all: dump all entries in register dump
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]177 */
178static struct sde_dbg_base {
179 struct sde_dbg_evtlog *evtlog;
180 struct list_head reg_base_list;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]181 struct device *dev;
182 struct sde_dbg_power_ctrl power_ctrl;
183
184 struct sde_dbg_reg_base *req_dump_blks[SDE_DBG_BASE_MAX];
185
186 u32 panic_on_err;
187 struct work_struct dump_work;
188 bool work_panic;
189 u32 enable_reg_dump;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]190
191 struct sde_dbg_sde_debug_bus dbgbus_sde;
192 struct sde_dbg_vbif_debug_bus dbgbus_vbif_rt;
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]193 bool dump_all;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]194} sde_dbg_base;
195
196/* sde_dbg_base_evtlog - global pointer to main sde event log for macro use */
197struct sde_dbg_evtlog *sde_dbg_base_evtlog;
198
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]199static void _sde_debug_bus_xbar_dump(struct sde_debug_bus_entry *entry,
200 u32 val)
201{
202 dev_err(sde_dbg_base.dev, "xbar 0x%x %d %d 0x%x\n",
203 entry->wr_addr, entry->block_id, entry->test_id, val);
204}
205
206static void _sde_debug_bus_lm_dump(struct sde_debug_bus_entry *entry,
207 u32 val)
208{
209 if (!(val & 0xFFF000))
210 return;
211
212 dev_err(sde_dbg_base.dev, "lm 0x%x %d %d 0x%x\n",
213 entry->wr_addr, entry->block_id, entry->test_id, val);
214}
215
216static void _sde_debug_bus_ppb0_dump(struct sde_debug_bus_entry *entry,
217 u32 val)
218{
219 if (!(val & BIT(15)))
220 return;
221
222 dev_err(sde_dbg_base.dev, "ppb0 0x%x %d %d 0x%x\n",
223 entry->wr_addr, entry->block_id, entry->test_id, val);
224}
225
226static void _sde_debug_bus_ppb1_dump(struct sde_debug_bus_entry *entry,
227 u32 val)
228{
229 if (!(val & BIT(15)))
230 return;
231
232 dev_err(sde_dbg_base.dev, "ppb1 0x%x %d %d 0x%x\n",
233 entry->wr_addr, entry->block_id, entry->test_id, val);
234}
235
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]236static struct sde_debug_bus_entry dbg_bus_sde_8998[] = {
237
238 /* Unpack 0 sspp 0*/
239 { DBGBUS_SSPP0, 50, 2 },
240 { DBGBUS_SSPP0, 60, 2 },
241 { DBGBUS_SSPP0, 70, 2 },
242 { DBGBUS_SSPP0, 85, 2 },
243
244 /* Upack 0 sspp 1*/
245 { DBGBUS_SSPP1, 50, 2 },
246 { DBGBUS_SSPP1, 60, 2 },
247 { DBGBUS_SSPP1, 70, 2 },
248 { DBGBUS_SSPP1, 85, 2 },
249
250 /* scheduler */
251 { DBGBUS_DSPP, 130, 0 },
252 { DBGBUS_DSPP, 130, 1 },
253 { DBGBUS_DSPP, 130, 2 },
254 { DBGBUS_DSPP, 130, 3 },
255 { DBGBUS_DSPP, 130, 4 },
256 { DBGBUS_DSPP, 130, 5 },
257
258 /* qseed */
259 { DBGBUS_SSPP0, 6, 0},
260 { DBGBUS_SSPP0, 6, 1},
261 { DBGBUS_SSPP0, 26, 0},
262 { DBGBUS_SSPP0, 26, 1},
263 { DBGBUS_SSPP1, 6, 0},
264 { DBGBUS_SSPP1, 6, 1},
265 { DBGBUS_SSPP1, 26, 0},
266 { DBGBUS_SSPP1, 26, 1},
267
268 /* scale */
269 { DBGBUS_SSPP0, 16, 0},
270 { DBGBUS_SSPP0, 16, 1},
271 { DBGBUS_SSPP0, 36, 0},
272 { DBGBUS_SSPP0, 36, 1},
273 { DBGBUS_SSPP1, 16, 0},
274 { DBGBUS_SSPP1, 16, 1},
275 { DBGBUS_SSPP1, 36, 0},
276 { DBGBUS_SSPP1, 36, 1},
277
278 /* fetch sspp0 */
279
280 /* vig 0 */
281 { DBGBUS_SSPP0, 0, 0 },
282 { DBGBUS_SSPP0, 0, 1 },
283 { DBGBUS_SSPP0, 0, 2 },
284 { DBGBUS_SSPP0, 0, 3 },
285 { DBGBUS_SSPP0, 0, 4 },
286 { DBGBUS_SSPP0, 0, 5 },
287 { DBGBUS_SSPP0, 0, 6 },
288 { DBGBUS_SSPP0, 0, 7 },
289
290 { DBGBUS_SSPP0, 1, 0 },
291 { DBGBUS_SSPP0, 1, 1 },
292 { DBGBUS_SSPP0, 1, 2 },
293 { DBGBUS_SSPP0, 1, 3 },
294 { DBGBUS_SSPP0, 1, 4 },
295 { DBGBUS_SSPP0, 1, 5 },
296 { DBGBUS_SSPP0, 1, 6 },
297 { DBGBUS_SSPP0, 1, 7 },
298
299 { DBGBUS_SSPP0, 2, 0 },
300 { DBGBUS_SSPP0, 2, 1 },
301 { DBGBUS_SSPP0, 2, 2 },
302 { DBGBUS_SSPP0, 2, 3 },
303 { DBGBUS_SSPP0, 2, 4 },
304 { DBGBUS_SSPP0, 2, 5 },
305 { DBGBUS_SSPP0, 2, 6 },
306 { DBGBUS_SSPP0, 2, 7 },
307
308 { DBGBUS_SSPP0, 4, 0 },
309 { DBGBUS_SSPP0, 4, 1 },
310 { DBGBUS_SSPP0, 4, 2 },
311 { DBGBUS_SSPP0, 4, 3 },
312 { DBGBUS_SSPP0, 4, 4 },
313 { DBGBUS_SSPP0, 4, 5 },
314 { DBGBUS_SSPP0, 4, 6 },
315 { DBGBUS_SSPP0, 4, 7 },
316
317 { DBGBUS_SSPP0, 5, 0 },
318 { DBGBUS_SSPP0, 5, 1 },
319 { DBGBUS_SSPP0, 5, 2 },
320 { DBGBUS_SSPP0, 5, 3 },
321 { DBGBUS_SSPP0, 5, 4 },
322 { DBGBUS_SSPP0, 5, 5 },
323 { DBGBUS_SSPP0, 5, 6 },
324 { DBGBUS_SSPP0, 5, 7 },
325
326 /* vig 2 */
327 { DBGBUS_SSPP0, 20, 0 },
328 { DBGBUS_SSPP0, 20, 1 },
329 { DBGBUS_SSPP0, 20, 2 },
330 { DBGBUS_SSPP0, 20, 3 },
331 { DBGBUS_SSPP0, 20, 4 },
332 { DBGBUS_SSPP0, 20, 5 },
333 { DBGBUS_SSPP0, 20, 6 },
334 { DBGBUS_SSPP0, 20, 7 },
335
336 { DBGBUS_SSPP0, 21, 0 },
337 { DBGBUS_SSPP0, 21, 1 },
338 { DBGBUS_SSPP0, 21, 2 },
339 { DBGBUS_SSPP0, 21, 3 },
340 { DBGBUS_SSPP0, 21, 4 },
341 { DBGBUS_SSPP0, 21, 5 },
342 { DBGBUS_SSPP0, 21, 6 },
343 { DBGBUS_SSPP0, 21, 7 },
344
345 { DBGBUS_SSPP0, 22, 0 },
346 { DBGBUS_SSPP0, 22, 1 },
347 { DBGBUS_SSPP0, 22, 2 },
348 { DBGBUS_SSPP0, 22, 3 },
349 { DBGBUS_SSPP0, 22, 4 },
350 { DBGBUS_SSPP0, 22, 5 },
351 { DBGBUS_SSPP0, 22, 6 },
352 { DBGBUS_SSPP0, 22, 7 },
353
354 { DBGBUS_SSPP0, 24, 0 },
355 { DBGBUS_SSPP0, 24, 1 },
356 { DBGBUS_SSPP0, 24, 2 },
357 { DBGBUS_SSPP0, 24, 3 },
358 { DBGBUS_SSPP0, 24, 4 },
359 { DBGBUS_SSPP0, 24, 5 },
360 { DBGBUS_SSPP0, 24, 6 },
361 { DBGBUS_SSPP0, 24, 7 },
362
363 { DBGBUS_SSPP0, 25, 0 },
364 { DBGBUS_SSPP0, 25, 1 },
365 { DBGBUS_SSPP0, 25, 2 },
366 { DBGBUS_SSPP0, 25, 3 },
367 { DBGBUS_SSPP0, 25, 4 },
368 { DBGBUS_SSPP0, 25, 5 },
369 { DBGBUS_SSPP0, 25, 6 },
370 { DBGBUS_SSPP0, 25, 7 },
371
372 /* dma 2 */
373 { DBGBUS_SSPP0, 30, 0 },
374 { DBGBUS_SSPP0, 30, 1 },
375 { DBGBUS_SSPP0, 30, 2 },
376 { DBGBUS_SSPP0, 30, 3 },
377 { DBGBUS_SSPP0, 30, 4 },
378 { DBGBUS_SSPP0, 30, 5 },
379 { DBGBUS_SSPP0, 30, 6 },
380 { DBGBUS_SSPP0, 30, 7 },
381
382 { DBGBUS_SSPP0, 31, 0 },
383 { DBGBUS_SSPP0, 31, 1 },
384 { DBGBUS_SSPP0, 31, 2 },
385 { DBGBUS_SSPP0, 31, 3 },
386 { DBGBUS_SSPP0, 31, 4 },
387 { DBGBUS_SSPP0, 31, 5 },
388 { DBGBUS_SSPP0, 31, 6 },
389 { DBGBUS_SSPP0, 31, 7 },
390
391 { DBGBUS_SSPP0, 32, 0 },
392 { DBGBUS_SSPP0, 32, 1 },
393 { DBGBUS_SSPP0, 32, 2 },
394 { DBGBUS_SSPP0, 32, 3 },
395 { DBGBUS_SSPP0, 32, 4 },
396 { DBGBUS_SSPP0, 32, 5 },
397 { DBGBUS_SSPP0, 32, 6 },
398 { DBGBUS_SSPP0, 32, 7 },
399
400 { DBGBUS_SSPP0, 33, 0 },
401 { DBGBUS_SSPP0, 33, 1 },
402 { DBGBUS_SSPP0, 33, 2 },
403 { DBGBUS_SSPP0, 33, 3 },
404 { DBGBUS_SSPP0, 33, 4 },
405 { DBGBUS_SSPP0, 33, 5 },
406 { DBGBUS_SSPP0, 33, 6 },
407 { DBGBUS_SSPP0, 33, 7 },
408
409 { DBGBUS_SSPP0, 34, 0 },
410 { DBGBUS_SSPP0, 34, 1 },
411 { DBGBUS_SSPP0, 34, 2 },
412 { DBGBUS_SSPP0, 34, 3 },
413 { DBGBUS_SSPP0, 34, 4 },
414 { DBGBUS_SSPP0, 34, 5 },
415 { DBGBUS_SSPP0, 34, 6 },
416 { DBGBUS_SSPP0, 34, 7 },
417
418 { DBGBUS_SSPP0, 35, 0 },
419 { DBGBUS_SSPP0, 35, 1 },
420 { DBGBUS_SSPP0, 35, 2 },
421 { DBGBUS_SSPP0, 35, 3 },
422
423 /* dma 0 */
424 { DBGBUS_SSPP0, 40, 0 },
425 { DBGBUS_SSPP0, 40, 1 },
426 { DBGBUS_SSPP0, 40, 2 },
427 { DBGBUS_SSPP0, 40, 3 },
428 { DBGBUS_SSPP0, 40, 4 },
429 { DBGBUS_SSPP0, 40, 5 },
430 { DBGBUS_SSPP0, 40, 6 },
431 { DBGBUS_SSPP0, 40, 7 },
432
433 { DBGBUS_SSPP0, 41, 0 },
434 { DBGBUS_SSPP0, 41, 1 },
435 { DBGBUS_SSPP0, 41, 2 },
436 { DBGBUS_SSPP0, 41, 3 },
437 { DBGBUS_SSPP0, 41, 4 },
438 { DBGBUS_SSPP0, 41, 5 },
439 { DBGBUS_SSPP0, 41, 6 },
440 { DBGBUS_SSPP0, 41, 7 },
441
442 { DBGBUS_SSPP0, 42, 0 },
443 { DBGBUS_SSPP0, 42, 1 },
444 { DBGBUS_SSPP0, 42, 2 },
445 { DBGBUS_SSPP0, 42, 3 },
446 { DBGBUS_SSPP0, 42, 4 },
447 { DBGBUS_SSPP0, 42, 5 },
448 { DBGBUS_SSPP0, 42, 6 },
449 { DBGBUS_SSPP0, 42, 7 },
450
451 { DBGBUS_SSPP0, 44, 0 },
452 { DBGBUS_SSPP0, 44, 1 },
453 { DBGBUS_SSPP0, 44, 2 },
454 { DBGBUS_SSPP0, 44, 3 },
455 { DBGBUS_SSPP0, 44, 4 },
456 { DBGBUS_SSPP0, 44, 5 },
457 { DBGBUS_SSPP0, 44, 6 },
458 { DBGBUS_SSPP0, 44, 7 },
459
460 { DBGBUS_SSPP0, 45, 0 },
461 { DBGBUS_SSPP0, 45, 1 },
462 { DBGBUS_SSPP0, 45, 2 },
463 { DBGBUS_SSPP0, 45, 3 },
464 { DBGBUS_SSPP0, 45, 4 },
465 { DBGBUS_SSPP0, 45, 5 },
466 { DBGBUS_SSPP0, 45, 6 },
467 { DBGBUS_SSPP0, 45, 7 },
468
469 /* fetch sspp1 */
470 /* vig 1 */
471 { DBGBUS_SSPP1, 0, 0 },
472 { DBGBUS_SSPP1, 0, 1 },
473 { DBGBUS_SSPP1, 0, 2 },
474 { DBGBUS_SSPP1, 0, 3 },
475 { DBGBUS_SSPP1, 0, 4 },
476 { DBGBUS_SSPP1, 0, 5 },
477 { DBGBUS_SSPP1, 0, 6 },
478 { DBGBUS_SSPP1, 0, 7 },
479
480 { DBGBUS_SSPP1, 1, 0 },
481 { DBGBUS_SSPP1, 1, 1 },
482 { DBGBUS_SSPP1, 1, 2 },
483 { DBGBUS_SSPP1, 1, 3 },
484 { DBGBUS_SSPP1, 1, 4 },
485 { DBGBUS_SSPP1, 1, 5 },
486 { DBGBUS_SSPP1, 1, 6 },
487 { DBGBUS_SSPP1, 1, 7 },
488
489 { DBGBUS_SSPP1, 2, 0 },
490 { DBGBUS_SSPP1, 2, 1 },
491 { DBGBUS_SSPP1, 2, 2 },
492 { DBGBUS_SSPP1, 2, 3 },
493 { DBGBUS_SSPP1, 2, 4 },
494 { DBGBUS_SSPP1, 2, 5 },
495 { DBGBUS_SSPP1, 2, 6 },
496 { DBGBUS_SSPP1, 2, 7 },
497
498 { DBGBUS_SSPP1, 4, 0 },
499 { DBGBUS_SSPP1, 4, 1 },
500 { DBGBUS_SSPP1, 4, 2 },
501 { DBGBUS_SSPP1, 4, 3 },
502 { DBGBUS_SSPP1, 4, 4 },
503 { DBGBUS_SSPP1, 4, 5 },
504 { DBGBUS_SSPP1, 4, 6 },
505 { DBGBUS_SSPP1, 4, 7 },
506
507 { DBGBUS_SSPP1, 5, 0 },
508 { DBGBUS_SSPP1, 5, 1 },
509 { DBGBUS_SSPP1, 5, 2 },
510 { DBGBUS_SSPP1, 5, 3 },
511 { DBGBUS_SSPP1, 5, 4 },
512 { DBGBUS_SSPP1, 5, 5 },
513 { DBGBUS_SSPP1, 5, 6 },
514 { DBGBUS_SSPP1, 5, 7 },
515
516 /* vig 3 */
517 { DBGBUS_SSPP1, 20, 0 },
518 { DBGBUS_SSPP1, 20, 1 },
519 { DBGBUS_SSPP1, 20, 2 },
520 { DBGBUS_SSPP1, 20, 3 },
521 { DBGBUS_SSPP1, 20, 4 },
522 { DBGBUS_SSPP1, 20, 5 },
523 { DBGBUS_SSPP1, 20, 6 },
524 { DBGBUS_SSPP1, 20, 7 },
525
526 { DBGBUS_SSPP1, 21, 0 },
527 { DBGBUS_SSPP1, 21, 1 },
528 { DBGBUS_SSPP1, 21, 2 },
529 { DBGBUS_SSPP1, 21, 3 },
530 { DBGBUS_SSPP1, 21, 4 },
531 { DBGBUS_SSPP1, 21, 5 },
532 { DBGBUS_SSPP1, 21, 6 },
533 { DBGBUS_SSPP1, 21, 7 },
534
535 { DBGBUS_SSPP1, 22, 0 },
536 { DBGBUS_SSPP1, 22, 1 },
537 { DBGBUS_SSPP1, 22, 2 },
538 { DBGBUS_SSPP1, 22, 3 },
539 { DBGBUS_SSPP1, 22, 4 },
540 { DBGBUS_SSPP1, 22, 5 },
541 { DBGBUS_SSPP1, 22, 6 },
542 { DBGBUS_SSPP1, 22, 7 },
543
544 { DBGBUS_SSPP1, 24, 0 },
545 { DBGBUS_SSPP1, 24, 1 },
546 { DBGBUS_SSPP1, 24, 2 },
547 { DBGBUS_SSPP1, 24, 3 },
548 { DBGBUS_SSPP1, 24, 4 },
549 { DBGBUS_SSPP1, 24, 5 },
550 { DBGBUS_SSPP1, 24, 6 },
551 { DBGBUS_SSPP1, 24, 7 },
552
553 { DBGBUS_SSPP1, 25, 0 },
554 { DBGBUS_SSPP1, 25, 1 },
555 { DBGBUS_SSPP1, 25, 2 },
556 { DBGBUS_SSPP1, 25, 3 },
557 { DBGBUS_SSPP1, 25, 4 },
558 { DBGBUS_SSPP1, 25, 5 },
559 { DBGBUS_SSPP1, 25, 6 },
560 { DBGBUS_SSPP1, 25, 7 },
561
562 /* dma 3 */
563 { DBGBUS_SSPP1, 30, 0 },
564 { DBGBUS_SSPP1, 30, 1 },
565 { DBGBUS_SSPP1, 30, 2 },
566 { DBGBUS_SSPP1, 30, 3 },
567 { DBGBUS_SSPP1, 30, 4 },
568 { DBGBUS_SSPP1, 30, 5 },
569 { DBGBUS_SSPP1, 30, 6 },
570 { DBGBUS_SSPP1, 30, 7 },
571
572 { DBGBUS_SSPP1, 31, 0 },
573 { DBGBUS_SSPP1, 31, 1 },
574 { DBGBUS_SSPP1, 31, 2 },
575 { DBGBUS_SSPP1, 31, 3 },
576 { DBGBUS_SSPP1, 31, 4 },
577 { DBGBUS_SSPP1, 31, 5 },
578 { DBGBUS_SSPP1, 31, 6 },
579 { DBGBUS_SSPP1, 31, 7 },
580
581 { DBGBUS_SSPP1, 32, 0 },
582 { DBGBUS_SSPP1, 32, 1 },
583 { DBGBUS_SSPP1, 32, 2 },
584 { DBGBUS_SSPP1, 32, 3 },
585 { DBGBUS_SSPP1, 32, 4 },
586 { DBGBUS_SSPP1, 32, 5 },
587 { DBGBUS_SSPP1, 32, 6 },
588 { DBGBUS_SSPP1, 32, 7 },
589
590 { DBGBUS_SSPP1, 33, 0 },
591 { DBGBUS_SSPP1, 33, 1 },
592 { DBGBUS_SSPP1, 33, 2 },
593 { DBGBUS_SSPP1, 33, 3 },
594 { DBGBUS_SSPP1, 33, 4 },
595 { DBGBUS_SSPP1, 33, 5 },
596 { DBGBUS_SSPP1, 33, 6 },
597 { DBGBUS_SSPP1, 33, 7 },
598
599 { DBGBUS_SSPP1, 34, 0 },
600 { DBGBUS_SSPP1, 34, 1 },
601 { DBGBUS_SSPP1, 34, 2 },
602 { DBGBUS_SSPP1, 34, 3 },
603 { DBGBUS_SSPP1, 34, 4 },
604 { DBGBUS_SSPP1, 34, 5 },
605 { DBGBUS_SSPP1, 34, 6 },
606 { DBGBUS_SSPP1, 34, 7 },
607
608 { DBGBUS_SSPP1, 35, 0 },
609 { DBGBUS_SSPP1, 35, 1 },
610 { DBGBUS_SSPP1, 35, 2 },
611
612 /* dma 1 */
613 { DBGBUS_SSPP1, 40, 0 },
614 { DBGBUS_SSPP1, 40, 1 },
615 { DBGBUS_SSPP1, 40, 2 },
616 { DBGBUS_SSPP1, 40, 3 },
617 { DBGBUS_SSPP1, 40, 4 },
618 { DBGBUS_SSPP1, 40, 5 },
619 { DBGBUS_SSPP1, 40, 6 },
620 { DBGBUS_SSPP1, 40, 7 },
621
622 { DBGBUS_SSPP1, 41, 0 },
623 { DBGBUS_SSPP1, 41, 1 },
624 { DBGBUS_SSPP1, 41, 2 },
625 { DBGBUS_SSPP1, 41, 3 },
626 { DBGBUS_SSPP1, 41, 4 },
627 { DBGBUS_SSPP1, 41, 5 },
628 { DBGBUS_SSPP1, 41, 6 },
629 { DBGBUS_SSPP1, 41, 7 },
630
631 { DBGBUS_SSPP1, 42, 0 },
632 { DBGBUS_SSPP1, 42, 1 },
633 { DBGBUS_SSPP1, 42, 2 },
634 { DBGBUS_SSPP1, 42, 3 },
635 { DBGBUS_SSPP1, 42, 4 },
636 { DBGBUS_SSPP1, 42, 5 },
637 { DBGBUS_SSPP1, 42, 6 },
638 { DBGBUS_SSPP1, 42, 7 },
639
640 { DBGBUS_SSPP1, 44, 0 },
641 { DBGBUS_SSPP1, 44, 1 },
642 { DBGBUS_SSPP1, 44, 2 },
643 { DBGBUS_SSPP1, 44, 3 },
644 { DBGBUS_SSPP1, 44, 4 },
645 { DBGBUS_SSPP1, 44, 5 },
646 { DBGBUS_SSPP1, 44, 6 },
647 { DBGBUS_SSPP1, 44, 7 },
648
649 { DBGBUS_SSPP1, 45, 0 },
650 { DBGBUS_SSPP1, 45, 1 },
651 { DBGBUS_SSPP1, 45, 2 },
652 { DBGBUS_SSPP1, 45, 3 },
653 { DBGBUS_SSPP1, 45, 4 },
654 { DBGBUS_SSPP1, 45, 5 },
655 { DBGBUS_SSPP1, 45, 6 },
656 { DBGBUS_SSPP1, 45, 7 },
657
658 /* cursor 1 */
659 { DBGBUS_SSPP1, 80, 0 },
660 { DBGBUS_SSPP1, 80, 1 },
661 { DBGBUS_SSPP1, 80, 2 },
662 { DBGBUS_SSPP1, 80, 3 },
663 { DBGBUS_SSPP1, 80, 4 },
664 { DBGBUS_SSPP1, 80, 5 },
665 { DBGBUS_SSPP1, 80, 6 },
666 { DBGBUS_SSPP1, 80, 7 },
667
668 { DBGBUS_SSPP1, 81, 0 },
669 { DBGBUS_SSPP1, 81, 1 },
670 { DBGBUS_SSPP1, 81, 2 },
671 { DBGBUS_SSPP1, 81, 3 },
672 { DBGBUS_SSPP1, 81, 4 },
673 { DBGBUS_SSPP1, 81, 5 },
674 { DBGBUS_SSPP1, 81, 6 },
675 { DBGBUS_SSPP1, 81, 7 },
676
677 { DBGBUS_SSPP1, 82, 0 },
678 { DBGBUS_SSPP1, 82, 1 },
679 { DBGBUS_SSPP1, 82, 2 },
680 { DBGBUS_SSPP1, 82, 3 },
681 { DBGBUS_SSPP1, 82, 4 },
682 { DBGBUS_SSPP1, 82, 5 },
683 { DBGBUS_SSPP1, 82, 6 },
684 { DBGBUS_SSPP1, 82, 7 },
685
686 { DBGBUS_SSPP1, 83, 0 },
687 { DBGBUS_SSPP1, 83, 1 },
688 { DBGBUS_SSPP1, 83, 2 },
689 { DBGBUS_SSPP1, 83, 3 },
690 { DBGBUS_SSPP1, 83, 4 },
691 { DBGBUS_SSPP1, 83, 5 },
692 { DBGBUS_SSPP1, 83, 6 },
693 { DBGBUS_SSPP1, 83, 7 },
694
695 { DBGBUS_SSPP1, 84, 0 },
696 { DBGBUS_SSPP1, 84, 1 },
697 { DBGBUS_SSPP1, 84, 2 },
698 { DBGBUS_SSPP1, 84, 3 },
699 { DBGBUS_SSPP1, 84, 4 },
700 { DBGBUS_SSPP1, 84, 5 },
701 { DBGBUS_SSPP1, 84, 6 },
702 { DBGBUS_SSPP1, 84, 7 },
703
704 /* dspp */
705 { DBGBUS_DSPP, 13, 0 },
706 { DBGBUS_DSPP, 19, 0 },
707 { DBGBUS_DSPP, 14, 0 },
708 { DBGBUS_DSPP, 14, 1 },
709 { DBGBUS_DSPP, 14, 3 },
710 { DBGBUS_DSPP, 20, 0 },
711 { DBGBUS_DSPP, 20, 1 },
712 { DBGBUS_DSPP, 20, 3 },
713
714 /* ppb_0 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]715 { DBGBUS_DSPP, 31, 0, _sde_debug_bus_ppb0_dump },
716 { DBGBUS_DSPP, 33, 0, _sde_debug_bus_ppb0_dump },
717 { DBGBUS_DSPP, 35, 0, _sde_debug_bus_ppb0_dump },
718 { DBGBUS_DSPP, 42, 0, _sde_debug_bus_ppb0_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]719
720 /* ppb_1 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]721 { DBGBUS_DSPP, 32, 0, _sde_debug_bus_ppb1_dump },
722 { DBGBUS_DSPP, 34, 0, _sde_debug_bus_ppb1_dump },
723 { DBGBUS_DSPP, 36, 0, _sde_debug_bus_ppb1_dump },
724 { DBGBUS_DSPP, 43, 0, _sde_debug_bus_ppb1_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]725
726 /* lm_lut */
727 { DBGBUS_DSPP, 109, 0 },
728 { DBGBUS_DSPP, 105, 0 },
729 { DBGBUS_DSPP, 103, 0 },
730
731 /* tear-check */
732 { DBGBUS_PERIPH, 63, 0 },
733 { DBGBUS_PERIPH, 64, 0 },
734 { DBGBUS_PERIPH, 65, 0 },
735 { DBGBUS_PERIPH, 73, 0 },
736 { DBGBUS_PERIPH, 74, 0 },
737
738 /* crossbar */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]739 { DBGBUS_DSPP, 0, 0, _sde_debug_bus_xbar_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]740
741 /* rotator */
742 { DBGBUS_DSPP, 9, 0},
743
744 /* blend */
745 /* LM0 */
746 { DBGBUS_DSPP, 63, 0},
747 { DBGBUS_DSPP, 63, 1},
748 { DBGBUS_DSPP, 63, 2},
749 { DBGBUS_DSPP, 63, 3},
750 { DBGBUS_DSPP, 63, 4},
751 { DBGBUS_DSPP, 63, 5},
752 { DBGBUS_DSPP, 63, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]753 { DBGBUS_DSPP, 63, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]754
755 { DBGBUS_DSPP, 64, 0},
756 { DBGBUS_DSPP, 64, 1},
757 { DBGBUS_DSPP, 64, 2},
758 { DBGBUS_DSPP, 64, 3},
759 { DBGBUS_DSPP, 64, 4},
760 { DBGBUS_DSPP, 64, 5},
761 { DBGBUS_DSPP, 64, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]762 { DBGBUS_DSPP, 64, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]763
764 { DBGBUS_DSPP, 65, 0},
765 { DBGBUS_DSPP, 65, 1},
766 { DBGBUS_DSPP, 65, 2},
767 { DBGBUS_DSPP, 65, 3},
768 { DBGBUS_DSPP, 65, 4},
769 { DBGBUS_DSPP, 65, 5},
770 { DBGBUS_DSPP, 65, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]771 { DBGBUS_DSPP, 65, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]772
773 { DBGBUS_DSPP, 66, 0},
774 { DBGBUS_DSPP, 66, 1},
775 { DBGBUS_DSPP, 66, 2},
776 { DBGBUS_DSPP, 66, 3},
777 { DBGBUS_DSPP, 66, 4},
778 { DBGBUS_DSPP, 66, 5},
779 { DBGBUS_DSPP, 66, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]780 { DBGBUS_DSPP, 66, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]781
782 { DBGBUS_DSPP, 67, 0},
783 { DBGBUS_DSPP, 67, 1},
784 { DBGBUS_DSPP, 67, 2},
785 { DBGBUS_DSPP, 67, 3},
786 { DBGBUS_DSPP, 67, 4},
787 { DBGBUS_DSPP, 67, 5},
788 { DBGBUS_DSPP, 67, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]789 { DBGBUS_DSPP, 67, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]790
791 { DBGBUS_DSPP, 68, 0},
792 { DBGBUS_DSPP, 68, 1},
793 { DBGBUS_DSPP, 68, 2},
794 { DBGBUS_DSPP, 68, 3},
795 { DBGBUS_DSPP, 68, 4},
796 { DBGBUS_DSPP, 68, 5},
797 { DBGBUS_DSPP, 68, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]798 { DBGBUS_DSPP, 68, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]799
800 { DBGBUS_DSPP, 69, 0},
801 { DBGBUS_DSPP, 69, 1},
802 { DBGBUS_DSPP, 69, 2},
803 { DBGBUS_DSPP, 69, 3},
804 { DBGBUS_DSPP, 69, 4},
805 { DBGBUS_DSPP, 69, 5},
806 { DBGBUS_DSPP, 69, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]807 { DBGBUS_DSPP, 69, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]808
809 /* LM1 */
810 { DBGBUS_DSPP, 70, 0},
811 { DBGBUS_DSPP, 70, 1},
812 { DBGBUS_DSPP, 70, 2},
813 { DBGBUS_DSPP, 70, 3},
814 { DBGBUS_DSPP, 70, 4},
815 { DBGBUS_DSPP, 70, 5},
816 { DBGBUS_DSPP, 70, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]817 { DBGBUS_DSPP, 70, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]818
819 { DBGBUS_DSPP, 71, 0},
820 { DBGBUS_DSPP, 71, 1},
821 { DBGBUS_DSPP, 71, 2},
822 { DBGBUS_DSPP, 71, 3},
823 { DBGBUS_DSPP, 71, 4},
824 { DBGBUS_DSPP, 71, 5},
825 { DBGBUS_DSPP, 71, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]826 { DBGBUS_DSPP, 71, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]827
828 { DBGBUS_DSPP, 72, 0},
829 { DBGBUS_DSPP, 72, 1},
830 { DBGBUS_DSPP, 72, 2},
831 { DBGBUS_DSPP, 72, 3},
832 { DBGBUS_DSPP, 72, 4},
833 { DBGBUS_DSPP, 72, 5},
834 { DBGBUS_DSPP, 72, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]835 { DBGBUS_DSPP, 72, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]836
837 { DBGBUS_DSPP, 73, 0},
838 { DBGBUS_DSPP, 73, 1},
839 { DBGBUS_DSPP, 73, 2},
840 { DBGBUS_DSPP, 73, 3},
841 { DBGBUS_DSPP, 73, 4},
842 { DBGBUS_DSPP, 73, 5},
843 { DBGBUS_DSPP, 73, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]844 { DBGBUS_DSPP, 73, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]845
846 { DBGBUS_DSPP, 74, 0},
847 { DBGBUS_DSPP, 74, 1},
848 { DBGBUS_DSPP, 74, 2},
849 { DBGBUS_DSPP, 74, 3},
850 { DBGBUS_DSPP, 74, 4},
851 { DBGBUS_DSPP, 74, 5},
852 { DBGBUS_DSPP, 74, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]853 { DBGBUS_DSPP, 74, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]854
855 { DBGBUS_DSPP, 75, 0},
856 { DBGBUS_DSPP, 75, 1},
857 { DBGBUS_DSPP, 75, 2},
858 { DBGBUS_DSPP, 75, 3},
859 { DBGBUS_DSPP, 75, 4},
860 { DBGBUS_DSPP, 75, 5},
861 { DBGBUS_DSPP, 75, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]862 { DBGBUS_DSPP, 75, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]863
864 { DBGBUS_DSPP, 76, 0},
865 { DBGBUS_DSPP, 76, 1},
866 { DBGBUS_DSPP, 76, 2},
867 { DBGBUS_DSPP, 76, 3},
868 { DBGBUS_DSPP, 76, 4},
869 { DBGBUS_DSPP, 76, 5},
870 { DBGBUS_DSPP, 76, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]871 { DBGBUS_DSPP, 76, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]872
873 /* LM2 */
874 { DBGBUS_DSPP, 77, 0},
875 { DBGBUS_DSPP, 77, 1},
876 { DBGBUS_DSPP, 77, 2},
877 { DBGBUS_DSPP, 77, 3},
878 { DBGBUS_DSPP, 77, 4},
879 { DBGBUS_DSPP, 77, 5},
880 { DBGBUS_DSPP, 77, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]881 { DBGBUS_DSPP, 77, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]882
883 { DBGBUS_DSPP, 78, 0},
884 { DBGBUS_DSPP, 78, 1},
885 { DBGBUS_DSPP, 78, 2},
886 { DBGBUS_DSPP, 78, 3},
887 { DBGBUS_DSPP, 78, 4},
888 { DBGBUS_DSPP, 78, 5},
889 { DBGBUS_DSPP, 78, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]890 { DBGBUS_DSPP, 78, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]891
892 { DBGBUS_DSPP, 79, 0},
893 { DBGBUS_DSPP, 79, 1},
894 { DBGBUS_DSPP, 79, 2},
895 { DBGBUS_DSPP, 79, 3},
896 { DBGBUS_DSPP, 79, 4},
897 { DBGBUS_DSPP, 79, 5},
898 { DBGBUS_DSPP, 79, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]899 { DBGBUS_DSPP, 79, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]900
901 { DBGBUS_DSPP, 80, 0},
902 { DBGBUS_DSPP, 80, 1},
903 { DBGBUS_DSPP, 80, 2},
904 { DBGBUS_DSPP, 80, 3},
905 { DBGBUS_DSPP, 80, 4},
906 { DBGBUS_DSPP, 80, 5},
907 { DBGBUS_DSPP, 80, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]908 { DBGBUS_DSPP, 80, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]909
910 { DBGBUS_DSPP, 81, 0},
911 { DBGBUS_DSPP, 81, 1},
912 { DBGBUS_DSPP, 81, 2},
913 { DBGBUS_DSPP, 81, 3},
914 { DBGBUS_DSPP, 81, 4},
915 { DBGBUS_DSPP, 81, 5},
916 { DBGBUS_DSPP, 81, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]917 { DBGBUS_DSPP, 81, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]918
919 { DBGBUS_DSPP, 82, 0},
920 { DBGBUS_DSPP, 82, 1},
921 { DBGBUS_DSPP, 82, 2},
922 { DBGBUS_DSPP, 82, 3},
923 { DBGBUS_DSPP, 82, 4},
924 { DBGBUS_DSPP, 82, 5},
925 { DBGBUS_DSPP, 82, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]926 { DBGBUS_DSPP, 82, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]927
928 { DBGBUS_DSPP, 83, 0},
929 { DBGBUS_DSPP, 83, 1},
930 { DBGBUS_DSPP, 83, 2},
931 { DBGBUS_DSPP, 83, 3},
932 { DBGBUS_DSPP, 83, 4},
933 { DBGBUS_DSPP, 83, 5},
934 { DBGBUS_DSPP, 83, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]935 { DBGBUS_DSPP, 83, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]936
937 /* csc */
938 { DBGBUS_SSPP0, 7, 0},
939 { DBGBUS_SSPP0, 7, 1},
940 { DBGBUS_SSPP0, 27, 0},
941 { DBGBUS_SSPP0, 27, 1},
942 { DBGBUS_SSPP1, 7, 0},
943 { DBGBUS_SSPP1, 7, 1},
944 { DBGBUS_SSPP1, 27, 0},
945 { DBGBUS_SSPP1, 27, 1},
946
947 /* pcc */
948 { DBGBUS_SSPP0, 3, 3},
949 { DBGBUS_SSPP0, 23, 3},
950 { DBGBUS_SSPP0, 33, 3},
951 { DBGBUS_SSPP0, 43, 3},
952 { DBGBUS_SSPP1, 3, 3},
953 { DBGBUS_SSPP1, 23, 3},
954 { DBGBUS_SSPP1, 33, 3},
955 { DBGBUS_SSPP1, 43, 3},
956
957 /* spa */
958 { DBGBUS_SSPP0, 8, 0},
959 { DBGBUS_SSPP0, 28, 0},
960 { DBGBUS_SSPP1, 8, 0},
961 { DBGBUS_SSPP1, 28, 0},
962 { DBGBUS_DSPP, 13, 0},
963 { DBGBUS_DSPP, 19, 0},
964
965 /* igc */
966 { DBGBUS_SSPP0, 9, 0},
967 { DBGBUS_SSPP0, 9, 1},
968 { DBGBUS_SSPP0, 9, 3},
969 { DBGBUS_SSPP0, 29, 0},
970 { DBGBUS_SSPP0, 29, 1},
971 { DBGBUS_SSPP0, 29, 3},
972 { DBGBUS_SSPP0, 17, 0},
973 { DBGBUS_SSPP0, 17, 1},
974 { DBGBUS_SSPP0, 17, 3},
975 { DBGBUS_SSPP0, 37, 0},
976 { DBGBUS_SSPP0, 37, 1},
977 { DBGBUS_SSPP0, 37, 3},
978 { DBGBUS_SSPP0, 46, 0},
979 { DBGBUS_SSPP0, 46, 1},
980 { DBGBUS_SSPP0, 46, 3},
981
982 { DBGBUS_SSPP1, 9, 0},
983 { DBGBUS_SSPP1, 9, 1},
984 { DBGBUS_SSPP1, 9, 3},
985 { DBGBUS_SSPP1, 29, 0},
986 { DBGBUS_SSPP1, 29, 1},
987 { DBGBUS_SSPP1, 29, 3},
988 { DBGBUS_SSPP1, 17, 0},
989 { DBGBUS_SSPP1, 17, 1},
990 { DBGBUS_SSPP1, 17, 3},
991 { DBGBUS_SSPP1, 37, 0},
992 { DBGBUS_SSPP1, 37, 1},
993 { DBGBUS_SSPP1, 37, 3},
994 { DBGBUS_SSPP1, 46, 0},
995 { DBGBUS_SSPP1, 46, 1},
996 { DBGBUS_SSPP1, 46, 3},
997
998 { DBGBUS_DSPP, 14, 0},
999 { DBGBUS_DSPP, 14, 1},
1000 { DBGBUS_DSPP, 14, 3},
1001 { DBGBUS_DSPP, 20, 0},
1002 { DBGBUS_DSPP, 20, 1},
1003 { DBGBUS_DSPP, 20, 3},
1004
1005 { DBGBUS_PERIPH, 60, 0},
1006};
1007
1008static struct sde_debug_bus_entry dbg_bus_sde_sdm845[] = {
1009
1010 /* Unpack 0 sspp 0*/
1011 { DBGBUS_SSPP0, 50, 2 },
1012 { DBGBUS_SSPP0, 60, 2 },
1013 { DBGBUS_SSPP0, 70, 2 },
1014
1015 /* Upack 0 sspp 1*/
1016 { DBGBUS_SSPP1, 50, 2 },
1017 { DBGBUS_SSPP1, 60, 2 },
1018 { DBGBUS_SSPP1, 70, 2 },
1019
1020 /* scheduler */
1021 { DBGBUS_DSPP, 130, 0 },
1022 { DBGBUS_DSPP, 130, 1 },
1023 { DBGBUS_DSPP, 130, 2 },
1024 { DBGBUS_DSPP, 130, 3 },
1025 { DBGBUS_DSPP, 130, 4 },
1026 { DBGBUS_DSPP, 130, 5 },
1027
1028 /* qseed */
1029 { DBGBUS_SSPP0, 6, 0},
1030 { DBGBUS_SSPP0, 6, 1},
1031 { DBGBUS_SSPP0, 26, 0},
1032 { DBGBUS_SSPP0, 26, 1},
1033 { DBGBUS_SSPP1, 6, 0},
1034 { DBGBUS_SSPP1, 6, 1},
1035 { DBGBUS_SSPP1, 26, 0},
1036 { DBGBUS_SSPP1, 26, 1},
1037
1038 /* scale */
1039 { DBGBUS_SSPP0, 16, 0},
1040 { DBGBUS_SSPP0, 16, 1},
1041 { DBGBUS_SSPP0, 36, 0},
1042 { DBGBUS_SSPP0, 36, 1},
1043 { DBGBUS_SSPP1, 16, 0},
1044 { DBGBUS_SSPP1, 16, 1},
1045 { DBGBUS_SSPP1, 36, 0},
1046 { DBGBUS_SSPP1, 36, 1},
1047
1048 /* fetch sspp0 */
1049
1050 /* vig 0 */
1051 { DBGBUS_SSPP0, 0, 0 },
1052 { DBGBUS_SSPP0, 0, 1 },
1053 { DBGBUS_SSPP0, 0, 2 },
1054 { DBGBUS_SSPP0, 0, 3 },
1055 { DBGBUS_SSPP0, 0, 4 },
1056 { DBGBUS_SSPP0, 0, 5 },
1057 { DBGBUS_SSPP0, 0, 6 },
1058 { DBGBUS_SSPP0, 0, 7 },
1059
1060 { DBGBUS_SSPP0, 1, 0 },
1061 { DBGBUS_SSPP0, 1, 1 },
1062 { DBGBUS_SSPP0, 1, 2 },
1063 { DBGBUS_SSPP0, 1, 3 },
1064 { DBGBUS_SSPP0, 1, 4 },
1065 { DBGBUS_SSPP0, 1, 5 },
1066 { DBGBUS_SSPP0, 1, 6 },
1067 { DBGBUS_SSPP0, 1, 7 },
1068
1069 { DBGBUS_SSPP0, 2, 0 },
1070 { DBGBUS_SSPP0, 2, 1 },
1071 { DBGBUS_SSPP0, 2, 2 },
1072 { DBGBUS_SSPP0, 2, 3 },
1073 { DBGBUS_SSPP0, 2, 4 },
1074 { DBGBUS_SSPP0, 2, 5 },
1075 { DBGBUS_SSPP0, 2, 6 },
1076 { DBGBUS_SSPP0, 2, 7 },
1077
1078 { DBGBUS_SSPP0, 4, 0 },
1079 { DBGBUS_SSPP0, 4, 1 },
1080 { DBGBUS_SSPP0, 4, 2 },
1081 { DBGBUS_SSPP0, 4, 3 },
1082 { DBGBUS_SSPP0, 4, 4 },
1083 { DBGBUS_SSPP0, 4, 5 },
1084 { DBGBUS_SSPP0, 4, 6 },
1085 { DBGBUS_SSPP0, 4, 7 },
1086
1087 { DBGBUS_SSPP0, 5, 0 },
1088 { DBGBUS_SSPP0, 5, 1 },
1089 { DBGBUS_SSPP0, 5, 2 },
1090 { DBGBUS_SSPP0, 5, 3 },
1091 { DBGBUS_SSPP0, 5, 4 },
1092 { DBGBUS_SSPP0, 5, 5 },
1093 { DBGBUS_SSPP0, 5, 6 },
1094 { DBGBUS_SSPP0, 5, 7 },
1095
1096 /* vig 2 */
1097 { DBGBUS_SSPP0, 20, 0 },
1098 { DBGBUS_SSPP0, 20, 1 },
1099 { DBGBUS_SSPP0, 20, 2 },
1100 { DBGBUS_SSPP0, 20, 3 },
1101 { DBGBUS_SSPP0, 20, 4 },
1102 { DBGBUS_SSPP0, 20, 5 },
1103 { DBGBUS_SSPP0, 20, 6 },
1104 { DBGBUS_SSPP0, 20, 7 },
1105
1106 { DBGBUS_SSPP0, 21, 0 },
1107 { DBGBUS_SSPP0, 21, 1 },
1108 { DBGBUS_SSPP0, 21, 2 },
1109 { DBGBUS_SSPP0, 21, 3 },
1110 { DBGBUS_SSPP0, 21, 4 },
1111 { DBGBUS_SSPP0, 21, 5 },
1112 { DBGBUS_SSPP0, 21, 6 },
1113 { DBGBUS_SSPP0, 21, 7 },
1114
1115 { DBGBUS_SSPP0, 22, 0 },
1116 { DBGBUS_SSPP0, 22, 1 },
1117 { DBGBUS_SSPP0, 22, 2 },
1118 { DBGBUS_SSPP0, 22, 3 },
1119 { DBGBUS_SSPP0, 22, 4 },
1120 { DBGBUS_SSPP0, 22, 5 },
1121 { DBGBUS_SSPP0, 22, 6 },
1122 { DBGBUS_SSPP0, 22, 7 },
1123
1124 { DBGBUS_SSPP0, 24, 0 },
1125 { DBGBUS_SSPP0, 24, 1 },
1126 { DBGBUS_SSPP0, 24, 2 },
1127 { DBGBUS_SSPP0, 24, 3 },
1128 { DBGBUS_SSPP0, 24, 4 },
1129 { DBGBUS_SSPP0, 24, 5 },
1130 { DBGBUS_SSPP0, 24, 6 },
1131 { DBGBUS_SSPP0, 24, 7 },
1132
1133 { DBGBUS_SSPP0, 25, 0 },
1134 { DBGBUS_SSPP0, 25, 1 },
1135 { DBGBUS_SSPP0, 25, 2 },
1136 { DBGBUS_SSPP0, 25, 3 },
1137 { DBGBUS_SSPP0, 25, 4 },
1138 { DBGBUS_SSPP0, 25, 5 },
1139 { DBGBUS_SSPP0, 25, 6 },
1140 { DBGBUS_SSPP0, 25, 7 },
1141
1142 /* dma 2 */
1143 { DBGBUS_SSPP0, 30, 0 },
1144 { DBGBUS_SSPP0, 30, 1 },
1145 { DBGBUS_SSPP0, 30, 2 },
1146 { DBGBUS_SSPP0, 30, 3 },
1147 { DBGBUS_SSPP0, 30, 4 },
1148 { DBGBUS_SSPP0, 30, 5 },
1149 { DBGBUS_SSPP0, 30, 6 },
1150 { DBGBUS_SSPP0, 30, 7 },
1151
1152 { DBGBUS_SSPP0, 31, 0 },
1153 { DBGBUS_SSPP0, 31, 1 },
1154 { DBGBUS_SSPP0, 31, 2 },
1155 { DBGBUS_SSPP0, 31, 3 },
1156 { DBGBUS_SSPP0, 31, 4 },
1157 { DBGBUS_SSPP0, 31, 5 },
1158 { DBGBUS_SSPP0, 31, 6 },
1159 { DBGBUS_SSPP0, 31, 7 },
1160
1161 { DBGBUS_SSPP0, 32, 0 },
1162 { DBGBUS_SSPP0, 32, 1 },
1163 { DBGBUS_SSPP0, 32, 2 },
1164 { DBGBUS_SSPP0, 32, 3 },
1165 { DBGBUS_SSPP0, 32, 4 },
1166 { DBGBUS_SSPP0, 32, 5 },
1167 { DBGBUS_SSPP0, 32, 6 },
1168 { DBGBUS_SSPP0, 32, 7 },
1169
1170 { DBGBUS_SSPP0, 33, 0 },
1171 { DBGBUS_SSPP0, 33, 1 },
1172 { DBGBUS_SSPP0, 33, 2 },
1173 { DBGBUS_SSPP0, 33, 3 },
1174 { DBGBUS_SSPP0, 33, 4 },
1175 { DBGBUS_SSPP0, 33, 5 },
1176 { DBGBUS_SSPP0, 33, 6 },
1177 { DBGBUS_SSPP0, 33, 7 },
1178
1179 { DBGBUS_SSPP0, 34, 0 },
1180 { DBGBUS_SSPP0, 34, 1 },
1181 { DBGBUS_SSPP0, 34, 2 },
1182 { DBGBUS_SSPP0, 34, 3 },
1183 { DBGBUS_SSPP0, 34, 4 },
1184 { DBGBUS_SSPP0, 34, 5 },
1185 { DBGBUS_SSPP0, 34, 6 },
1186 { DBGBUS_SSPP0, 34, 7 },
1187
1188 { DBGBUS_SSPP0, 35, 0 },
1189 { DBGBUS_SSPP0, 35, 1 },
1190 { DBGBUS_SSPP0, 35, 2 },
1191 { DBGBUS_SSPP0, 35, 3 },
1192
1193 /* dma 0 */
1194 { DBGBUS_SSPP0, 40, 0 },
1195 { DBGBUS_SSPP0, 40, 1 },
1196 { DBGBUS_SSPP0, 40, 2 },
1197 { DBGBUS_SSPP0, 40, 3 },
1198 { DBGBUS_SSPP0, 40, 4 },
1199 { DBGBUS_SSPP0, 40, 5 },
1200 { DBGBUS_SSPP0, 40, 6 },
1201 { DBGBUS_SSPP0, 40, 7 },
1202
1203 { DBGBUS_SSPP0, 41, 0 },
1204 { DBGBUS_SSPP0, 41, 1 },
1205 { DBGBUS_SSPP0, 41, 2 },
1206 { DBGBUS_SSPP0, 41, 3 },
1207 { DBGBUS_SSPP0, 41, 4 },
1208 { DBGBUS_SSPP0, 41, 5 },
1209 { DBGBUS_SSPP0, 41, 6 },
1210 { DBGBUS_SSPP0, 41, 7 },
1211
1212 { DBGBUS_SSPP0, 42, 0 },
1213 { DBGBUS_SSPP0, 42, 1 },
1214 { DBGBUS_SSPP0, 42, 2 },
1215 { DBGBUS_SSPP0, 42, 3 },
1216 { DBGBUS_SSPP0, 42, 4 },
1217 { DBGBUS_SSPP0, 42, 5 },
1218 { DBGBUS_SSPP0, 42, 6 },
1219 { DBGBUS_SSPP0, 42, 7 },
1220
1221 { DBGBUS_SSPP0, 44, 0 },
1222 { DBGBUS_SSPP0, 44, 1 },
1223 { DBGBUS_SSPP0, 44, 2 },
1224 { DBGBUS_SSPP0, 44, 3 },
1225 { DBGBUS_SSPP0, 44, 4 },
1226 { DBGBUS_SSPP0, 44, 5 },
1227 { DBGBUS_SSPP0, 44, 6 },
1228 { DBGBUS_SSPP0, 44, 7 },
1229
1230 { DBGBUS_SSPP0, 45, 0 },
1231 { DBGBUS_SSPP0, 45, 1 },
1232 { DBGBUS_SSPP0, 45, 2 },
1233 { DBGBUS_SSPP0, 45, 3 },
1234 { DBGBUS_SSPP0, 45, 4 },
1235 { DBGBUS_SSPP0, 45, 5 },
1236 { DBGBUS_SSPP0, 45, 6 },
1237 { DBGBUS_SSPP0, 45, 7 },
1238
1239 /* fetch sspp1 */
1240 /* vig 1 */
1241 { DBGBUS_SSPP1, 0, 0 },
1242 { DBGBUS_SSPP1, 0, 1 },
1243 { DBGBUS_SSPP1, 0, 2 },
1244 { DBGBUS_SSPP1, 0, 3 },
1245 { DBGBUS_SSPP1, 0, 4 },
1246 { DBGBUS_SSPP1, 0, 5 },
1247 { DBGBUS_SSPP1, 0, 6 },
1248 { DBGBUS_SSPP1, 0, 7 },
1249
1250 { DBGBUS_SSPP1, 1, 0 },
1251 { DBGBUS_SSPP1, 1, 1 },
1252 { DBGBUS_SSPP1, 1, 2 },
1253 { DBGBUS_SSPP1, 1, 3 },
1254 { DBGBUS_SSPP1, 1, 4 },
1255 { DBGBUS_SSPP1, 1, 5 },
1256 { DBGBUS_SSPP1, 1, 6 },
1257 { DBGBUS_SSPP1, 1, 7 },
1258
1259 { DBGBUS_SSPP1, 2, 0 },
1260 { DBGBUS_SSPP1, 2, 1 },
1261 { DBGBUS_SSPP1, 2, 2 },
1262 { DBGBUS_SSPP1, 2, 3 },
1263 { DBGBUS_SSPP1, 2, 4 },
1264 { DBGBUS_SSPP1, 2, 5 },
1265 { DBGBUS_SSPP1, 2, 6 },
1266 { DBGBUS_SSPP1, 2, 7 },
1267
1268 { DBGBUS_SSPP1, 4, 0 },
1269 { DBGBUS_SSPP1, 4, 1 },
1270 { DBGBUS_SSPP1, 4, 2 },
1271 { DBGBUS_SSPP1, 4, 3 },
1272 { DBGBUS_SSPP1, 4, 4 },
1273 { DBGBUS_SSPP1, 4, 5 },
1274 { DBGBUS_SSPP1, 4, 6 },
1275 { DBGBUS_SSPP1, 4, 7 },
1276
1277 { DBGBUS_SSPP1, 5, 0 },
1278 { DBGBUS_SSPP1, 5, 1 },
1279 { DBGBUS_SSPP1, 5, 2 },
1280 { DBGBUS_SSPP1, 5, 3 },
1281 { DBGBUS_SSPP1, 5, 4 },
1282 { DBGBUS_SSPP1, 5, 5 },
1283 { DBGBUS_SSPP1, 5, 6 },
1284 { DBGBUS_SSPP1, 5, 7 },
1285
1286 /* vig 3 */
1287 { DBGBUS_SSPP1, 20, 0 },
1288 { DBGBUS_SSPP1, 20, 1 },
1289 { DBGBUS_SSPP1, 20, 2 },
1290 { DBGBUS_SSPP1, 20, 3 },
1291 { DBGBUS_SSPP1, 20, 4 },
1292 { DBGBUS_SSPP1, 20, 5 },
1293 { DBGBUS_SSPP1, 20, 6 },
1294 { DBGBUS_SSPP1, 20, 7 },
1295
1296 { DBGBUS_SSPP1, 21, 0 },
1297 { DBGBUS_SSPP1, 21, 1 },
1298 { DBGBUS_SSPP1, 21, 2 },
1299 { DBGBUS_SSPP1, 21, 3 },
1300 { DBGBUS_SSPP1, 21, 4 },
1301 { DBGBUS_SSPP1, 21, 5 },
1302 { DBGBUS_SSPP1, 21, 6 },
1303 { DBGBUS_SSPP1, 21, 7 },
1304
1305 { DBGBUS_SSPP1, 22, 0 },
1306 { DBGBUS_SSPP1, 22, 1 },
1307 { DBGBUS_SSPP1, 22, 2 },
1308 { DBGBUS_SSPP1, 22, 3 },
1309 { DBGBUS_SSPP1, 22, 4 },
1310 { DBGBUS_SSPP1, 22, 5 },
1311 { DBGBUS_SSPP1, 22, 6 },
1312 { DBGBUS_SSPP1, 22, 7 },
1313
1314 { DBGBUS_SSPP1, 24, 0 },
1315 { DBGBUS_SSPP1, 24, 1 },
1316 { DBGBUS_SSPP1, 24, 2 },
1317 { DBGBUS_SSPP1, 24, 3 },
1318 { DBGBUS_SSPP1, 24, 4 },
1319 { DBGBUS_SSPP1, 24, 5 },
1320 { DBGBUS_SSPP1, 24, 6 },
1321 { DBGBUS_SSPP1, 24, 7 },
1322
1323 { DBGBUS_SSPP1, 25, 0 },
1324 { DBGBUS_SSPP1, 25, 1 },
1325 { DBGBUS_SSPP1, 25, 2 },
1326 { DBGBUS_SSPP1, 25, 3 },
1327 { DBGBUS_SSPP1, 25, 4 },
1328 { DBGBUS_SSPP1, 25, 5 },
1329 { DBGBUS_SSPP1, 25, 6 },
1330 { DBGBUS_SSPP1, 25, 7 },
1331
1332 /* dma 3 */
1333 { DBGBUS_SSPP1, 30, 0 },
1334 { DBGBUS_SSPP1, 30, 1 },
1335 { DBGBUS_SSPP1, 30, 2 },
1336 { DBGBUS_SSPP1, 30, 3 },
1337 { DBGBUS_SSPP1, 30, 4 },
1338 { DBGBUS_SSPP1, 30, 5 },
1339 { DBGBUS_SSPP1, 30, 6 },
1340 { DBGBUS_SSPP1, 30, 7 },
1341
1342 { DBGBUS_SSPP1, 31, 0 },
1343 { DBGBUS_SSPP1, 31, 1 },
1344 { DBGBUS_SSPP1, 31, 2 },
1345 { DBGBUS_SSPP1, 31, 3 },
1346 { DBGBUS_SSPP1, 31, 4 },
1347 { DBGBUS_SSPP1, 31, 5 },
1348 { DBGBUS_SSPP1, 31, 6 },
1349 { DBGBUS_SSPP1, 31, 7 },
1350
1351 { DBGBUS_SSPP1, 32, 0 },
1352 { DBGBUS_SSPP1, 32, 1 },
1353 { DBGBUS_SSPP1, 32, 2 },
1354 { DBGBUS_SSPP1, 32, 3 },
1355 { DBGBUS_SSPP1, 32, 4 },
1356 { DBGBUS_SSPP1, 32, 5 },
1357 { DBGBUS_SSPP1, 32, 6 },
1358 { DBGBUS_SSPP1, 32, 7 },
1359
1360 { DBGBUS_SSPP1, 33, 0 },
1361 { DBGBUS_SSPP1, 33, 1 },
1362 { DBGBUS_SSPP1, 33, 2 },
1363 { DBGBUS_SSPP1, 33, 3 },
1364 { DBGBUS_SSPP1, 33, 4 },
1365 { DBGBUS_SSPP1, 33, 5 },
1366 { DBGBUS_SSPP1, 33, 6 },
1367 { DBGBUS_SSPP1, 33, 7 },
1368
1369 { DBGBUS_SSPP1, 34, 0 },
1370 { DBGBUS_SSPP1, 34, 1 },
1371 { DBGBUS_SSPP1, 34, 2 },
1372 { DBGBUS_SSPP1, 34, 3 },
1373 { DBGBUS_SSPP1, 34, 4 },
1374 { DBGBUS_SSPP1, 34, 5 },
1375 { DBGBUS_SSPP1, 34, 6 },
1376 { DBGBUS_SSPP1, 34, 7 },
1377
1378 { DBGBUS_SSPP1, 35, 0 },
1379 { DBGBUS_SSPP1, 35, 1 },
1380 { DBGBUS_SSPP1, 35, 2 },
1381
1382 /* dma 1 */
1383 { DBGBUS_SSPP1, 40, 0 },
1384 { DBGBUS_SSPP1, 40, 1 },
1385 { DBGBUS_SSPP1, 40, 2 },
1386 { DBGBUS_SSPP1, 40, 3 },
1387 { DBGBUS_SSPP1, 40, 4 },
1388 { DBGBUS_SSPP1, 40, 5 },
1389 { DBGBUS_SSPP1, 40, 6 },
1390 { DBGBUS_SSPP1, 40, 7 },
1391
1392 { DBGBUS_SSPP1, 41, 0 },
1393 { DBGBUS_SSPP1, 41, 1 },
1394 { DBGBUS_SSPP1, 41, 2 },
1395 { DBGBUS_SSPP1, 41, 3 },
1396 { DBGBUS_SSPP1, 41, 4 },
1397 { DBGBUS_SSPP1, 41, 5 },
1398 { DBGBUS_SSPP1, 41, 6 },
1399 { DBGBUS_SSPP1, 41, 7 },
1400
1401 { DBGBUS_SSPP1, 42, 0 },
1402 { DBGBUS_SSPP1, 42, 1 },
1403 { DBGBUS_SSPP1, 42, 2 },
1404 { DBGBUS_SSPP1, 42, 3 },
1405 { DBGBUS_SSPP1, 42, 4 },
1406 { DBGBUS_SSPP1, 42, 5 },
1407 { DBGBUS_SSPP1, 42, 6 },
1408 { DBGBUS_SSPP1, 42, 7 },
1409
1410 { DBGBUS_SSPP1, 44, 0 },
1411 { DBGBUS_SSPP1, 44, 1 },
1412 { DBGBUS_SSPP1, 44, 2 },
1413 { DBGBUS_SSPP1, 44, 3 },
1414 { DBGBUS_SSPP1, 44, 4 },
1415 { DBGBUS_SSPP1, 44, 5 },
1416 { DBGBUS_SSPP1, 44, 6 },
1417 { DBGBUS_SSPP1, 44, 7 },
1418
1419 { DBGBUS_SSPP1, 45, 0 },
1420 { DBGBUS_SSPP1, 45, 1 },
1421 { DBGBUS_SSPP1, 45, 2 },
1422 { DBGBUS_SSPP1, 45, 3 },
1423 { DBGBUS_SSPP1, 45, 4 },
1424 { DBGBUS_SSPP1, 45, 5 },
1425 { DBGBUS_SSPP1, 45, 6 },
1426 { DBGBUS_SSPP1, 45, 7 },
1427
1428 /* dspp */
1429 { DBGBUS_DSPP, 13, 0 },
1430 { DBGBUS_DSPP, 19, 0 },
1431 { DBGBUS_DSPP, 14, 0 },
1432 { DBGBUS_DSPP, 14, 1 },
1433 { DBGBUS_DSPP, 14, 3 },
1434 { DBGBUS_DSPP, 20, 0 },
1435 { DBGBUS_DSPP, 20, 1 },
1436 { DBGBUS_DSPP, 20, 3 },
1437
1438 /* ppb_0 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1439 { DBGBUS_DSPP, 31, 0, _sde_debug_bus_ppb0_dump },
1440 { DBGBUS_DSPP, 33, 0, _sde_debug_bus_ppb0_dump },
1441 { DBGBUS_DSPP, 35, 0, _sde_debug_bus_ppb0_dump },
1442 { DBGBUS_DSPP, 42, 0, _sde_debug_bus_ppb0_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1443
1444 /* ppb_1 */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1445 { DBGBUS_DSPP, 32, 0, _sde_debug_bus_ppb1_dump },
1446 { DBGBUS_DSPP, 34, 0, _sde_debug_bus_ppb1_dump },
1447 { DBGBUS_DSPP, 36, 0, _sde_debug_bus_ppb1_dump },
1448 { DBGBUS_DSPP, 43, 0, _sde_debug_bus_ppb1_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1449
1450 /* lm_lut */
1451 { DBGBUS_DSPP, 109, 0 },
1452 { DBGBUS_DSPP, 105, 0 },
1453 { DBGBUS_DSPP, 103, 0 },
1454
1455 /* crossbar */
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1456 { DBGBUS_DSPP, 0, 0, _sde_debug_bus_xbar_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1457
1458 /* rotator */
1459 { DBGBUS_DSPP, 9, 0},
1460
1461 /* blend */
1462 /* LM0 */
1463 { DBGBUS_DSPP, 63, 1},
1464 { DBGBUS_DSPP, 63, 2},
1465 { DBGBUS_DSPP, 63, 3},
1466 { DBGBUS_DSPP, 63, 4},
1467 { DBGBUS_DSPP, 63, 5},
1468 { DBGBUS_DSPP, 63, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1469 { DBGBUS_DSPP, 63, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1470
1471 { DBGBUS_DSPP, 64, 1},
1472 { DBGBUS_DSPP, 64, 2},
1473 { DBGBUS_DSPP, 64, 3},
1474 { DBGBUS_DSPP, 64, 4},
1475 { DBGBUS_DSPP, 64, 5},
1476 { DBGBUS_DSPP, 64, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1477 { DBGBUS_DSPP, 64, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1478
1479 { DBGBUS_DSPP, 65, 1},
1480 { DBGBUS_DSPP, 65, 2},
1481 { DBGBUS_DSPP, 65, 3},
1482 { DBGBUS_DSPP, 65, 4},
1483 { DBGBUS_DSPP, 65, 5},
1484 { DBGBUS_DSPP, 65, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1485 { DBGBUS_DSPP, 65, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1486
1487 { DBGBUS_DSPP, 66, 1},
1488 { DBGBUS_DSPP, 66, 2},
1489 { DBGBUS_DSPP, 66, 3},
1490 { DBGBUS_DSPP, 66, 4},
1491 { DBGBUS_DSPP, 66, 5},
1492 { DBGBUS_DSPP, 66, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1493 { DBGBUS_DSPP, 66, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1494
1495 { DBGBUS_DSPP, 67, 1},
1496 { DBGBUS_DSPP, 67, 2},
1497 { DBGBUS_DSPP, 67, 3},
1498 { DBGBUS_DSPP, 67, 4},
1499 { DBGBUS_DSPP, 67, 5},
1500 { DBGBUS_DSPP, 67, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1501 { DBGBUS_DSPP, 67, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1502
1503 { DBGBUS_DSPP, 68, 1},
1504 { DBGBUS_DSPP, 68, 2},
1505 { DBGBUS_DSPP, 68, 3},
1506 { DBGBUS_DSPP, 68, 4},
1507 { DBGBUS_DSPP, 68, 5},
1508 { DBGBUS_DSPP, 68, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1509 { DBGBUS_DSPP, 68, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1510
1511 { DBGBUS_DSPP, 69, 1},
1512 { DBGBUS_DSPP, 69, 2},
1513 { DBGBUS_DSPP, 69, 3},
1514 { DBGBUS_DSPP, 69, 4},
1515 { DBGBUS_DSPP, 69, 5},
1516 { DBGBUS_DSPP, 69, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1517 { DBGBUS_DSPP, 69, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1518
1519 { DBGBUS_DSPP, 84, 1},
1520 { DBGBUS_DSPP, 84, 2},
1521 { DBGBUS_DSPP, 84, 3},
1522 { DBGBUS_DSPP, 84, 4},
1523 { DBGBUS_DSPP, 84, 5},
1524 { DBGBUS_DSPP, 84, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1525 { DBGBUS_DSPP, 84, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1526
1527
1528 { DBGBUS_DSPP, 85, 1},
1529 { DBGBUS_DSPP, 85, 2},
1530 { DBGBUS_DSPP, 85, 3},
1531 { DBGBUS_DSPP, 85, 4},
1532 { DBGBUS_DSPP, 85, 5},
1533 { DBGBUS_DSPP, 85, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1534 { DBGBUS_DSPP, 85, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1535
1536
1537 { DBGBUS_DSPP, 86, 1},
1538 { DBGBUS_DSPP, 86, 2},
1539 { DBGBUS_DSPP, 86, 3},
1540 { DBGBUS_DSPP, 86, 4},
1541 { DBGBUS_DSPP, 86, 5},
1542 { DBGBUS_DSPP, 86, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1543 { DBGBUS_DSPP, 86, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1544
1545
1546 { DBGBUS_DSPP, 87, 1},
1547 { DBGBUS_DSPP, 87, 2},
1548 { DBGBUS_DSPP, 87, 3},
1549 { DBGBUS_DSPP, 87, 4},
1550 { DBGBUS_DSPP, 87, 5},
1551 { DBGBUS_DSPP, 87, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1552 { DBGBUS_DSPP, 87, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1553
1554 /* LM1 */
1555 { DBGBUS_DSPP, 70, 1},
1556 { DBGBUS_DSPP, 70, 2},
1557 { DBGBUS_DSPP, 70, 3},
1558 { DBGBUS_DSPP, 70, 4},
1559 { DBGBUS_DSPP, 70, 5},
1560 { DBGBUS_DSPP, 70, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1561 { DBGBUS_DSPP, 70, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1562
1563 { DBGBUS_DSPP, 71, 1},
1564 { DBGBUS_DSPP, 71, 2},
1565 { DBGBUS_DSPP, 71, 3},
1566 { DBGBUS_DSPP, 71, 4},
1567 { DBGBUS_DSPP, 71, 5},
1568 { DBGBUS_DSPP, 71, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1569 { DBGBUS_DSPP, 71, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1570
1571 { DBGBUS_DSPP, 72, 1},
1572 { DBGBUS_DSPP, 72, 2},
1573 { DBGBUS_DSPP, 72, 3},
1574 { DBGBUS_DSPP, 72, 4},
1575 { DBGBUS_DSPP, 72, 5},
1576 { DBGBUS_DSPP, 72, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1577 { DBGBUS_DSPP, 72, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1578
1579 { DBGBUS_DSPP, 73, 1},
1580 { DBGBUS_DSPP, 73, 2},
1581 { DBGBUS_DSPP, 73, 3},
1582 { DBGBUS_DSPP, 73, 4},
1583 { DBGBUS_DSPP, 73, 5},
1584 { DBGBUS_DSPP, 73, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1585 { DBGBUS_DSPP, 73, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1586
1587 { DBGBUS_DSPP, 74, 1},
1588 { DBGBUS_DSPP, 74, 2},
1589 { DBGBUS_DSPP, 74, 3},
1590 { DBGBUS_DSPP, 74, 4},
1591 { DBGBUS_DSPP, 74, 5},
1592 { DBGBUS_DSPP, 74, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1593 { DBGBUS_DSPP, 74, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1594
1595 { DBGBUS_DSPP, 75, 1},
1596 { DBGBUS_DSPP, 75, 2},
1597 { DBGBUS_DSPP, 75, 3},
1598 { DBGBUS_DSPP, 75, 4},
1599 { DBGBUS_DSPP, 75, 5},
1600 { DBGBUS_DSPP, 75, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1601 { DBGBUS_DSPP, 75, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1602
1603 { DBGBUS_DSPP, 76, 1},
1604 { DBGBUS_DSPP, 76, 2},
1605 { DBGBUS_DSPP, 76, 3},
1606 { DBGBUS_DSPP, 76, 4},
1607 { DBGBUS_DSPP, 76, 5},
1608 { DBGBUS_DSPP, 76, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1609 { DBGBUS_DSPP, 76, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1610
1611 { DBGBUS_DSPP, 88, 1},
1612 { DBGBUS_DSPP, 88, 2},
1613 { DBGBUS_DSPP, 88, 3},
1614 { DBGBUS_DSPP, 88, 4},
1615 { DBGBUS_DSPP, 88, 5},
1616 { DBGBUS_DSPP, 88, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1617 { DBGBUS_DSPP, 88, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1618
1619 { DBGBUS_DSPP, 89, 1},
1620 { DBGBUS_DSPP, 89, 2},
1621 { DBGBUS_DSPP, 89, 3},
1622 { DBGBUS_DSPP, 89, 4},
1623 { DBGBUS_DSPP, 89, 5},
1624 { DBGBUS_DSPP, 89, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1625 { DBGBUS_DSPP, 89, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1626
1627 { DBGBUS_DSPP, 90, 1},
1628 { DBGBUS_DSPP, 90, 2},
1629 { DBGBUS_DSPP, 90, 3},
1630 { DBGBUS_DSPP, 90, 4},
1631 { DBGBUS_DSPP, 90, 5},
1632 { DBGBUS_DSPP, 90, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1633 { DBGBUS_DSPP, 90, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1634
1635 { DBGBUS_DSPP, 91, 1},
1636 { DBGBUS_DSPP, 91, 2},
1637 { DBGBUS_DSPP, 91, 3},
1638 { DBGBUS_DSPP, 91, 4},
1639 { DBGBUS_DSPP, 91, 5},
1640 { DBGBUS_DSPP, 91, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1641 { DBGBUS_DSPP, 91, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1642
1643 /* LM2 */
1644 { DBGBUS_DSPP, 77, 0},
1645 { DBGBUS_DSPP, 77, 1},
1646 { DBGBUS_DSPP, 77, 2},
1647 { DBGBUS_DSPP, 77, 3},
1648 { DBGBUS_DSPP, 77, 4},
1649 { DBGBUS_DSPP, 77, 5},
1650 { DBGBUS_DSPP, 77, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1651 { DBGBUS_DSPP, 77, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1652
1653 { DBGBUS_DSPP, 78, 0},
1654 { DBGBUS_DSPP, 78, 1},
1655 { DBGBUS_DSPP, 78, 2},
1656 { DBGBUS_DSPP, 78, 3},
1657 { DBGBUS_DSPP, 78, 4},
1658 { DBGBUS_DSPP, 78, 5},
1659 { DBGBUS_DSPP, 78, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1660 { DBGBUS_DSPP, 78, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1661
1662 { DBGBUS_DSPP, 79, 0},
1663 { DBGBUS_DSPP, 79, 1},
1664 { DBGBUS_DSPP, 79, 2},
1665 { DBGBUS_DSPP, 79, 3},
1666 { DBGBUS_DSPP, 79, 4},
1667 { DBGBUS_DSPP, 79, 5},
1668 { DBGBUS_DSPP, 79, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1669 { DBGBUS_DSPP, 79, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1670
1671 { DBGBUS_DSPP, 80, 0},
1672 { DBGBUS_DSPP, 80, 1},
1673 { DBGBUS_DSPP, 80, 2},
1674 { DBGBUS_DSPP, 80, 3},
1675 { DBGBUS_DSPP, 80, 4},
1676 { DBGBUS_DSPP, 80, 5},
1677 { DBGBUS_DSPP, 80, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1678 { DBGBUS_DSPP, 80, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1679
1680 { DBGBUS_DSPP, 81, 0},
1681 { DBGBUS_DSPP, 81, 1},
1682 { DBGBUS_DSPP, 81, 2},
1683 { DBGBUS_DSPP, 81, 3},
1684 { DBGBUS_DSPP, 81, 4},
1685 { DBGBUS_DSPP, 81, 5},
1686 { DBGBUS_DSPP, 81, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1687 { DBGBUS_DSPP, 81, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1688
1689 { DBGBUS_DSPP, 82, 0},
1690 { DBGBUS_DSPP, 82, 1},
1691 { DBGBUS_DSPP, 82, 2},
1692 { DBGBUS_DSPP, 82, 3},
1693 { DBGBUS_DSPP, 82, 4},
1694 { DBGBUS_DSPP, 82, 5},
1695 { DBGBUS_DSPP, 82, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1696 { DBGBUS_DSPP, 82, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1697
1698 { DBGBUS_DSPP, 83, 0},
1699 { DBGBUS_DSPP, 83, 1},
1700 { DBGBUS_DSPP, 83, 2},
1701 { DBGBUS_DSPP, 83, 3},
1702 { DBGBUS_DSPP, 83, 4},
1703 { DBGBUS_DSPP, 83, 5},
1704 { DBGBUS_DSPP, 83, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1705 { DBGBUS_DSPP, 83, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1706
1707 { DBGBUS_DSPP, 92, 1},
1708 { DBGBUS_DSPP, 92, 2},
1709 { DBGBUS_DSPP, 92, 3},
1710 { DBGBUS_DSPP, 92, 4},
1711 { DBGBUS_DSPP, 92, 5},
1712 { DBGBUS_DSPP, 92, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1713 { DBGBUS_DSPP, 92, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1714
1715 { DBGBUS_DSPP, 93, 1},
1716 { DBGBUS_DSPP, 93, 2},
1717 { DBGBUS_DSPP, 93, 3},
1718 { DBGBUS_DSPP, 93, 4},
1719 { DBGBUS_DSPP, 93, 5},
1720 { DBGBUS_DSPP, 93, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1721 { DBGBUS_DSPP, 93, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1722
1723 { DBGBUS_DSPP, 94, 1},
1724 { DBGBUS_DSPP, 94, 2},
1725 { DBGBUS_DSPP, 94, 3},
1726 { DBGBUS_DSPP, 94, 4},
1727 { DBGBUS_DSPP, 94, 5},
1728 { DBGBUS_DSPP, 94, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1729 { DBGBUS_DSPP, 94, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1730
1731 { DBGBUS_DSPP, 95, 1},
1732 { DBGBUS_DSPP, 95, 2},
1733 { DBGBUS_DSPP, 95, 3},
1734 { DBGBUS_DSPP, 95, 4},
1735 { DBGBUS_DSPP, 95, 5},
1736 { DBGBUS_DSPP, 95, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1737 { DBGBUS_DSPP, 95, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1738
1739 /* LM5 */
1740 { DBGBUS_DSPP, 110, 1},
1741 { DBGBUS_DSPP, 110, 2},
1742 { DBGBUS_DSPP, 110, 3},
1743 { DBGBUS_DSPP, 110, 4},
1744 { DBGBUS_DSPP, 110, 5},
1745 { DBGBUS_DSPP, 110, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1746 { DBGBUS_DSPP, 110, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1747
1748 { DBGBUS_DSPP, 111, 1},
1749 { DBGBUS_DSPP, 111, 2},
1750 { DBGBUS_DSPP, 111, 3},
1751 { DBGBUS_DSPP, 111, 4},
1752 { DBGBUS_DSPP, 111, 5},
1753 { DBGBUS_DSPP, 111, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1754 { DBGBUS_DSPP, 111, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1755
1756 { DBGBUS_DSPP, 112, 1},
1757 { DBGBUS_DSPP, 112, 2},
1758 { DBGBUS_DSPP, 112, 3},
1759 { DBGBUS_DSPP, 112, 4},
1760 { DBGBUS_DSPP, 112, 5},
1761 { DBGBUS_DSPP, 112, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1762 { DBGBUS_DSPP, 112, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1763
1764 { DBGBUS_DSPP, 113, 1},
1765 { DBGBUS_DSPP, 113, 2},
1766 { DBGBUS_DSPP, 113, 3},
1767 { DBGBUS_DSPP, 113, 4},
1768 { DBGBUS_DSPP, 113, 5},
1769 { DBGBUS_DSPP, 113, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1770 { DBGBUS_DSPP, 113, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1771
1772 { DBGBUS_DSPP, 114, 1},
1773 { DBGBUS_DSPP, 114, 2},
1774 { DBGBUS_DSPP, 114, 3},
1775 { DBGBUS_DSPP, 114, 4},
1776 { DBGBUS_DSPP, 114, 5},
1777 { DBGBUS_DSPP, 114, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1778 { DBGBUS_DSPP, 114, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1779
1780 { DBGBUS_DSPP, 115, 1},
1781 { DBGBUS_DSPP, 115, 2},
1782 { DBGBUS_DSPP, 115, 3},
1783 { DBGBUS_DSPP, 115, 4},
1784 { DBGBUS_DSPP, 115, 5},
1785 { DBGBUS_DSPP, 115, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1786 { DBGBUS_DSPP, 115, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1787
1788 { DBGBUS_DSPP, 116, 1},
1789 { DBGBUS_DSPP, 116, 2},
1790 { DBGBUS_DSPP, 116, 3},
1791 { DBGBUS_DSPP, 116, 4},
1792 { DBGBUS_DSPP, 116, 5},
1793 { DBGBUS_DSPP, 116, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1794 { DBGBUS_DSPP, 116, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1795
1796 { DBGBUS_DSPP, 117, 1},
1797 { DBGBUS_DSPP, 117, 2},
1798 { DBGBUS_DSPP, 117, 3},
1799 { DBGBUS_DSPP, 117, 4},
1800 { DBGBUS_DSPP, 117, 5},
1801 { DBGBUS_DSPP, 117, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1802 { DBGBUS_DSPP, 117, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1803
1804 { DBGBUS_DSPP, 118, 1},
1805 { DBGBUS_DSPP, 118, 2},
1806 { DBGBUS_DSPP, 118, 3},
1807 { DBGBUS_DSPP, 118, 4},
1808 { DBGBUS_DSPP, 118, 5},
1809 { DBGBUS_DSPP, 118, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1810 { DBGBUS_DSPP, 118, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1811
1812 { DBGBUS_DSPP, 119, 1},
1813 { DBGBUS_DSPP, 119, 2},
1814 { DBGBUS_DSPP, 119, 3},
1815 { DBGBUS_DSPP, 119, 4},
1816 { DBGBUS_DSPP, 119, 5},
1817 { DBGBUS_DSPP, 119, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1818 { DBGBUS_DSPP, 119, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1819
1820 { DBGBUS_DSPP, 120, 1},
1821 { DBGBUS_DSPP, 120, 2},
1822 { DBGBUS_DSPP, 120, 3},
1823 { DBGBUS_DSPP, 120, 4},
1824 { DBGBUS_DSPP, 120, 5},
1825 { DBGBUS_DSPP, 120, 6},
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]1826 { DBGBUS_DSPP, 120, 7, _sde_debug_bus_lm_dump },
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]1827
1828 /* csc */
1829 { DBGBUS_SSPP0, 7, 0},
1830 { DBGBUS_SSPP0, 7, 1},
1831 { DBGBUS_SSPP0, 27, 0},
1832 { DBGBUS_SSPP0, 27, 1},
1833 { DBGBUS_SSPP1, 7, 0},
1834 { DBGBUS_SSPP1, 7, 1},
1835 { DBGBUS_SSPP1, 27, 0},
1836 { DBGBUS_SSPP1, 27, 1},
1837
1838 /* pcc */
1839 { DBGBUS_SSPP0, 3, 3},
1840 { DBGBUS_SSPP0, 23, 3},
1841 { DBGBUS_SSPP0, 33, 3},
1842 { DBGBUS_SSPP0, 43, 3},
1843 { DBGBUS_SSPP1, 3, 3},
1844 { DBGBUS_SSPP1, 23, 3},
1845 { DBGBUS_SSPP1, 33, 3},
1846 { DBGBUS_SSPP1, 43, 3},
1847
1848 /* spa */
1849 { DBGBUS_SSPP0, 8, 0},
1850 { DBGBUS_SSPP0, 28, 0},
1851 { DBGBUS_SSPP1, 8, 0},
1852 { DBGBUS_SSPP1, 28, 0},
1853 { DBGBUS_DSPP, 13, 0},
1854 { DBGBUS_DSPP, 19, 0},
1855
1856 /* igc */
1857 { DBGBUS_SSPP0, 17, 0},
1858 { DBGBUS_SSPP0, 17, 1},
1859 { DBGBUS_SSPP0, 17, 3},
1860 { DBGBUS_SSPP0, 37, 0},
1861 { DBGBUS_SSPP0, 37, 1},
1862 { DBGBUS_SSPP0, 37, 3},
1863 { DBGBUS_SSPP0, 46, 0},
1864 { DBGBUS_SSPP0, 46, 1},
1865 { DBGBUS_SSPP0, 46, 3},
1866
1867 { DBGBUS_SSPP1, 17, 0},
1868 { DBGBUS_SSPP1, 17, 1},
1869 { DBGBUS_SSPP1, 17, 3},
1870 { DBGBUS_SSPP1, 37, 0},
1871 { DBGBUS_SSPP1, 37, 1},
1872 { DBGBUS_SSPP1, 37, 3},
1873 { DBGBUS_SSPP1, 46, 0},
1874 { DBGBUS_SSPP1, 46, 1},
1875 { DBGBUS_SSPP1, 46, 3},
1876
1877 { DBGBUS_DSPP, 14, 0},
1878 { DBGBUS_DSPP, 14, 1},
1879 { DBGBUS_DSPP, 14, 3},
1880 { DBGBUS_DSPP, 20, 0},
1881 { DBGBUS_DSPP, 20, 1},
1882 { DBGBUS_DSPP, 20, 3},
1883
1884 /* intf0-3 */
1885 { DBGBUS_PERIPH, 0, 0},
1886 { DBGBUS_PERIPH, 1, 0},
1887 { DBGBUS_PERIPH, 2, 0},
1888 { DBGBUS_PERIPH, 3, 0},
1889
1890 /* te counter wrapper */
1891 { DBGBUS_PERIPH, 60, 0},
1892
1893 /* dsc0 */
1894 { DBGBUS_PERIPH, 47, 0},
1895 { DBGBUS_PERIPH, 47, 1},
1896 { DBGBUS_PERIPH, 47, 2},
1897 { DBGBUS_PERIPH, 47, 3},
1898 { DBGBUS_PERIPH, 47, 4},
1899 { DBGBUS_PERIPH, 47, 5},
1900 { DBGBUS_PERIPH, 47, 6},
1901 { DBGBUS_PERIPH, 47, 7},
1902
1903 /* dsc1 */
1904 { DBGBUS_PERIPH, 48, 0},
1905 { DBGBUS_PERIPH, 48, 1},
1906 { DBGBUS_PERIPH, 48, 2},
1907 { DBGBUS_PERIPH, 48, 3},
1908 { DBGBUS_PERIPH, 48, 4},
1909 { DBGBUS_PERIPH, 48, 5},
1910 { DBGBUS_PERIPH, 48, 6},
1911 { DBGBUS_PERIPH, 48, 7},
1912
1913 /* dsc2 */
1914 { DBGBUS_PERIPH, 51, 0},
1915 { DBGBUS_PERIPH, 51, 1},
1916 { DBGBUS_PERIPH, 51, 2},
1917 { DBGBUS_PERIPH, 51, 3},
1918 { DBGBUS_PERIPH, 51, 4},
1919 { DBGBUS_PERIPH, 51, 5},
1920 { DBGBUS_PERIPH, 51, 6},
1921 { DBGBUS_PERIPH, 51, 7},
1922
1923 /* dsc3 */
1924 { DBGBUS_PERIPH, 52, 0},
1925 { DBGBUS_PERIPH, 52, 1},
1926 { DBGBUS_PERIPH, 52, 2},
1927 { DBGBUS_PERIPH, 52, 3},
1928 { DBGBUS_PERIPH, 52, 4},
1929 { DBGBUS_PERIPH, 52, 5},
1930 { DBGBUS_PERIPH, 52, 6},
1931 { DBGBUS_PERIPH, 52, 7},
1932
1933 /* tear-check */
1934 { DBGBUS_PERIPH, 63, 0 },
1935 { DBGBUS_PERIPH, 64, 0 },
1936 { DBGBUS_PERIPH, 65, 0 },
1937 { DBGBUS_PERIPH, 73, 0 },
1938 { DBGBUS_PERIPH, 74, 0 },
1939
1940 /* cdwn */
1941 { DBGBUS_PERIPH, 80, 0},
1942 { DBGBUS_PERIPH, 80, 1},
1943 { DBGBUS_PERIPH, 80, 2},
1944
1945 { DBGBUS_PERIPH, 81, 0},
1946 { DBGBUS_PERIPH, 81, 1},
1947 { DBGBUS_PERIPH, 81, 2},
1948
1949 { DBGBUS_PERIPH, 82, 0},
1950 { DBGBUS_PERIPH, 82, 1},
1951 { DBGBUS_PERIPH, 82, 2},
1952 { DBGBUS_PERIPH, 82, 3},
1953 { DBGBUS_PERIPH, 82, 4},
1954 { DBGBUS_PERIPH, 82, 5},
1955 { DBGBUS_PERIPH, 82, 6},
1956 { DBGBUS_PERIPH, 82, 7},
1957
1958 /* hdmi */
1959 { DBGBUS_PERIPH, 68, 0},
1960 { DBGBUS_PERIPH, 68, 1},
1961 { DBGBUS_PERIPH, 68, 2},
1962 { DBGBUS_PERIPH, 68, 3},
1963 { DBGBUS_PERIPH, 68, 4},
1964 { DBGBUS_PERIPH, 68, 5},
1965
1966 /* edp */
1967 { DBGBUS_PERIPH, 69, 0},
1968 { DBGBUS_PERIPH, 69, 1},
1969 { DBGBUS_PERIPH, 69, 2},
1970 { DBGBUS_PERIPH, 69, 3},
1971 { DBGBUS_PERIPH, 69, 4},
1972 { DBGBUS_PERIPH, 69, 5},
1973
1974 /* dsi0 */
1975 { DBGBUS_PERIPH, 70, 0},
1976 { DBGBUS_PERIPH, 70, 1},
1977 { DBGBUS_PERIPH, 70, 2},
1978 { DBGBUS_PERIPH, 70, 3},
1979 { DBGBUS_PERIPH, 70, 4},
1980 { DBGBUS_PERIPH, 70, 5},
1981
1982 /* dsi1 */
1983 { DBGBUS_PERIPH, 71, 0},
1984 { DBGBUS_PERIPH, 71, 1},
1985 { DBGBUS_PERIPH, 71, 2},
1986 { DBGBUS_PERIPH, 71, 3},
1987 { DBGBUS_PERIPH, 71, 4},
1988 { DBGBUS_PERIPH, 71, 5},
1989};
1990
1991static struct vbif_debug_bus_entry vbif_dbg_bus_msm8998[] = {
1992 {0x214, 0x21c, 16, 2, 0x0, 0xd}, /* arb clients */
1993 {0x214, 0x21c, 16, 2, 0x80, 0xc0}, /* arb clients */
1994 {0x214, 0x21c, 16, 2, 0x100, 0x140}, /* arb clients */
1995 {0x214, 0x21c, 0, 16, 0x0, 0xf}, /* xin blocks - axi side */
1996 {0x214, 0x21c, 0, 16, 0x80, 0xa4}, /* xin blocks - axi side */
1997 {0x214, 0x21c, 0, 15, 0x100, 0x124}, /* xin blocks - axi side */
1998 {0x21c, 0x214, 0, 14, 0, 0xc}, /* xin blocks - clock side */
1999};
2000
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2001/**
2002 * _sde_dbg_enable_power - use callback to turn power on for hw register access
2003 * @enable: whether to turn power on or off
2004 */
2005static inline void _sde_dbg_enable_power(int enable)
2006{
2007 if (!sde_dbg_base.power_ctrl.enable_fn)
2008 return;
2009 sde_dbg_base.power_ctrl.enable_fn(
2010 sde_dbg_base.power_ctrl.handle,
2011 sde_dbg_base.power_ctrl.client,
2012 enable);
2013}
2014
2015/**
2016 * _sde_dump_reg - helper function for dumping rotator register set content
2017 * @dump_name: register set name
2018 * @reg_dump_flag: dumping flag controlling in-log/memory dump location
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2019 * @base_addr: starting address of io region for calculating offsets to print
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2020 * @addr: starting address offset for dumping
2021 * @len_bytes: range of the register set
2022 * @dump_mem: output buffer for memory dump location option
2023 * @from_isr: whether being called from isr context
2024 */
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2025static void _sde_dump_reg(const char *dump_name, u32 reg_dump_flag,
2026 char *base_addr, char *addr, size_t len_bytes, u32 **dump_mem,
2027 bool from_isr)
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2028{
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2029 u32 in_log, in_mem, len_align, len_padded;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2030 u32 *dump_addr = NULL;
2031 char *end_addr;
2032 int i;
2033
Lloyd Atkinsonf3e8ef32017-03-22 18:49:49 -0400[diff] [blame]2034 if (!len_bytes)
2035 return;
2036
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2037 in_log = (reg_dump_flag & SDE_DBG_DUMP_IN_LOG);
2038 in_mem = (reg_dump_flag & SDE_DBG_DUMP_IN_MEM);
2039
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2040 pr_debug("%s: reg_dump_flag=%d in_log=%d in_mem=%d\n",
2041 dump_name, reg_dump_flag, in_log, in_mem);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2042
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2043 if (!in_log && !in_mem)
2044 return;
2045
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2046 if (in_log)
2047 dev_info(sde_dbg_base.dev, "%s: start_offset 0x%lx len 0x%zx\n",
2048 dump_name, addr - base_addr, len_bytes);
2049
2050 len_align = (len_bytes + REG_DUMP_ALIGN - 1) / REG_DUMP_ALIGN;
2051 len_padded = len_align * REG_DUMP_ALIGN;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2052 end_addr = addr + len_bytes;
2053
2054 if (in_mem) {
2055 if (dump_mem && !(*dump_mem)) {
2056 phys_addr_t phys = 0;
2057 *dump_mem = dma_alloc_coherent(sde_dbg_base.dev,
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2058 len_padded, &phys, GFP_KERNEL);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2059 }
2060
2061 if (dump_mem && *dump_mem) {
2062 dump_addr = *dump_mem;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2063 dev_info(sde_dbg_base.dev,
2064 "%s: start_addr:0x%pK len:0x%x reg_offset=0x%lx\n",
2065 dump_name, dump_addr, len_padded,
2066 addr - base_addr);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2067 } else {
2068 in_mem = 0;
2069 pr_err("dump_mem: kzalloc fails!\n");
2070 }
2071 }
2072
2073 if (!from_isr)
2074 _sde_dbg_enable_power(true);
2075
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2076 for (i = 0; i < len_align; i++) {
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2077 u32 x0, x4, x8, xc;
2078
2079 x0 = (addr < end_addr) ? readl_relaxed(addr + 0x0) : 0;
2080 x4 = (addr + 0x4 < end_addr) ? readl_relaxed(addr + 0x4) : 0;
2081 x8 = (addr + 0x8 < end_addr) ? readl_relaxed(addr + 0x8) : 0;
2082 xc = (addr + 0xc < end_addr) ? readl_relaxed(addr + 0xc) : 0;
2083
2084 if (in_log)
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2085 dev_info(sde_dbg_base.dev,
2086 "0x%lx : %08x %08x %08x %08x\n",
2087 addr - base_addr, x0, x4, x8, xc);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2088
2089 if (dump_addr) {
2090 dump_addr[i * 4] = x0;
2091 dump_addr[i * 4 + 1] = x4;
2092 dump_addr[i * 4 + 2] = x8;
2093 dump_addr[i * 4 + 3] = xc;
2094 }
2095
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2096 addr += REG_DUMP_ALIGN;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2097 }
2098
2099 if (!from_isr)
2100 _sde_dbg_enable_power(false);
2101}
2102
2103/**
2104 * _sde_dbg_get_dump_range - helper to retrieve dump length for a range node
2105 * @range_node: range node to dump
2106 * @max_offset: max offset of the register base
2107 * @Return: length
2108 */
2109static u32 _sde_dbg_get_dump_range(struct sde_dbg_reg_offset *range_node,
2110 size_t max_offset)
2111{
2112 u32 length = 0;
2113
2114 if ((range_node->start > range_node->end) ||
2115 (range_node->end > max_offset) || (range_node->start == 0
2116 && range_node->end == 0)) {
2117 length = max_offset;
2118 } else {
2119 length = range_node->end - range_node->start;
2120 }
2121
2122 return length;
2123}
2124
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2125static int _sde_dump_reg_range_cmp(void *priv, struct list_head *a,
2126 struct list_head *b)
2127{
2128 struct sde_dbg_reg_range *ar, *br;
2129
2130 if (!a || !b)
2131 return 0;
2132
2133 ar = container_of(a, struct sde_dbg_reg_range, head);
2134 br = container_of(b, struct sde_dbg_reg_range, head);
2135
2136 return ar->offset.start - br->offset.start;
2137}
2138
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2139/**
2140 * _sde_dump_reg_by_ranges - dump ranges or full range of the register blk base
2141 * @dbg: register blk base structure
2142 * @reg_dump_flag: dump target, memory, kernel log, or both
2143 */
2144static void _sde_dump_reg_by_ranges(struct sde_dbg_reg_base *dbg,
2145 u32 reg_dump_flag)
2146{
2147 char *addr;
2148 size_t len;
2149 struct sde_dbg_reg_range *range_node;
2150
Alan Kwongaa53e682017-07-31 18:21:15 -0400[diff] [blame]2151 if (!dbg || !(dbg->base || dbg->cb)) {
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2152 pr_err("dbg base is null!\n");
2153 return;
2154 }
2155
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2156 dev_info(sde_dbg_base.dev, "%s:=========%s DUMP=========\n", __func__,
2157 dbg->name);
Alan Kwongaa53e682017-07-31 18:21:15 -0400[diff] [blame]2158 if (dbg->cb) {
2159 dbg->cb(dbg->cb_ptr);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2160 /* If there is a list to dump the registers by ranges, use the ranges */
Alan Kwongaa53e682017-07-31 18:21:15 -0400[diff] [blame]2161 } else if (!list_empty(&dbg->sub_range_list)) {
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2162 /* sort the list by start address first */
2163 list_sort(NULL, &dbg->sub_range_list, _sde_dump_reg_range_cmp);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2164 list_for_each_entry(range_node, &dbg->sub_range_list, head) {
2165 len = _sde_dbg_get_dump_range(&range_node->offset,
2166 dbg->max_offset);
2167 addr = dbg->base + range_node->offset.start;
2168 pr_debug("%s: range_base=0x%pK start=0x%x end=0x%x\n",
2169 range_node->range_name,
2170 addr, range_node->offset.start,
2171 range_node->offset.end);
2172
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2173 _sde_dump_reg(range_node->range_name, reg_dump_flag,
2174 dbg->base, addr, len,
2175 &range_node->reg_dump, false);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2176 }
2177 } else {
2178 /* If there is no list to dump ranges, dump all registers */
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2179 dev_info(sde_dbg_base.dev,
2180 "Ranges not found, will dump full registers\n");
2181 dev_info(sde_dbg_base.dev, "base:0x%pK len:0x%zx\n", dbg->base,
2182 dbg->max_offset);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2183 addr = dbg->base;
2184 len = dbg->max_offset;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2185 _sde_dump_reg(dbg->name, reg_dump_flag, dbg->base, addr, len,
2186 &dbg->reg_dump, false);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2187 }
2188}
2189
2190/**
2191 * _sde_dump_reg_by_blk - dump a named register base region
2192 * @blk_name: register blk name
2193 */
2194static void _sde_dump_reg_by_blk(const char *blk_name)
2195{
2196 struct sde_dbg_base *dbg_base = &sde_dbg_base;
2197 struct sde_dbg_reg_base *blk_base;
2198
2199 if (!dbg_base)
2200 return;
2201
2202 list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head) {
2203 if (strlen(blk_base->name) &&
2204 !strcmp(blk_base->name, blk_name)) {
2205 _sde_dump_reg_by_ranges(blk_base,
2206 dbg_base->enable_reg_dump);
2207 break;
2208 }
2209 }
2210}
2211
2212/**
2213 * _sde_dump_reg_all - dump all register regions
2214 */
2215static void _sde_dump_reg_all(void)
2216{
2217 struct sde_dbg_base *dbg_base = &sde_dbg_base;
2218 struct sde_dbg_reg_base *blk_base;
2219
2220 if (!dbg_base)
2221 return;
2222
2223 list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head)
2224 if (strlen(blk_base->name))
2225 _sde_dump_reg_by_blk(blk_base->name);
2226}
2227
2228/**
2229 * _sde_dump_get_blk_addr - retrieve register block address by name
2230 * @blk_name: register blk name
2231 * @Return: register blk base, or NULL
2232 */
2233static struct sde_dbg_reg_base *_sde_dump_get_blk_addr(const char *blk_name)
2234{
2235 struct sde_dbg_base *dbg_base = &sde_dbg_base;
2236 struct sde_dbg_reg_base *blk_base;
2237
2238 list_for_each_entry(blk_base, &dbg_base->reg_base_list, reg_base_head)
2239 if (strlen(blk_base->name) && !strcmp(blk_base->name, blk_name))
2240 return blk_base;
2241
2242 return NULL;
2243}
2244
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2245static void _sde_dbg_dump_sde_dbg_bus(struct sde_dbg_sde_debug_bus *bus)
2246{
2247 bool in_log, in_mem;
2248 u32 **dump_mem = NULL;
2249 u32 *dump_addr = NULL;
2250 u32 status = 0;
2251 struct sde_debug_bus_entry *head;
2252 phys_addr_t phys = 0;
2253 int list_size;
2254 int i;
2255 u32 offset;
2256 void __iomem *mem_base = NULL;
2257 struct sde_dbg_reg_base *reg_base;
2258
2259 if (!bus || !bus->cmn.entries_size)
2260 return;
2261
2262 list_for_each_entry(reg_base, &sde_dbg_base.reg_base_list,
2263 reg_base_head)
2264 if (strlen(reg_base->name) &&
2265 !strcmp(reg_base->name, bus->cmn.name))
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2266 mem_base = reg_base->base + bus->top_blk_off;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2267
2268 if (!mem_base) {
2269 pr_err("unable to find mem_base for %s\n", bus->cmn.name);
2270 return;
2271 }
2272
2273 dump_mem = &bus->cmn.dumped_content;
2274
2275 /* will keep in memory 4 entries of 4 bytes each */
2276 list_size = (bus->cmn.entries_size * 4 * 4);
2277
2278 in_log = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_LOG);
2279 in_mem = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_MEM);
2280
2281 if (!in_log && !in_mem)
2282 return;
2283
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2284 dev_info(sde_dbg_base.dev, "======== start %s dump =========\n",
2285 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2286
2287 if (in_mem) {
2288 if (!(*dump_mem))
2289 *dump_mem = dma_alloc_coherent(sde_dbg_base.dev,
2290 list_size, &phys, GFP_KERNEL);
2291
2292 if (*dump_mem) {
2293 dump_addr = *dump_mem;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2294 dev_info(sde_dbg_base.dev,
2295 "%s: start_addr:0x%pK len:0x%x\n",
2296 __func__, dump_addr, list_size);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2297 } else {
2298 in_mem = false;
2299 pr_err("dump_mem: allocation fails\n");
2300 }
2301 }
2302
2303 _sde_dbg_enable_power(true);
2304 for (i = 0; i < bus->cmn.entries_size; i++) {
2305 head = bus->entries + i;
2306 writel_relaxed(TEST_MASK(head->block_id, head->test_id),
2307 mem_base + head->wr_addr);
2308 wmb(); /* make sure test bits were written */
2309
Dhaval Patelc063b9e2017-08-08 16:28:10 -0700[diff] [blame]2310 if (bus->cmn.flags & DBGBUS_FLAGS_DSPP) {
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2311 offset = DBGBUS_DSPP_STATUS;
Dhaval Patelc063b9e2017-08-08 16:28:10 -0700[diff] [blame]2312 /* keep DSPP test point enabled */
2313 if (head->wr_addr != DBGBUS_DSPP)
2314 writel_relaxed(0xF, mem_base + DBGBUS_DSPP);
2315 } else {
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2316 offset = head->wr_addr + 0x4;
Dhaval Patelc063b9e2017-08-08 16:28:10 -0700[diff] [blame]2317 }
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2318
2319 status = readl_relaxed(mem_base + offset);
2320
2321 if (in_log)
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2322 dev_info(sde_dbg_base.dev,
2323 "waddr=0x%x blk=%d tst=%d val=0x%x\n",
2324 head->wr_addr, head->block_id,
2325 head->test_id, status);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2326
2327 if (dump_addr && in_mem) {
2328 dump_addr[i*4] = head->wr_addr;
2329 dump_addr[i*4 + 1] = head->block_id;
2330 dump_addr[i*4 + 2] = head->test_id;
2331 dump_addr[i*4 + 3] = status;
2332 }
2333
Lloyd Atkinsone221a5c2017-05-01 15:08:23 -0400[diff] [blame]2334 if (head->analyzer)
2335 head->analyzer(head, status);
2336
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2337 /* Disable debug bus once we are done */
2338 writel_relaxed(0, mem_base + head->wr_addr);
Dhaval Patelc063b9e2017-08-08 16:28:10 -0700[diff] [blame]2339 if (bus->cmn.flags & DBGBUS_FLAGS_DSPP &&
2340 head->wr_addr != DBGBUS_DSPP)
2341 writel_relaxed(0x0, mem_base + DBGBUS_DSPP);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2342 }
2343 _sde_dbg_enable_power(false);
2344
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2345 dev_info(sde_dbg_base.dev, "======== end %s dump =========\n",
2346 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2347}
2348
2349static void _sde_dbg_dump_vbif_debug_bus_entry(
2350 struct vbif_debug_bus_entry *head, void __iomem *mem_base,
2351 u32 *dump_addr, bool in_log)
2352{
2353 int i, j;
2354 u32 val;
2355
2356 if (!dump_addr && !in_log)
2357 return;
2358
2359 for (i = 0; i < head->block_cnt; i++) {
2360 writel_relaxed(1 << (i + head->bit_offset),
2361 mem_base + head->block_bus_addr);
2362 /* make sure that current bus blcok enable */
2363 wmb();
2364 for (j = head->test_pnt_start; j < head->test_pnt_cnt; j++) {
2365 writel_relaxed(j, mem_base + head->block_bus_addr + 4);
2366 /* make sure that test point is enabled */
2367 wmb();
2368 val = readl_relaxed(mem_base + MMSS_VBIF_TEST_BUS_OUT);
2369 if (dump_addr) {
2370 *dump_addr++ = head->block_bus_addr;
2371 *dump_addr++ = i;
2372 *dump_addr++ = j;
2373 *dump_addr++ = val;
2374 }
2375 if (in_log)
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2376 dev_info(sde_dbg_base.dev,
2377 "testpoint:%x arb/xin id=%d index=%d val=0x%x\n",
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2378 head->block_bus_addr, i, j, val);
2379 }
2380 }
2381}
2382
2383static void _sde_dbg_dump_vbif_dbg_bus(struct sde_dbg_vbif_debug_bus *bus)
2384{
2385 bool in_log, in_mem;
2386 u32 **dump_mem = NULL;
2387 u32 *dump_addr = NULL;
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2388 u32 value, d0, d1;
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2389 unsigned long reg, reg1, reg2;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2390 struct vbif_debug_bus_entry *head;
2391 phys_addr_t phys = 0;
2392 int i, list_size = 0;
2393 void __iomem *mem_base = NULL;
2394 struct vbif_debug_bus_entry *dbg_bus;
2395 u32 bus_size;
2396 struct sde_dbg_reg_base *reg_base;
2397
2398 if (!bus || !bus->cmn.entries_size)
2399 return;
2400
2401 list_for_each_entry(reg_base, &sde_dbg_base.reg_base_list,
2402 reg_base_head)
2403 if (strlen(reg_base->name) &&
2404 !strcmp(reg_base->name, bus->cmn.name))
2405 mem_base = reg_base->base;
2406
2407 if (!mem_base) {
2408 pr_err("unable to find mem_base for %s\n", bus->cmn.name);
2409 return;
2410 }
2411
2412 dbg_bus = bus->entries;
2413 bus_size = bus->cmn.entries_size;
2414 list_size = bus->cmn.entries_size;
2415 dump_mem = &bus->cmn.dumped_content;
2416
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2417 dev_info(sde_dbg_base.dev, "======== start %s dump =========\n",
2418 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2419
2420 if (!dump_mem || !dbg_bus || !bus_size || !list_size)
2421 return;
2422
2423 /* allocate memory for each test point */
2424 for (i = 0; i < bus_size; i++) {
2425 head = dbg_bus + i;
2426 list_size += (head->block_cnt * head->test_pnt_cnt);
2427 }
2428
2429 /* 4 bytes * 4 entries for each test point*/
2430 list_size *= 16;
2431
2432 in_log = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_LOG);
2433 in_mem = (bus->cmn.enable_mask & SDE_DBG_DUMP_IN_MEM);
2434
2435 if (!in_log && !in_mem)
2436 return;
2437
2438 if (in_mem) {
2439 if (!(*dump_mem))
2440 *dump_mem = dma_alloc_coherent(sde_dbg_base.dev,
2441 list_size, &phys, GFP_KERNEL);
2442
2443 if (*dump_mem) {
2444 dump_addr = *dump_mem;
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2445 dev_info(sde_dbg_base.dev,
2446 "%s: start_addr:0x%pK len:0x%x\n",
2447 __func__, dump_addr, list_size);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2448 } else {
2449 in_mem = false;
2450 pr_err("dump_mem: allocation fails\n");
2451 }
2452 }
2453
2454 _sde_dbg_enable_power(true);
2455
2456 value = readl_relaxed(mem_base + MMSS_VBIF_CLKON);
2457 writel_relaxed(value | BIT(1), mem_base + MMSS_VBIF_CLKON);
2458
2459 /* make sure that vbif core is on */
2460 wmb();
2461
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2462 /**
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2463 * Extract VBIF error info based on XIN halt and error status.
2464 * If the XIN client is not in HALT state, or an error is detected,
2465 * then retrieve the VBIF error info for it.
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2466 */
2467 reg = readl_relaxed(mem_base + MMSS_VBIF_XIN_HALT_CTRL1);
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2468 reg1 = readl_relaxed(mem_base + MMSS_VBIF_PND_ERR);
2469 reg2 = readl_relaxed(mem_base + MMSS_VBIF_SRC_ERR);
2470 dev_err(sde_dbg_base.dev,
2471 "XIN HALT:0x%lX, PND ERR:0x%lX, SRC ERR:0x%lX\n",
2472 reg, reg1, reg2);
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2473 reg >>= 16;
Clarence Ip5b730b42017-07-31 18:04:06 -0400[diff] [blame]2474 reg &= ~(reg1 | reg2);
Benjamin Chan4e04eae2017-07-20 22:49:52 -0400[diff] [blame]2475 for (i = 0; i < MMSS_VBIF_CLIENT_NUM; i++) {
2476 if (!test_bit(0, &reg)) {
2477 writel_relaxed(i, mem_base + MMSS_VBIF_ERR_INFO);
2478 /* make sure reg write goes through */
2479 wmb();
2480
2481 d0 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO);
2482 d1 = readl_relaxed(mem_base + MMSS_VBIF_ERR_INFO_1);
2483
2484 dev_err(sde_dbg_base.dev,
2485 "Client:%d, errinfo=0x%X, errinfo1=0x%X\n",
2486 i, d0, d1);
2487 }
2488 reg >>= 1;
2489 }
2490
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2491 for (i = 0; i < bus_size; i++) {
2492 head = dbg_bus + i;
2493
2494 writel_relaxed(0, mem_base + head->disable_bus_addr);
2495 writel_relaxed(BIT(0), mem_base + MMSS_VBIF_TEST_BUS_OUT_CTRL);
2496 /* make sure that other bus is off */
2497 wmb();
2498
2499 _sde_dbg_dump_vbif_debug_bus_entry(head, mem_base, dump_addr,
2500 in_log);
2501 if (dump_addr)
2502 dump_addr += (head->block_cnt * head->test_pnt_cnt * 4);
2503 }
2504
2505 _sde_dbg_enable_power(false);
2506
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]2507 dev_info(sde_dbg_base.dev, "======== end %s dump =========\n",
2508 bus->cmn.name);
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2509}
2510
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2511/**
2512 * _sde_dump_array - dump array of register bases
2513 * @blk_arr: array of register base pointers
2514 * @len: length of blk_arr
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2515 * @do_panic: whether to trigger a panic after dumping
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2516 * @name: string indicating origin of dump
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2517 * @dump_dbgbus_sde: whether to dump the sde debug bus
2518 * @dump_dbgbus_vbif_rt: whether to dump the vbif rt debug bus
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2519 */
2520static void _sde_dump_array(struct sde_dbg_reg_base *blk_arr[],
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2521 u32 len, bool do_panic, const char *name, bool dump_dbgbus_sde,
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2522 bool dump_dbgbus_vbif_rt, bool dump_all)
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2523{
2524 int i;
2525
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2526 sde_evtlog_dump_all(sde_dbg_base.evtlog);
2527
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2528 if (dump_all || !blk_arr || !len) {
2529 _sde_dump_reg_all();
2530 } else {
2531 for (i = 0; i < len; i++) {
2532 if (blk_arr[i] != NULL)
2533 _sde_dump_reg_by_ranges(blk_arr[i],
2534 sde_dbg_base.enable_reg_dump);
2535 }
2536 }
2537
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2538 if (dump_dbgbus_sde)
2539 _sde_dbg_dump_sde_dbg_bus(&sde_dbg_base.dbgbus_sde);
2540
2541 if (dump_dbgbus_vbif_rt)
2542 _sde_dbg_dump_vbif_dbg_bus(&sde_dbg_base.dbgbus_vbif_rt);
2543
2544 if (do_panic && sde_dbg_base.panic_on_err)
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2545 panic(name);
2546}
2547
2548/**
2549 * _sde_dump_work - deferred dump work function
2550 * @work: work structure
2551 */
2552static void _sde_dump_work(struct work_struct *work)
2553{
2554 _sde_dump_array(sde_dbg_base.req_dump_blks,
2555 ARRAY_SIZE(sde_dbg_base.req_dump_blks),
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2556 sde_dbg_base.work_panic, "evtlog_workitem",
2557 sde_dbg_base.dbgbus_sde.cmn.include_in_deferred_work,
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2558 sde_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work,
2559 sde_dbg_base.dump_all);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2560}
2561
2562void sde_dbg_dump(bool queue_work, const char *name, ...)
2563{
2564 int i, index = 0;
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2565 bool do_panic = false;
2566 bool dump_dbgbus_sde = false;
2567 bool dump_dbgbus_vbif_rt = false;
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2568 bool dump_all = false;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2569 va_list args;
2570 char *blk_name = NULL;
2571 struct sde_dbg_reg_base *blk_base = NULL;
2572 struct sde_dbg_reg_base **blk_arr;
2573 u32 blk_len;
2574
Clarence Ip6ac61cc2017-03-22 15:01:53 -0400[diff] [blame]2575 if (!sde_evtlog_is_enabled(sde_dbg_base.evtlog, SDE_EVTLOG_ALWAYS))
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2576 return;
2577
2578 if (queue_work && work_pending(&sde_dbg_base.dump_work))
2579 return;
2580
2581 blk_arr = &sde_dbg_base.req_dump_blks[0];
2582 blk_len = ARRAY_SIZE(sde_dbg_base.req_dump_blks);
2583
2584 memset(sde_dbg_base.req_dump_blks, 0,
2585 sizeof(sde_dbg_base.req_dump_blks));
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2586 sde_dbg_base.dump_all = false;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2587
2588 va_start(args, name);
Lloyd Atkinsonf3e8ef32017-03-22 18:49:49 -0400[diff] [blame]2589 i = 0;
2590 while ((blk_name = va_arg(args, char*))) {
2591 if (i++ >= SDE_EVTLOG_MAX_DATA) {
2592 pr_err("could not parse all dump arguments\n");
2593 break;
2594 }
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2595 if (IS_ERR_OR_NULL(blk_name))
2596 break;
2597
2598 blk_base = _sde_dump_get_blk_addr(blk_name);
2599 if (blk_base) {
2600 if (index < blk_len) {
2601 blk_arr[index] = blk_base;
2602 index++;
2603 } else {
2604 pr_err("insufficient space to to dump %s\n",
2605 blk_name);
2606 }
2607 }
2608
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2609 if (!strcmp(blk_name, "all"))
2610 dump_all = true;
2611
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2612 if (!strcmp(blk_name, "dbg_bus"))
2613 dump_dbgbus_sde = true;
2614
2615 if (!strcmp(blk_name, "vbif_dbg_bus"))
2616 dump_dbgbus_vbif_rt = true;
2617
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2618 if (!strcmp(blk_name, "panic"))
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2619 do_panic = true;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2620 }
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2621 va_end(args);
2622
2623 if (queue_work) {
2624 /* schedule work to dump later */
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2625 sde_dbg_base.work_panic = do_panic;
2626 sde_dbg_base.dbgbus_sde.cmn.include_in_deferred_work =
2627 dump_dbgbus_sde;
2628 sde_dbg_base.dbgbus_vbif_rt.cmn.include_in_deferred_work =
2629 dump_dbgbus_vbif_rt;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2630 schedule_work(&sde_dbg_base.dump_work);
2631 } else {
Lloyd Atkinson274cc462017-02-21 11:52:06 -0500[diff] [blame]2632 _sde_dump_array(blk_arr, blk_len, do_panic, name,
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2633 dump_dbgbus_sde, dump_dbgbus_vbif_rt, dump_all);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2634 }
2635}
2636
2637/*
2638 * sde_dbg_debugfs_open - debugfs open handler for evtlog dump
2639 * @inode: debugfs inode
2640 * @file: file handle
2641 */
2642static int sde_dbg_debugfs_open(struct inode *inode, struct file *file)
2643{
2644 /* non-seekable */
2645 file->f_mode &= ~(FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);
2646 file->private_data = inode->i_private;
2647 return 0;
2648}
2649
2650/**
2651 * sde_evtlog_dump_read - debugfs read handler for evtlog dump
2652 * @file: file handler
2653 * @buff: user buffer content for debugfs
2654 * @count: size of user buffer
2655 * @ppos: position offset of user buffer
2656 */
2657static ssize_t sde_evtlog_dump_read(struct file *file, char __user *buff,
2658 size_t count, loff_t *ppos)
2659{
2660 ssize_t len = 0;
2661 char evtlog_buf[SDE_EVTLOG_BUF_MAX];
2662
2663 len = sde_evtlog_dump_to_buffer(sde_dbg_base.evtlog, evtlog_buf,
2664 SDE_EVTLOG_BUF_MAX);
2665 if (copy_to_user(buff, evtlog_buf, len))
2666 return -EFAULT;
2667 *ppos += len;
2668
2669 return len;
2670}
2671
2672/**
2673 * sde_evtlog_dump_write - debugfs write handler for evtlog dump
2674 * @file: file handler
2675 * @user_buf: user buffer content from debugfs
2676 * @count: size of user buffer
2677 * @ppos: position offset of user buffer
2678 */
2679static ssize_t sde_evtlog_dump_write(struct file *file,
2680 const char __user *user_buf, size_t count, loff_t *ppos)
2681{
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]2682 _sde_dump_array(NULL, 0, sde_dbg_base.panic_on_err, "dump_debugfs",
2683 true, true, true);
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2684
2685 return count;
2686}
2687
2688static const struct file_operations sde_evtlog_fops = {
2689 .open = sde_dbg_debugfs_open,
2690 .read = sde_evtlog_dump_read,
2691 .write = sde_evtlog_dump_write,
2692};
2693
Clarence Ip6ac61cc2017-03-22 15:01:53 -0400[diff] [blame]2694/*
2695 * sde_evtlog_filter_show - read callback for evtlog filter
2696 * @s: pointer to seq_file object
2697 * @data: pointer to private data
2698 */
2699static int sde_evtlog_filter_show(struct seq_file *s, void *data)
2700{
2701 struct sde_dbg_evtlog *evtlog;
2702 char buffer[64];
2703 int i;
2704
2705 if (!s || !s->private)
2706 return -EINVAL;
2707
2708 evtlog = s->private;
2709
2710 for (i = 0; !sde_evtlog_get_filter(
2711 evtlog, i, buffer, ARRAY_SIZE(buffer)); ++i)
2712 seq_printf(s, "*%s*\n", buffer);
2713 return 0;
2714}
2715
2716/*
2717 * sde_evtlog_filter_open - debugfs open handler for evtlog filter
2718 * @inode: debugfs inode
2719 * @file: file handle
2720 * Returns: zero on success
2721 */
2722static int sde_evtlog_filter_open(struct inode *inode, struct file *file)
2723{
2724 if (!file)
2725 return -EINVAL;
2726
2727 return single_open(file, sde_evtlog_filter_show, inode->i_private);
2728}
2729
2730/*
2731 * sde_evtlog_filter_write - write callback for evtlog filter
2732 * @file: pointer to file structure
2733 * @user_buf: pointer to incoming user data
2734 * @count: size of incoming user buffer
2735 * @ppos: pointer to file offset
2736 */
2737static ssize_t sde_evtlog_filter_write(struct file *file,
2738 const char __user *user_buf, size_t count, loff_t *ppos)
2739{
2740 char *tmp_filter = NULL;
2741 ssize_t rc = 0;
2742
2743 if (count > 0) {
2744 /* copy user provided string and null terminate it */
2745 tmp_filter = kzalloc(count + 1, GFP_KERNEL);
2746 if (!tmp_filter)
2747 rc = -ENOMEM;
2748 else if (copy_from_user(tmp_filter, user_buf, count))
2749 rc = -EFAULT;
2750 }
2751
2752 /* update actual filter configuration on success */
2753 if (!rc) {
2754 sde_evtlog_set_filter(sde_dbg_base.evtlog, tmp_filter);
2755 rc = count;
2756 }
2757 kfree(tmp_filter);
2758
2759 return rc;
2760}
2761
2762static const struct file_operations sde_evtlog_filter_fops = {
2763 .open = sde_evtlog_filter_open,
2764 .write = sde_evtlog_filter_write,
2765 .read = seq_read,
2766 .llseek = seq_lseek,
2767 .release = seq_release
2768};
2769
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2770/**
2771 * sde_dbg_reg_base_release - release allocated reg dump file private data
2772 * @inode: debugfs inode
2773 * @file: file handle
2774 * @Return: 0 on success
2775 */
2776static int sde_dbg_reg_base_release(struct inode *inode, struct file *file)
2777{
2778 struct sde_dbg_reg_base *dbg = file->private_data;
2779
2780 if (dbg && dbg->buf) {
2781 kfree(dbg->buf);
2782 dbg->buf_len = 0;
2783 dbg->buf = NULL;
2784 }
2785 return 0;
2786}
2787
2788
2789/**
2790 * sde_dbg_reg_base_offset_write - set new offset and len to debugfs reg base
2791 * @file: file handler
2792 * @user_buf: user buffer content from debugfs
2793 * @count: size of user buffer
2794 * @ppos: position offset of user buffer
2795 */
2796static ssize_t sde_dbg_reg_base_offset_write(struct file *file,
2797 const char __user *user_buf, size_t count, loff_t *ppos)
2798{
2799 struct sde_dbg_reg_base *dbg = file->private_data;
2800 u32 off = 0;
2801 u32 cnt = DEFAULT_BASE_REG_CNT;
2802 char buf[24];
2803
2804 if (!dbg)
2805 return -ENODEV;
2806
2807 if (count >= sizeof(buf))
2808 return -EFAULT;
2809
2810 if (copy_from_user(buf, user_buf, count))
2811 return -EFAULT;
2812
2813 buf[count] = 0; /* end of string */
2814
2815 if (sscanf(buf, "%5x %x", &off, &cnt) != 2)
2816 return -EFAULT;
2817
2818 if (off > dbg->max_offset)
2819 return -EINVAL;
2820
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2821 if (off % sizeof(u32))
2822 return -EINVAL;
2823
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2824 if (cnt > (dbg->max_offset - off))
2825 cnt = dbg->max_offset - off;
2826
2827 dbg->off = off;
2828 dbg->cnt = cnt;
2829
2830 pr_debug("offset=%x cnt=%x\n", off, cnt);
2831
2832 return count;
2833}
2834
2835/**
2836 * sde_dbg_reg_base_offset_read - read current offset and len of register base
2837 * @file: file handler
2838 * @user_buf: user buffer content from debugfs
2839 * @count: size of user buffer
2840 * @ppos: position offset of user buffer
2841 */
2842static ssize_t sde_dbg_reg_base_offset_read(struct file *file,
2843 char __user *buff, size_t count, loff_t *ppos)
2844{
2845 struct sde_dbg_reg_base *dbg = file->private_data;
2846 int len = 0;
2847 char buf[24] = {'\0'};
2848
2849 if (!dbg)
2850 return -ENODEV;
2851
2852 if (*ppos)
2853 return 0; /* the end */
2854
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2855 if (dbg->off % sizeof(u32))
2856 return -EFAULT;
2857
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2858 len = snprintf(buf, sizeof(buf), "0x%08zx %zx\n", dbg->off, dbg->cnt);
2859 if (len < 0 || len >= sizeof(buf))
2860 return 0;
2861
2862 if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
2863 return -EFAULT;
2864
2865 *ppos += len; /* increase offset */
2866
2867 return len;
2868}
2869
2870/**
2871 * sde_dbg_reg_base_reg_write - write to reg base hw at offset a given value
2872 * @file: file handler
2873 * @user_buf: user buffer content from debugfs
2874 * @count: size of user buffer
2875 * @ppos: position offset of user buffer
2876 */
2877static ssize_t sde_dbg_reg_base_reg_write(struct file *file,
2878 const char __user *user_buf, size_t count, loff_t *ppos)
2879{
2880 struct sde_dbg_reg_base *dbg = file->private_data;
2881 size_t off;
2882 u32 data, cnt;
2883 char buf[24];
2884
2885 if (!dbg)
2886 return -ENODEV;
2887
2888 if (count >= sizeof(buf))
2889 return -EFAULT;
2890
2891 if (copy_from_user(buf, user_buf, count))
2892 return -EFAULT;
2893
2894 buf[count] = 0; /* end of string */
2895
2896 cnt = sscanf(buf, "%zx %x", &off, &data);
2897
2898 if (cnt < 2)
2899 return -EFAULT;
2900
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2901 if (off % sizeof(u32))
2902 return -EFAULT;
2903
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2904 if (off >= dbg->max_offset)
2905 return -EFAULT;
2906
2907 _sde_dbg_enable_power(true);
2908
2909 writel_relaxed(data, dbg->base + off);
2910
2911 _sde_dbg_enable_power(false);
2912
2913 pr_debug("addr=%zx data=%x\n", off, data);
2914
2915 return count;
2916}
2917
2918/**
2919 * sde_dbg_reg_base_reg_read - read len from reg base hw at current offset
2920 * @file: file handler
2921 * @user_buf: user buffer content from debugfs
2922 * @count: size of user buffer
2923 * @ppos: position offset of user buffer
2924 */
2925static ssize_t sde_dbg_reg_base_reg_read(struct file *file,
2926 char __user *user_buf, size_t count, loff_t *ppos)
2927{
2928 struct sde_dbg_reg_base *dbg = file->private_data;
2929 size_t len;
2930
2931 if (!dbg) {
2932 pr_err("invalid handle\n");
2933 return -ENODEV;
2934 }
2935
2936 if (!dbg->buf) {
2937 char dump_buf[64];
2938 char *ptr;
2939 int cnt, tot;
2940
2941 dbg->buf_len = sizeof(dump_buf) *
2942 DIV_ROUND_UP(dbg->cnt, ROW_BYTES);
2943 dbg->buf = kzalloc(dbg->buf_len, GFP_KERNEL);
2944
2945 if (!dbg->buf)
2946 return -ENOMEM;
2947
Lloyd Atkinsonc0121402017-05-23 11:28:48 -0400[diff] [blame]2948 if (dbg->off % sizeof(u32))
2949 return -EFAULT;
2950
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]2951 ptr = dbg->base + dbg->off;
2952 tot = 0;
2953
2954 _sde_dbg_enable_power(true);
2955
2956 for (cnt = dbg->cnt; cnt > 0; cnt -= ROW_BYTES) {
2957 hex_dump_to_buffer(ptr, min(cnt, ROW_BYTES),
2958 ROW_BYTES, GROUP_BYTES, dump_buf,
2959 sizeof(dump_buf), false);
2960 len = scnprintf(dbg->buf + tot, dbg->buf_len - tot,
2961 "0x%08x: %s\n",
2962 ((int) (unsigned long) ptr) -
2963 ((int) (unsigned long) dbg->base),
2964 dump_buf);
2965
2966 ptr += ROW_BYTES;
2967 tot += len;
2968 if (tot >= dbg->buf_len)
2969 break;
2970 }
2971
2972 _sde_dbg_enable_power(false);
2973
2974 dbg->buf_len = tot;
2975 }
2976
2977 if (*ppos >= dbg->buf_len)
2978 return 0; /* done reading */
2979
2980 len = min(count, dbg->buf_len - (size_t) *ppos);
2981 if (copy_to_user(user_buf, dbg->buf + *ppos, len)) {
2982 pr_err("failed to copy to user\n");
2983 return -EFAULT;
2984 }
2985
2986 *ppos += len; /* increase offset */
2987
2988 return len;
2989}
2990
2991static const struct file_operations sde_off_fops = {
2992 .open = sde_dbg_debugfs_open,
2993 .release = sde_dbg_reg_base_release,
2994 .read = sde_dbg_reg_base_offset_read,
2995 .write = sde_dbg_reg_base_offset_write,
2996};
2997
2998static const struct file_operations sde_reg_fops = {
2999 .open = sde_dbg_debugfs_open,
3000 .release = sde_dbg_reg_base_release,
3001 .read = sde_dbg_reg_base_reg_read,
3002 .write = sde_dbg_reg_base_reg_write,
3003};
3004
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3005int sde_dbg_debugfs_register(struct dentry *debugfs_root)
3006{
3007 static struct sde_dbg_base *dbg = &sde_dbg_base;
3008 struct sde_dbg_reg_base *blk_base;
3009 char debug_name[80] = "";
3010
Dhaval Patel6c666622017-03-21 23:02:59 -0700[diff] [blame]3011 if (!debugfs_root)
3012 return -EINVAL;
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3013
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3014 debugfs_create_file("dump", 0600, debugfs_root, NULL,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3015 &sde_evtlog_fops);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3016 debugfs_create_u32("enable", 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3017 &(sde_dbg_base.evtlog->enable));
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3018 debugfs_create_file("filter", 0600, debugfs_root,
Clarence Ip6ac61cc2017-03-22 15:01:53 -0400[diff] [blame]3019 sde_dbg_base.evtlog,
3020 &sde_evtlog_filter_fops);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3021 debugfs_create_u32("panic", 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3022 &sde_dbg_base.panic_on_err);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3023 debugfs_create_u32("reg_dump", 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3024 &sde_dbg_base.enable_reg_dump);
3025
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3026 if (dbg->dbgbus_sde.entries) {
3027 dbg->dbgbus_sde.cmn.name = DBGBUS_NAME_SDE;
3028 snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
3029 dbg->dbgbus_sde.cmn.name);
3030 dbg->dbgbus_sde.cmn.enable_mask = DEFAULT_DBGBUS_SDE;
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3031 debugfs_create_u32(debug_name, 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3032 &dbg->dbgbus_sde.cmn.enable_mask);
3033 }
3034
3035 if (dbg->dbgbus_vbif_rt.entries) {
3036 dbg->dbgbus_vbif_rt.cmn.name = DBGBUS_NAME_VBIF_RT;
3037 snprintf(debug_name, sizeof(debug_name), "%s_dbgbus",
3038 dbg->dbgbus_vbif_rt.cmn.name);
3039 dbg->dbgbus_vbif_rt.cmn.enable_mask = DEFAULT_DBGBUS_VBIFRT;
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3040 debugfs_create_u32(debug_name, 0600, debugfs_root,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3041 &dbg->dbgbus_vbif_rt.cmn.enable_mask);
3042 }
3043
3044 list_for_each_entry(blk_base, &dbg->reg_base_list, reg_base_head) {
3045 snprintf(debug_name, sizeof(debug_name), "%s_off",
3046 blk_base->name);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3047 debugfs_create_file(debug_name, 0600, debugfs_root, blk_base,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3048 &sde_off_fops);
3049
3050 snprintf(debug_name, sizeof(debug_name), "%s_reg",
3051 blk_base->name);
Lloyd Atkinson8de415a2017-05-23 11:31:16 -0400[diff] [blame]3052 debugfs_create_file(debug_name, 0600, debugfs_root, blk_base,
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3053 &sde_reg_fops);
3054 }
3055
3056 return 0;
3057}
3058
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3059static void _sde_dbg_debugfs_destroy(void)
3060{
3061}
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3062
3063void sde_dbg_init_dbg_buses(u32 hwversion)
3064{
3065 static struct sde_dbg_base *dbg = &sde_dbg_base;
3066
3067 memset(&dbg->dbgbus_sde, 0, sizeof(dbg->dbgbus_sde));
3068 memset(&dbg->dbgbus_vbif_rt, 0, sizeof(dbg->dbgbus_vbif_rt));
3069
Benjamin Chanbeaaf6f2017-09-08 15:25:50 -0400[diff] [blame]3070 if (IS_MSM8998_TARGET(hwversion)) {
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3071 dbg->dbgbus_sde.entries = dbg_bus_sde_8998;
3072 dbg->dbgbus_sde.cmn.entries_size = ARRAY_SIZE(dbg_bus_sde_8998);
3073 dbg->dbgbus_sde.cmn.flags = DBGBUS_FLAGS_DSPP;
3074
3075 dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
3076 dbg->dbgbus_vbif_rt.cmn.entries_size =
3077 ARRAY_SIZE(vbif_dbg_bus_msm8998);
Benjamin Chanbeaaf6f2017-09-08 15:25:50 -0400[diff] [blame]3078 } else if (IS_SDM845_TARGET(hwversion)) {
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3079 dbg->dbgbus_sde.entries = dbg_bus_sde_sdm845;
3080 dbg->dbgbus_sde.cmn.entries_size =
3081 ARRAY_SIZE(dbg_bus_sde_sdm845);
3082 dbg->dbgbus_sde.cmn.flags = DBGBUS_FLAGS_DSPP;
3083
3084 /* vbif is unchanged vs 8998 */
3085 dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
3086 dbg->dbgbus_vbif_rt.cmn.entries_size =
3087 ARRAY_SIZE(vbif_dbg_bus_msm8998);
Benjamin Chanbeaaf6f2017-09-08 15:25:50 -0400[diff] [blame]3088 } else {
3089 pr_err("unsupported chipset id %X\n", hwversion);
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3090 }
3091}
3092
3093int sde_dbg_init(struct device *dev, struct sde_dbg_power_ctrl *power_ctrl)
3094{
3095 if (!dev || !power_ctrl) {
3096 pr_err("invalid params\n");
3097 return -EINVAL;
3098 }
3099
3100 INIT_LIST_HEAD(&sde_dbg_base.reg_base_list);
3101 sde_dbg_base.dev = dev;
3102 sde_dbg_base.power_ctrl = *power_ctrl;
3103
3104 sde_dbg_base.evtlog = sde_evtlog_init();
3105 if (IS_ERR_OR_NULL(sde_dbg_base.evtlog))
3106 return PTR_ERR(sde_dbg_base.evtlog);
3107
3108 sde_dbg_base_evtlog = sde_dbg_base.evtlog;
3109
3110 INIT_WORK(&sde_dbg_base.dump_work, _sde_dump_work);
3111 sde_dbg_base.work_panic = false;
3112 sde_dbg_base.panic_on_err = DEFAULT_PANIC;
3113 sde_dbg_base.enable_reg_dump = DEFAULT_REGDUMP;
3114
3115 pr_info("evtlog_status: enable:%d, panic:%d, dump:%d\n",
3116 sde_dbg_base.evtlog->enable, sde_dbg_base.panic_on_err,
3117 sde_dbg_base.enable_reg_dump);
3118
3119 return 0;
3120}
3121
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]3122static void sde_dbg_reg_base_destroy(void)
3123{
3124 struct sde_dbg_reg_range *range_node, *range_tmp;
3125 struct sde_dbg_reg_base *blk_base, *blk_tmp;
3126 struct sde_dbg_base *dbg_base = &sde_dbg_base;
3127
3128 if (!dbg_base)
3129 return;
3130
3131 list_for_each_entry_safe(blk_base, blk_tmp, &dbg_base->reg_base_list,
3132 reg_base_head) {
3133 list_for_each_entry_safe(range_node, range_tmp,
3134 &blk_base->sub_range_list, head) {
3135 list_del(&range_node->head);
3136 kfree(range_node);
3137 }
3138 list_del(&blk_base->reg_base_head);
3139 kfree(blk_base);
3140 }
3141}
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3142/**
3143 * sde_dbg_destroy - destroy sde debug facilities
3144 */
3145void sde_dbg_destroy(void)
3146{
3147 _sde_dbg_debugfs_destroy();
3148 sde_dbg_base_evtlog = NULL;
3149 sde_evtlog_destroy(sde_dbg_base.evtlog);
3150 sde_dbg_base.evtlog = NULL;
Dhaval Patela2430842017-06-15 14:32:36 -0700[diff] [blame]3151 sde_dbg_reg_base_destroy();
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3152}
3153
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3154int sde_dbg_reg_register_base(const char *name, void __iomem *base,
3155 size_t max_offset)
3156{
3157 struct sde_dbg_base *dbg_base = &sde_dbg_base;
3158 struct sde_dbg_reg_base *reg_base;
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3159
3160 if (!name || !strlen(name)) {
3161 pr_err("no debug name provided\n");
3162 return -EINVAL;
3163 }
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3164
3165 reg_base = kzalloc(sizeof(*reg_base), GFP_KERNEL);
3166 if (!reg_base)
3167 return -ENOMEM;
3168
Lloyd Atkinsonb020e0f2017-03-14 08:05:18 -0700[diff] [blame]3169 strlcpy(reg_base->name, name, sizeof(reg_base->name));
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3170 reg_base->base = base;
3171 reg_base->max_offset = max_offset;
3172 reg_base->off = 0;
3173 reg_base->cnt = DEFAULT_BASE_REG_CNT;
3174 reg_base->reg_dump = NULL;
3175
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3176 /* Initialize list to make sure check for null list will be valid */
3177 INIT_LIST_HEAD(&reg_base->sub_range_list);
3178
3179 pr_debug("%s base: %pK max_offset 0x%zX\n", reg_base->name,
3180 reg_base->base, reg_base->max_offset);
3181
3182 list_add(&reg_base->reg_base_head, &dbg_base->reg_base_list);
3183
3184 return 0;
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3185}
3186
Alan Kwongaa53e682017-07-31 18:21:15 -0400[diff] [blame]3187int sde_dbg_reg_register_cb(const char *name, void (*cb)(void *), void *ptr)
3188{
3189 struct sde_dbg_base *dbg_base = &sde_dbg_base;
3190 struct sde_dbg_reg_base *reg_base;
3191
3192 if (!name || !strlen(name)) {
3193 pr_err("no debug name provided\n");
3194 return -EINVAL;
3195 }
3196
3197 reg_base = kzalloc(sizeof(*reg_base), GFP_KERNEL);
3198 if (!reg_base)
3199 return -ENOMEM;
3200
3201 strlcpy(reg_base->name, name, sizeof(reg_base->name));
3202 reg_base->base = NULL;
3203 reg_base->max_offset = 0;
3204 reg_base->off = 0;
3205 reg_base->cnt = DEFAULT_BASE_REG_CNT;
3206 reg_base->reg_dump = NULL;
3207 reg_base->cb = cb;
3208 reg_base->cb_ptr = ptr;
3209
3210 /* Initialize list to make sure check for null list will be valid */
3211 INIT_LIST_HEAD(&reg_base->sub_range_list);
3212
3213 pr_debug("%s cb: %pK cb_ptr: %pK\n", reg_base->name,
3214 reg_base->cb, reg_base->cb_ptr);
3215
3216 list_add(&reg_base->reg_base_head, &dbg_base->reg_base_list);
3217
3218 return 0;
3219}
3220
3221void sde_dbg_reg_unregister_cb(const char *name, void (*cb)(void *), void *ptr)
3222{
3223 struct sde_dbg_base *dbg_base = &sde_dbg_base;
3224 struct sde_dbg_reg_base *reg_base;
3225
3226 if (!dbg_base)
3227 return;
3228
3229 list_for_each_entry(reg_base, &dbg_base->reg_base_list, reg_base_head) {
3230 if (strlen(reg_base->name) &&
3231 !strcmp(reg_base->name, name)) {
3232 pr_debug("%s cb: %pK cb_ptr: %pK\n", reg_base->name,
3233 reg_base->cb, reg_base->cb_ptr);
3234 list_del(&reg_base->reg_base_head);
3235 kfree(reg_base);
3236 break;
3237 }
3238 }
3239}
3240
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3241void sde_dbg_reg_register_dump_range(const char *base_name,
3242 const char *range_name, u32 offset_start, u32 offset_end,
3243 uint32_t xin_id)
3244{
3245 struct sde_dbg_reg_base *reg_base;
3246 struct sde_dbg_reg_range *range;
3247
3248 reg_base = _sde_dump_get_blk_addr(base_name);
3249 if (!reg_base) {
3250 pr_err("error: for range %s unable to locate base %s\n",
3251 range_name, base_name);
3252 return;
3253 }
3254
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]3255 if (!range_name || strlen(range_name) == 0) {
3256 pr_err("%pS: bad range name, base_name %s, offset_start 0x%X, end 0x%X\n",
3257 __builtin_return_address(0), base_name,
3258 offset_start, offset_end);
3259 return;
3260 }
3261
3262 if (offset_end - offset_start < REG_DUMP_ALIGN ||
3263 offset_start > offset_end) {
3264 pr_err("%pS: bad range, base_name %s, range_name %s, offset_start 0x%X, end 0x%X\n",
3265 __builtin_return_address(0), base_name,
3266 range_name, offset_start, offset_end);
3267 return;
3268 }
3269
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3270 range = kzalloc(sizeof(*range), GFP_KERNEL);
3271 if (!range)
3272 return;
3273
3274 strlcpy(range->range_name, range_name, sizeof(range->range_name));
3275 range->offset.start = offset_start;
3276 range->offset.end = offset_end;
3277 range->xin_id = xin_id;
3278 list_add_tail(&range->head, &reg_base->sub_range_list);
3279
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]3280 pr_debug("base %s, range %s, start 0x%X, end 0x%X\n",
3281 base_name, range->range_name,
Lloyd Atkinson113aefd2016-10-23 13:15:18 -0400[diff] [blame]3282 range->offset.start, range->offset.end);
3283}
Lloyd Atkinsonac4b6e02017-03-23 11:43:48 -0700[diff] [blame]3284
3285void sde_dbg_set_sde_top_offset(u32 blk_off)
3286{
3287 sde_dbg_base.dbgbus_sde.top_blk_off = blk_off;
3288}