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Greg Ungerer0e152d82011-06-20 15:49:09 +10001comment "Processor Type"
2
3config M68000
4 bool
5 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +10006 select CPU_HAS_NO_MULDIV64
Greg Ungerer7f73baf2011-10-18 15:49:19 +10007 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +10008 help
9 The Freescale (was Motorola) 68000 CPU is the first generation of
10 the well known M68K family of processors. The CPU core as well as
11 being available as a stand alone CPU was also used in many
12 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
13 a paging MMU.
14
15config MCPU32
16 bool
17 select CPU_HAS_NO_BITFIELDS
18 help
19 The Freescale (was then Motorola) CPU32 is a CPU core that is
20 based on the 68020 processor. For the most part it is used in
21 System-On-Chip parts, and does not contain a paging MMU.
22
23config COLDFIRE
24 bool
25 select GENERIC_GPIO
26 select ARCH_REQUIRE_GPIOLIB
27 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +100028 select CPU_HAS_NO_MULDIV64
Greg Ungerer7f73baf2011-10-18 15:49:19 +100029 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +100030 help
31 The Freescale ColdFire family of processors is a modern derivitive
32 of the 68000 processor family. They are mainly targeted at embedded
33 applications, and are all System-On-Chip (SOC) devices, as opposed
34 to stand alone CPUs. They implement a subset of the original 68000
35 processor instruction set.
36
37config M68020
38 bool "68020 support"
39 depends on MMU
Greg Ungerer5717a022011-10-19 16:27:30 +100040 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100041 help
42 If you anticipate running this kernel on a computer with a MC68020
43 processor, say Y. Otherwise, say N. Note that the 68020 requires a
44 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
45 Sun 3, which provides its own version.
46
47config M68030
48 bool "68030 support"
49 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100050 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100051 help
52 If you anticipate running this kernel on a computer with a MC68030
53 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
54 work, as it does not include an MMU (Memory Management Unit).
55
56config M68040
57 bool "68040 support"
58 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100059 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100060 help
61 If you anticipate running this kernel on a computer with a MC68LC040
62 or MC68040 processor, say Y. Otherwise, say N. Note that an
63 MC68EC040 will not work, as it does not include an MMU (Memory
64 Management Unit).
65
66config M68060
67 bool "68060 support"
68 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100069 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100070 help
71 If you anticipate running this kernel on a computer with a MC68060
72 processor, say Y. Otherwise, say N.
73
74config M68328
75 bool "MC68328"
76 depends on !MMU
77 select M68000
78 help
79 Motorola 68328 processor support.
80
81config M68EZ328
82 bool "MC68EZ328"
83 depends on !MMU
84 select M68000
85 help
86 Motorola 68EX328 processor support.
87
88config M68VZ328
89 bool "MC68VZ328"
90 depends on !MMU
91 select M68000
92 help
93 Motorola 68VZ328 processor support.
94
95config M68360
96 bool "MC68360"
97 depends on !MMU
98 select MCPU32
99 help
100 Motorola 68360 processor support.
101
102config M5206
103 bool "MCF5206"
104 depends on !MMU
105 select COLDFIRE
106 select COLDFIRE_SW_A7
107 select HAVE_MBAR
108 help
109 Motorola ColdFire 5206 processor support.
110
111config M5206e
112 bool "MCF5206e"
113 depends on !MMU
114 select COLDFIRE
115 select COLDFIRE_SW_A7
116 select HAVE_MBAR
117 help
118 Motorola ColdFire 5206e processor support.
119
120config M520x
121 bool "MCF520x"
122 depends on !MMU
123 select COLDFIRE
124 select GENERIC_CLOCKEVENTS
125 select HAVE_CACHE_SPLIT
126 help
127 Freescale Coldfire 5207/5208 processor support.
128
129config M523x
130 bool "MCF523x"
131 depends on !MMU
132 select COLDFIRE
133 select GENERIC_CLOCKEVENTS
134 select HAVE_CACHE_SPLIT
135 select HAVE_IPSBAR
136 help
137 Freescale Coldfire 5230/1/2/4/5 processor support
138
139config M5249
140 bool "MCF5249"
141 depends on !MMU
142 select COLDFIRE
143 select COLDFIRE_SW_A7
144 select HAVE_MBAR
145 help
146 Motorola ColdFire 5249 processor support.
147
148config M527x
149 bool
150
151config M5271
152 bool "MCF5271"
153 depends on !MMU
154 select COLDFIRE
155 select M527x
156 select HAVE_CACHE_SPLIT
157 select HAVE_IPSBAR
158 select GENERIC_CLOCKEVENTS
159 help
160 Freescale (Motorola) ColdFire 5270/5271 processor support.
161
162config M5272
163 bool "MCF5272"
164 depends on !MMU
165 select COLDFIRE
166 select COLDFIRE_SW_A7
167 select HAVE_MBAR
168 help
169 Motorola ColdFire 5272 processor support.
170
171config M5275
172 bool "MCF5275"
173 depends on !MMU
174 select COLDFIRE
175 select M527x
176 select HAVE_CACHE_SPLIT
177 select HAVE_IPSBAR
178 select GENERIC_CLOCKEVENTS
179 help
180 Freescale (Motorola) ColdFire 5274/5275 processor support.
181
182config M528x
183 bool "MCF528x"
184 depends on !MMU
185 select COLDFIRE
186 select GENERIC_CLOCKEVENTS
187 select HAVE_CACHE_SPLIT
188 select HAVE_IPSBAR
189 help
190 Motorola ColdFire 5280/5282 processor support.
191
192config M5307
193 bool "MCF5307"
194 depends on !MMU
195 select COLDFIRE
196 select COLDFIRE_SW_A7
197 select HAVE_CACHE_CB
198 select HAVE_MBAR
199 help
200 Motorola ColdFire 5307 processor support.
201
202config M532x
203 bool "MCF532x"
204 depends on !MMU
205 select COLDFIRE
206 select HAVE_CACHE_CB
207 help
208 Freescale (Motorola) ColdFire 532x processor support.
209
210config M5407
211 bool "MCF5407"
212 depends on !MMU
213 select COLDFIRE
214 select COLDFIRE_SW_A7
215 select HAVE_CACHE_CB
216 select HAVE_MBAR
217 help
218 Motorola ColdFire 5407 processor support.
219
220config M54xx
221 bool
222
223config M547x
224 bool "MCF547x"
225 depends on !MMU
226 select COLDFIRE
227 select M54xx
228 select HAVE_CACHE_CB
229 select HAVE_MBAR
230 help
231 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
232
233config M548x
234 bool "MCF548x"
235 depends on !MMU
236 select COLDFIRE
237 select M54xx
238 select HAVE_CACHE_CB
239 select HAVE_MBAR
240 help
241 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
242
243
244comment "Processor Specific Options"
245
246config M68KFPU_EMU
247 bool "Math emulation support (EXPERIMENTAL)"
248 depends on MMU
249 depends on EXPERIMENTAL
250 help
251 At some point in the future, this will cause floating-point math
252 instructions to be emulated by the kernel on machines that lack a
253 floating-point math coprocessor. Thrill-seekers and chronically
254 sleep-deprived psychotic hacker types can say Y now, everyone else
255 should probably wait a while.
256
257config M68KFPU_EMU_EXTRAPREC
258 bool "Math emulation extra precision"
259 depends on M68KFPU_EMU
260 help
261 The fpu uses normally a few bit more during calculations for
262 correct rounding, the emulator can (often) do the same but this
263 extra calculation can cost quite some time, so you can disable
264 it here. The emulator will then "only" calculate with a 64 bit
265 mantissa and round slightly incorrect, what is more than enough
266 for normal usage.
267
268config M68KFPU_EMU_ONLY
269 bool "Math emulation only kernel"
270 depends on M68KFPU_EMU
271 help
272 This option prevents any floating-point instructions from being
273 compiled into the kernel, thereby the kernel doesn't save any
274 floating point context anymore during task switches, so this
275 kernel will only be usable on machines without a floating-point
276 math coprocessor. This makes the kernel a bit faster as no tests
277 needs to be executed whether a floating-point instruction in the
278 kernel should be executed or not.
279
280config ADVANCED
281 bool "Advanced configuration options"
282 depends on MMU
283 ---help---
284 This gives you access to some advanced options for the CPU. The
285 defaults should be fine for most users, but these options may make
286 it possible for you to improve performance somewhat if you know what
287 you are doing.
288
289 Note that the answer to this question won't directly affect the
290 kernel: saying N will just cause the configurator to skip all
291 the questions about these options.
292
293 Most users should say N to this question.
294
295config RMW_INSNS
296 bool "Use read-modify-write instructions"
297 depends on ADVANCED
298 ---help---
299 This allows to use certain instructions that work with indivisible
300 read-modify-write bus cycles. While this is faster than the
301 workaround of disabling interrupts, it can conflict with DMA
302 ( = direct memory access) on many Amiga systems, and it is also said
303 to destabilize other machines. It is very likely that this will
304 cause serious problems on any Amiga or Atari Medusa if set. The only
305 configuration where it should work are 68030-based Ataris, where it
306 apparently improves performance. But you've been warned! Unless you
307 really know what you are doing, say N. Try Y only if you're quite
308 adventurous.
309
310config SINGLE_MEMORY_CHUNK
311 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
312 depends on MMU
313 default y if SUN3
314 select NEED_MULTIPLE_NODES
315 help
316 Ignore all but the first contiguous chunk of physical memory for VM
317 purposes. This will save a few bytes kernel size and may speed up
318 some operations. Say N if not sure.
319
320config ARCH_DISCONTIGMEM_ENABLE
321 def_bool MMU && !SINGLE_MEMORY_CHUNK
322
323config 060_WRITETHROUGH
324 bool "Use write-through caching for 68060 supervisor accesses"
325 depends on ADVANCED && M68060
326 ---help---
327 The 68060 generally uses copyback caching of recently accessed data.
328 Copyback caching means that memory writes will be held in an on-chip
329 cache and only written back to memory some time later. Saying Y
330 here will force supervisor (kernel) accesses to use writethrough
331 caching. Writethrough caching means that data is written to memory
332 straight away, so that cache and memory data always agree.
333 Writethrough caching is less efficient, but is needed for some
334 drivers on 68060 based systems where the 68060 bus snooping signal
335 is hardwired on. The 53c710 SCSI driver is known to suffer from
336 this problem.
337
338config M68K_L2_CACHE
339 bool
340 depends on MAC
341 default y
342
343config NODES_SHIFT
344 int
345 default "3"
346 depends on !SINGLE_MEMORY_CHUNK
347
348config FPU
349 bool
350
351config COLDFIRE_SW_A7
352 bool
353
354config HAVE_CACHE_SPLIT
355 bool
356
357config HAVE_CACHE_CB
358 bool
359
360config HAVE_MBAR
361 bool
362
363config HAVE_IPSBAR
364 bool
365
366config CLOCK_SET
367 bool "Enable setting the CPU clock frequency"
368 depends on COLDFIRE
369 default n
370 help
371 On some CPU's you do not need to know what the core CPU clock
372 frequency is. On these you can disable clock setting. On some
373 traditional 68K parts, and on all ColdFire parts you need to set
374 the appropriate CPU clock frequency. On these devices many of the
375 onboard peripherals derive their timing from the master CPU clock
376 frequency.
377
378config CLOCK_FREQ
379 int "Set the core clock frequency"
380 default "66666666"
381 depends on CLOCK_SET
382 help
383 Define the CPU clock frequency in use. This is the core clock
384 frequency, it may or may not be the same as the external clock
385 crystal fitted to your board. Some processors have an internal
386 PLL and can have their frequency programmed at run time, others
387 use internal dividers. In general the kernel won't setup a PLL
388 if it is fitted (there are some exceptions). This value will be
389 specific to the exact CPU that you are using.
390
391config OLDMASK
392 bool "Old mask 5307 (1H55J) silicon"
393 depends on M5307
394 help
395 Build support for the older revision ColdFire 5307 silicon.
396 Specifically this is the 1H55J mask revision.
397
398if HAVE_CACHE_SPLIT
399choice
400 prompt "Split Cache Configuration"
401 default CACHE_I
402
403config CACHE_I
404 bool "Instruction"
405 help
406 Use all of the ColdFire CPU cache memory as an instruction cache.
407
408config CACHE_D
409 bool "Data"
410 help
411 Use all of the ColdFire CPU cache memory as a data cache.
412
413config CACHE_BOTH
414 bool "Both"
415 help
416 Split the ColdFire CPU cache, and use half as an instruction cache
417 and half as a data cache.
418endchoice
419endif
420
421if HAVE_CACHE_CB
422choice
423 prompt "Data cache mode"
424 default CACHE_WRITETHRU
425
426config CACHE_WRITETHRU
427 bool "Write-through"
428 help
429 The ColdFire CPU cache is set into Write-through mode.
430
431config CACHE_COPYBACK
432 bool "Copy-back"
433 help
434 The ColdFire CPU cache is set into Copy-back mode.
435endchoice
436endif
437