blob: 85d9cabe6d555d9e28e3812f1d97f631434ff461 [file] [log] [blame]
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +02001/*
2 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * You should have received a copy of the GNU General Public License along
9 * with this program; if not, write to the Free Software Foundation, Inc.,
10 * 675 Mass Ave, Cambridge, MA 02139, USA.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/slab.h>
Axel Lin68bfcaf2011-12-06 15:19:00 +080018#include <linux/io.h>
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020019
20#include <linux/delay.h>
21
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/initval.h>
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020026#include <sound/soc.h>
27
28#define JZ4740_REG_CODEC_1 0x0
29#define JZ4740_REG_CODEC_2 0x1
30
31#define JZ4740_CODEC_1_LINE_ENABLE BIT(29)
32#define JZ4740_CODEC_1_MIC_ENABLE BIT(28)
33#define JZ4740_CODEC_1_SW1_ENABLE BIT(27)
34#define JZ4740_CODEC_1_ADC_ENABLE BIT(26)
35#define JZ4740_CODEC_1_SW2_ENABLE BIT(25)
36#define JZ4740_CODEC_1_DAC_ENABLE BIT(24)
37#define JZ4740_CODEC_1_VREF_DISABLE BIT(20)
38#define JZ4740_CODEC_1_VREF_AMP_DISABLE BIT(19)
39#define JZ4740_CODEC_1_VREF_PULLDOWN BIT(18)
40#define JZ4740_CODEC_1_VREF_LOW_CURRENT BIT(17)
41#define JZ4740_CODEC_1_VREF_HIGH_CURRENT BIT(16)
42#define JZ4740_CODEC_1_HEADPHONE_DISABLE BIT(14)
43#define JZ4740_CODEC_1_HEADPHONE_AMP_CHANGE_ANY BIT(13)
44#define JZ4740_CODEC_1_HEADPHONE_CHARGE BIT(12)
45#define JZ4740_CODEC_1_HEADPHONE_PULLDOWN (BIT(11) | BIT(10))
46#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M BIT(9)
47#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN BIT(8)
48#define JZ4740_CODEC_1_SUSPEND BIT(1)
49#define JZ4740_CODEC_1_RESET BIT(0)
50
51#define JZ4740_CODEC_1_LINE_ENABLE_OFFSET 29
52#define JZ4740_CODEC_1_MIC_ENABLE_OFFSET 28
53#define JZ4740_CODEC_1_SW1_ENABLE_OFFSET 27
54#define JZ4740_CODEC_1_ADC_ENABLE_OFFSET 26
55#define JZ4740_CODEC_1_SW2_ENABLE_OFFSET 25
56#define JZ4740_CODEC_1_DAC_ENABLE_OFFSET 24
57#define JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET 14
58#define JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET 8
59
60#define JZ4740_CODEC_2_INPUT_VOLUME_MASK 0x1f0000
61#define JZ4740_CODEC_2_SAMPLE_RATE_MASK 0x000f00
62#define JZ4740_CODEC_2_MIC_BOOST_GAIN_MASK 0x000030
63#define JZ4740_CODEC_2_HEADPHONE_VOLUME_MASK 0x000003
64
65#define JZ4740_CODEC_2_INPUT_VOLUME_OFFSET 16
66#define JZ4740_CODEC_2_SAMPLE_RATE_OFFSET 8
67#define JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET 4
68#define JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET 0
69
70static const uint32_t jz4740_codec_regs[] = {
71 0x021b2302, 0x00170803,
72};
73
74struct jz4740_codec {
75 void __iomem *base;
76 struct resource *mem;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020077};
78
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020079static unsigned int jz4740_codec_read(struct snd_soc_codec *codec,
80 unsigned int reg)
81{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000082 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020083 return readl(jz4740_codec->base + (reg << 2));
84}
85
86static int jz4740_codec_write(struct snd_soc_codec *codec, unsigned int reg,
87 unsigned int val)
88{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000089 struct jz4740_codec *jz4740_codec = snd_soc_codec_get_drvdata(codec);
90 u32 *cache = codec->reg_cache;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020091
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000092 cache[reg] = val;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +020093 writel(val, jz4740_codec->base + (reg << 2));
94
95 return 0;
96}
97
98static const struct snd_kcontrol_new jz4740_codec_controls[] = {
99 SOC_SINGLE("Master Playback Volume", JZ4740_REG_CODEC_2,
100 JZ4740_CODEC_2_HEADPHONE_VOLUME_OFFSET, 3, 0),
101 SOC_SINGLE("Master Capture Volume", JZ4740_REG_CODEC_2,
102 JZ4740_CODEC_2_INPUT_VOLUME_OFFSET, 31, 0),
103 SOC_SINGLE("Master Playback Switch", JZ4740_REG_CODEC_1,
104 JZ4740_CODEC_1_HEADPHONE_DISABLE_OFFSET, 1, 1),
105 SOC_SINGLE("Mic Capture Volume", JZ4740_REG_CODEC_2,
106 JZ4740_CODEC_2_MIC_BOOST_GAIN_OFFSET, 3, 0),
107};
108
109static const struct snd_kcontrol_new jz4740_codec_output_controls[] = {
110 SOC_DAPM_SINGLE("Bypass Switch", JZ4740_REG_CODEC_1,
111 JZ4740_CODEC_1_SW1_ENABLE_OFFSET, 1, 0),
112 SOC_DAPM_SINGLE("DAC Switch", JZ4740_REG_CODEC_1,
113 JZ4740_CODEC_1_SW2_ENABLE_OFFSET, 1, 0),
114};
115
116static const struct snd_kcontrol_new jz4740_codec_input_controls[] = {
117 SOC_DAPM_SINGLE("Line Capture Switch", JZ4740_REG_CODEC_1,
118 JZ4740_CODEC_1_LINE_ENABLE_OFFSET, 1, 0),
119 SOC_DAPM_SINGLE("Mic Capture Switch", JZ4740_REG_CODEC_1,
120 JZ4740_CODEC_1_MIC_ENABLE_OFFSET, 1, 0),
121};
122
123static const struct snd_soc_dapm_widget jz4740_codec_dapm_widgets[] = {
124 SND_SOC_DAPM_ADC("ADC", "Capture", JZ4740_REG_CODEC_1,
125 JZ4740_CODEC_1_ADC_ENABLE_OFFSET, 0),
126 SND_SOC_DAPM_DAC("DAC", "Playback", JZ4740_REG_CODEC_1,
127 JZ4740_CODEC_1_DAC_ENABLE_OFFSET, 0),
128
129 SND_SOC_DAPM_MIXER("Output Mixer", JZ4740_REG_CODEC_1,
130 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_OFFSET, 1,
131 jz4740_codec_output_controls,
132 ARRAY_SIZE(jz4740_codec_output_controls)),
133
134 SND_SOC_DAPM_MIXER_NAMED_CTL("Input Mixer", SND_SOC_NOPM, 0, 0,
135 jz4740_codec_input_controls,
136 ARRAY_SIZE(jz4740_codec_input_controls)),
137 SND_SOC_DAPM_MIXER("Line Input", SND_SOC_NOPM, 0, 0, NULL, 0),
138
139 SND_SOC_DAPM_OUTPUT("LOUT"),
140 SND_SOC_DAPM_OUTPUT("ROUT"),
141
142 SND_SOC_DAPM_INPUT("MIC"),
143 SND_SOC_DAPM_INPUT("LIN"),
144 SND_SOC_DAPM_INPUT("RIN"),
145};
146
147static const struct snd_soc_dapm_route jz4740_codec_dapm_routes[] = {
148 {"Line Input", NULL, "LIN"},
149 {"Line Input", NULL, "RIN"},
150
151 {"Input Mixer", "Line Capture Switch", "Line Input"},
152 {"Input Mixer", "Mic Capture Switch", "MIC"},
153
154 {"ADC", NULL, "Input Mixer"},
155
156 {"Output Mixer", "Bypass Switch", "Input Mixer"},
157 {"Output Mixer", "DAC Switch", "DAC"},
158
159 {"LOUT", NULL, "Output Mixer"},
160 {"ROUT", NULL, "Output Mixer"},
161};
162
163static int jz4740_codec_hw_params(struct snd_pcm_substream *substream,
164 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
165{
166 uint32_t val;
Mark Browne6968a12012-04-04 15:58:16 +0100167 struct snd_soc_codec *codec = dai->codec;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200168
169 switch (params_rate(params)) {
170 case 8000:
171 val = 0;
172 break;
173 case 11025:
174 val = 1;
175 break;
176 case 12000:
177 val = 2;
178 break;
179 case 16000:
180 val = 3;
181 break;
182 case 22050:
183 val = 4;
184 break;
185 case 24000:
186 val = 5;
187 break;
188 case 32000:
189 val = 6;
190 break;
191 case 44100:
192 val = 7;
193 break;
194 case 48000:
195 val = 8;
196 break;
197 default:
198 return -EINVAL;
199 }
200
201 val <<= JZ4740_CODEC_2_SAMPLE_RATE_OFFSET;
202
203 snd_soc_update_bits(codec, JZ4740_REG_CODEC_2,
204 JZ4740_CODEC_2_SAMPLE_RATE_MASK, val);
205
206 return 0;
207}
208
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100209static const struct snd_soc_dai_ops jz4740_codec_dai_ops = {
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200210 .hw_params = jz4740_codec_hw_params,
211};
212
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000213static struct snd_soc_dai_driver jz4740_codec_dai = {
214 .name = "jz4740-hifi",
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200215 .playback = {
216 .stream_name = "Playback",
217 .channels_min = 2,
218 .channels_max = 2,
219 .rates = SNDRV_PCM_RATE_8000_48000,
220 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
221 },
222 .capture = {
223 .stream_name = "Capture",
224 .channels_min = 2,
225 .channels_max = 2,
226 .rates = SNDRV_PCM_RATE_8000_48000,
227 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
228 },
229 .ops = &jz4740_codec_dai_ops,
230 .symmetric_rates = 1,
231};
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200232
233static void jz4740_codec_wakeup(struct snd_soc_codec *codec)
234{
235 int i;
236 uint32_t *cache = codec->reg_cache;
237
238 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
239 JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET);
240 udelay(2);
241
242 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
243 JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0);
244
245 for (i = 0; i < ARRAY_SIZE(jz4740_codec_regs); ++i)
246 jz4740_codec_write(codec, i, cache[i]);
247}
248
249static int jz4740_codec_set_bias_level(struct snd_soc_codec *codec,
250 enum snd_soc_bias_level level)
251{
252 unsigned int mask;
253 unsigned int value;
254
255 switch (level) {
256 case SND_SOC_BIAS_ON:
257 break;
258 case SND_SOC_BIAS_PREPARE:
259 mask = JZ4740_CODEC_1_VREF_DISABLE |
260 JZ4740_CODEC_1_VREF_AMP_DISABLE |
261 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
262 value = 0;
263
264 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
265 break;
266 case SND_SOC_BIAS_STANDBY:
267 /* The only way to clear the suspend flag is to reset the codec */
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200268 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200269 jz4740_codec_wakeup(codec);
270
271 mask = JZ4740_CODEC_1_VREF_DISABLE |
272 JZ4740_CODEC_1_VREF_AMP_DISABLE |
273 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
274 value = JZ4740_CODEC_1_VREF_DISABLE |
275 JZ4740_CODEC_1_VREF_AMP_DISABLE |
276 JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
277
278 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
279 break;
280 case SND_SOC_BIAS_OFF:
281 mask = JZ4740_CODEC_1_SUSPEND;
282 value = JZ4740_CODEC_1_SUSPEND;
283
284 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1, mask, value);
285 break;
286 default:
287 break;
288 }
289
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200290 codec->dapm.bias_level = level;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200291
292 return 0;
293}
294
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000295static int jz4740_codec_dev_probe(struct snd_soc_codec *codec)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200296{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000297 snd_soc_update_bits(codec, JZ4740_REG_CODEC_1,
298 JZ4740_CODEC_1_SW2_ENABLE, JZ4740_CODEC_1_SW2_ENABLE);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200299
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000300 jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
301
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200302 return 0;
303}
304
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000305static int jz4740_codec_dev_remove(struct snd_soc_codec *codec)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200306{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000307 jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200308
309 return 0;
310}
311
312#ifdef CONFIG_PM_SLEEP
313
Lars-Peter Clausen84b315e2011-12-02 10:18:28 +0100314static int jz4740_codec_suspend(struct snd_soc_codec *codec)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200315{
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200316 return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
317}
318
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000319static int jz4740_codec_resume(struct snd_soc_codec *codec)
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200320{
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200321 return jz4740_codec_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
322}
323
324#else
325#define jz4740_codec_suspend NULL
326#define jz4740_codec_resume NULL
327#endif
328
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000329static struct snd_soc_codec_driver soc_codec_dev_jz4740_codec = {
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200330 .probe = jz4740_codec_dev_probe,
331 .remove = jz4740_codec_dev_remove,
332 .suspend = jz4740_codec_suspend,
333 .resume = jz4740_codec_resume,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000334 .read = jz4740_codec_read,
335 .write = jz4740_codec_write,
336 .set_bias_level = jz4740_codec_set_bias_level,
337 .reg_cache_default = jz4740_codec_regs,
338 .reg_word_size = sizeof(u32),
339 .reg_cache_size = 2,
Lars-Peter Clausen67447912011-04-12 19:33:29 +0200340
341 .controls = jz4740_codec_controls,
342 .num_controls = ARRAY_SIZE(jz4740_codec_controls),
343 .dapm_widgets = jz4740_codec_dapm_widgets,
344 .num_dapm_widgets = ARRAY_SIZE(jz4740_codec_dapm_widgets),
345 .dapm_routes = jz4740_codec_dapm_routes,
346 .num_dapm_routes = ARRAY_SIZE(jz4740_codec_dapm_routes),
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200347};
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200348
349static int __devinit jz4740_codec_probe(struct platform_device *pdev)
350{
351 int ret;
352 struct jz4740_codec *jz4740_codec;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200353 struct resource *mem;
354
Axel Lin558460c2011-12-26 20:55:01 +0800355 jz4740_codec = devm_kzalloc(&pdev->dev, sizeof(*jz4740_codec),
356 GFP_KERNEL);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200357 if (!jz4740_codec)
358 return -ENOMEM;
359
360 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
361 if (!mem) {
362 dev_err(&pdev->dev, "Failed to get mmio memory resource\n");
363 ret = -ENOENT;
Axel Lin558460c2011-12-26 20:55:01 +0800364 goto err_out;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200365 }
366
367 mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
368 if (!mem) {
369 dev_err(&pdev->dev, "Failed to request mmio memory region\n");
370 ret = -EBUSY;
Axel Lin558460c2011-12-26 20:55:01 +0800371 goto err_out;
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200372 }
373
374 jz4740_codec->base = ioremap(mem->start, resource_size(mem));
375 if (!jz4740_codec->base) {
376 dev_err(&pdev->dev, "Failed to ioremap mmio memory\n");
377 ret = -EBUSY;
378 goto err_release_mem_region;
379 }
380 jz4740_codec->mem = mem;
381
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200382 platform_set_drvdata(pdev, jz4740_codec);
383
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000384 ret = snd_soc_register_codec(&pdev->dev,
385 &soc_codec_dev_jz4740_codec, &jz4740_codec_dai, 1);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200386 if (ret) {
387 dev_err(&pdev->dev, "Failed to register codec\n");
388 goto err_iounmap;
389 }
390
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200391 return 0;
392
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200393err_iounmap:
394 iounmap(jz4740_codec->base);
395err_release_mem_region:
396 release_mem_region(mem->start, resource_size(mem));
Axel Lin558460c2011-12-26 20:55:01 +0800397err_out:
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200398 return ret;
399}
400
401static int __devexit jz4740_codec_remove(struct platform_device *pdev)
402{
403 struct jz4740_codec *jz4740_codec = platform_get_drvdata(pdev);
404 struct resource *mem = jz4740_codec->mem;
405
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000406 snd_soc_unregister_codec(&pdev->dev);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200407
408 iounmap(jz4740_codec->base);
409 release_mem_region(mem->start, resource_size(mem));
410
411 platform_set_drvdata(pdev, NULL);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200412
413 return 0;
414}
415
416static struct platform_driver jz4740_codec_driver = {
417 .probe = jz4740_codec_probe,
418 .remove = __devexit_p(jz4740_codec_remove),
419 .driver = {
420 .name = "jz4740-codec",
421 .owner = THIS_MODULE,
422 },
423};
424
Mark Brown5bbcc3c2011-11-23 22:52:08 +0000425module_platform_driver(jz4740_codec_driver);
Lars-Peter Clausen3b097d62010-06-22 00:46:31 +0200426
427MODULE_DESCRIPTION("JZ4740 SoC internal codec driver");
428MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
429MODULE_LICENSE("GPL v2");
430MODULE_ALIAS("platform:jz4740-codec");