| David Brown | 56e2d8a | 2011-08-04 02:01:02 -0700 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | /include/ "skeleton.dtsi" |
| 4 | |
| 5 | / { |
| 6 | model = "Qualcomm MSM8660 SURF"; |
| 7 | compatible = "qcom,msm8660-surf", "qcom,msm8660"; |
| 8 | interrupt-parent = <&intc>; |
| 9 | |
| Stephen Boyd | 8407116 | 2012-09-05 12:28:54 -0700 | [diff] [blame] | 10 | intc: interrupt-controller@2080000 { |
| David Brown | 56e2d8a | 2011-08-04 02:01:02 -0700 | [diff] [blame] | 11 | compatible = "qcom,msm-8660-qgic"; |
| 12 | interrupt-controller; |
| David Brown | 2b7b9a7 | 2012-04-23 15:34:20 -0700 | [diff] [blame] | 13 | #interrupt-cells = <3>; |
| David Brown | 56e2d8a | 2011-08-04 02:01:02 -0700 | [diff] [blame] | 14 | reg = < 0x02080000 0x1000 >, |
| 15 | < 0x02081000 0x1000 >; |
| 16 | }; |
| 17 | |
| Stephen Boyd | 8407116 | 2012-09-05 12:28:54 -0700 | [diff] [blame] | 18 | timer@2000004 { |
| 19 | compatible = "qcom,msm-gpt", "qcom,msm-timer"; |
| 20 | interrupts = <1 1 0x301>; |
| 21 | reg = <0x02000004 0x10>; |
| 22 | clock-frequency = <32768>; |
| 23 | cpu-offset = <0x40000>; |
| 24 | }; |
| 25 | |
| 26 | timer@2000024 { |
| 27 | compatible = "qcom,msm-dgt", "qcom,msm-timer"; |
| 28 | interrupts = <1 0 0x301>; |
| 29 | reg = <0x02000024 0x10>, |
| 30 | <0x02000034 0x4>; |
| 31 | clock-frequency = <6750000>; |
| 32 | cpu-offset = <0x40000>; |
| 33 | }; |
| 34 | |
| David Brown | 56e2d8a | 2011-08-04 02:01:02 -0700 | [diff] [blame] | 35 | serial@19c400000 { |
| 36 | compatible = "qcom,msm-hsuart", "qcom,msm-uart"; |
| 37 | reg = <0x19c40000 0x1000>, |
| 38 | <0x19c00000 0x1000>; |
| David Brown | 2b7b9a7 | 2012-04-23 15:34:20 -0700 | [diff] [blame] | 39 | interrupts = <0 195 0x0>; |
| David Brown | 56e2d8a | 2011-08-04 02:01:02 -0700 | [diff] [blame] | 40 | }; |
| 41 | }; |