blob: 5e18a53e2c0c5b16b5c35f5fc1a3e9c3a0d86ade [file] [log] [blame]
Ben Skeggs6ee73862009-12-11 19:24:15 +10001#
2# Makefile for the drm device driver. This driver provides support for the
3# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
4
Ben Skeggs9274f4a2012-07-06 07:36:43 +10005ccflags-y := -Iinclude/drm -DCONFIG_NOUVEAU_DEBUG=7 -DCONFIG_NOUVEAU_DEBUG_DEFAULT=3
Ben Skeggs02a841d2012-07-04 23:44:54 +10006ccflags-y += -I$(src)/core/include
7ccflags-y += -I$(src)
8
Ben Skeggs9274f4a2012-07-06 07:36:43 +10009nouveau-y := core/core/client.o
10nouveau-y += core/core/engine.o
Ben Skeggs861d2102012-07-11 19:05:01 +100011nouveau-y += core/core/enum.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100012nouveau-y += core/core/handle.o
13nouveau-y += core/core/mm.o
14nouveau-y += core/core/namedb.o
15nouveau-y += core/core/object.o
16nouveau-y += core/core/option.o
17nouveau-y += core/core/parent.o
18nouveau-y += core/core/printk.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100019nouveau-y += core/core/ramht.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100020nouveau-y += core/core/subdev.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100021
Ben Skeggs70c0f262012-07-10 10:49:22 +100022nouveau-y += core/subdev/bios/base.o
23nouveau-y += core/subdev/bios/bit.o
Ben Skeggscb75d972012-07-11 10:44:20 +100024nouveau-y += core/subdev/bios/conn.o
Ben Skeggse0996ae2012-07-10 12:20:17 +100025nouveau-y += core/subdev/bios/dcb.o
Ben Skeggscb75d972012-07-11 10:44:20 +100026nouveau-y += core/subdev/bios/dp.o
Ben Skeggse0996ae2012-07-10 12:20:17 +100027nouveau-y += core/subdev/bios/gpio.o
Ben Skeggs4196faa2012-07-10 14:36:38 +100028nouveau-y += core/subdev/bios/i2c.o
Ben Skeggscb75d972012-07-11 10:44:20 +100029nouveau-y += core/subdev/bios/init.o
Ben Skeggs70790f42012-07-10 17:26:46 +100030nouveau-y += core/subdev/bios/pll.o
Ben Skeggs8aceb7d2012-07-10 16:45:24 +100031nouveau-y += core/subdev/clock/nv04.o
32nouveau-y += core/subdev/clock/nv40.o
33nouveau-y += core/subdev/clock/nv50.o
34nouveau-y += core/subdev/clock/nva3.o
35nouveau-y += core/subdev/clock/nvc0.o
Ben Skeggs70790f42012-07-10 17:26:46 +100036nouveau-y += core/subdev/clock/pllnv04.o
37nouveau-y += core/subdev/clock/pllnva3.o
Ben Skeggs9274f4a2012-07-06 07:36:43 +100038nouveau-y += core/subdev/device/base.o
39nouveau-y += core/subdev/device/nv04.o
40nouveau-y += core/subdev/device/nv10.o
41nouveau-y += core/subdev/device/nv20.o
42nouveau-y += core/subdev/device/nv30.o
43nouveau-y += core/subdev/device/nv40.o
44nouveau-y += core/subdev/device/nv50.o
45nouveau-y += core/subdev/device/nvc0.o
46nouveau-y += core/subdev/device/nve0.o
Ben Skeggscb75d972012-07-11 10:44:20 +100047nouveau-y += core/subdev/devinit/base.o
48nouveau-y += core/subdev/devinit/nv04.o
49nouveau-y += core/subdev/devinit/nv05.o
50nouveau-y += core/subdev/devinit/nv10.o
51nouveau-y += core/subdev/devinit/nv1a.o
52nouveau-y += core/subdev/devinit/nv20.o
53nouveau-y += core/subdev/devinit/nv50.o
Ben Skeggs861d2102012-07-11 19:05:01 +100054nouveau-y += core/subdev/fb/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100055nouveau-y += core/subdev/fb/nv04.o
56nouveau-y += core/subdev/fb/nv10.o
57nouveau-y += core/subdev/fb/nv20.o
58nouveau-y += core/subdev/fb/nv30.o
59nouveau-y += core/subdev/fb/nv40.o
60nouveau-y += core/subdev/fb/nv50.o
61nouveau-y += core/subdev/fb/nvc0.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100062nouveau-y += core/subdev/gpio/base.o
63nouveau-y += core/subdev/gpio/nv10.o
64nouveau-y += core/subdev/gpio/nv50.o
Ben Skeggse0996ae2012-07-10 12:20:17 +100065nouveau-y += core/subdev/gpio/nvd0.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100066nouveau-y += core/subdev/i2c/base.o
Ben Skeggs4196faa2012-07-10 14:36:38 +100067nouveau-y += core/subdev/i2c/aux.o
68nouveau-y += core/subdev/i2c/bit.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100069nouveau-y += core/subdev/instmem/nv04.o
70nouveau-y += core/subdev/instmem/nv50.o
71nouveau-y += core/subdev/instmem/nvc0.o
Ben Skeggs861d2102012-07-11 19:05:01 +100072nouveau-y += core/subdev/ltcg/nvc0.o
Ben Skeggs7d9115d2012-07-11 15:58:56 +100073nouveau-y += core/subdev/mc/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100074nouveau-y += core/subdev/mc/nv04.o
Ben Skeggs7d9115d2012-07-11 15:58:56 +100075nouveau-y += core/subdev/mc/nv44.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100076nouveau-y += core/subdev/mc/nv50.o
Ben Skeggs7d9115d2012-07-11 15:58:56 +100077nouveau-y += core/subdev/mc/nv98.o
78nouveau-y += core/subdev/mc/nvc0.o
Ben Skeggs5a5c7432012-07-11 16:08:25 +100079nouveau-y += core/subdev/timer/base.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100080nouveau-y += core/subdev/timer/nv04.o
81nouveau-y += core/subdev/vm/base.o
82nouveau-y += core/subdev/vm/nv50.o
83nouveau-y += core/subdev/vm/nvc0.o
84
85nouveau-y += core/engine/bsp/nv84.o
86nouveau-y += core/engine/copy/nva3.o
87nouveau-y += core/engine/copy/nvc0.o
88nouveau-y += core/engine/crypt/nv84.o
89nouveau-y += core/engine/crypt/nv98.o
Ben Skeggs4196faa2012-07-10 14:36:38 +100090nouveau-y += core/engine/disp/vga.o
Ben Skeggs02a841d2012-07-04 23:44:54 +100091nouveau-y += core/engine/fifo/nv04.o
92nouveau-y += core/engine/fifo/nv10.o
93nouveau-y += core/engine/fifo/nv17.o
94nouveau-y += core/engine/fifo/nv40.o
95nouveau-y += core/engine/fifo/nv50.o
96nouveau-y += core/engine/fifo/nv84.o
97nouveau-y += core/engine/fifo/nvc0.o
98nouveau-y += core/engine/fifo/nve0.o
99nouveau-y += core/engine/graph/ctxnv40.o
100nouveau-y += core/engine/graph/ctxnv50.o
101nouveau-y += core/engine/graph/ctxnvc0.o
102nouveau-y += core/engine/graph/ctxnve0.o
103nouveau-y += core/engine/graph/nv04.o
104nouveau-y += core/engine/graph/nv10.o
105nouveau-y += core/engine/graph/nv20.o
106nouveau-y += core/engine/graph/nv40.o
107nouveau-y += core/engine/graph/nv50.o
108nouveau-y += core/engine/graph/nvc0.o
109nouveau-y += core/engine/graph/nve0.o
110nouveau-y += core/engine/mpeg/nv31.o
111nouveau-y += core/engine/mpeg/nv50.o
112nouveau-y += core/engine/ppp/nv98.o
113nouveau-y += core/engine/vp/nv84.o
114
Ben Skeggs586c55f2012-07-09 14:14:48 +1000115nouveau-y += nouveau_drm.o nouveau_compat.o \
Ben Skeggs94580292012-07-06 12:14:00 +1000116 nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
Ben Skeggsce22af02012-05-05 22:19:20 +1000117 nouveau_gpuobj.o nouveau_irq.o nouveau_notifier.o \
Ben Skeggsd7facf92010-11-03 10:06:43 +1000118 nouveau_sgdma.o nouveau_dma.o nouveau_util.o \
Ben Skeggs6ee73862009-12-11 19:24:15 +1000119 nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
Ben Skeggs02a841d2012-07-04 23:44:54 +1000120 nouveau_hw.o nouveau_calc.o \
Ben Skeggs054b93e2009-12-15 22:02:47 +1000121 nouveau_display.o nouveau_connector.o nouveau_fbcon.o \
Ben Skeggs02a841d2012-07-04 23:44:54 +1000122 nouveau_hdmi.o nouveau_dp.o \
Ben Skeggsfade7ad2010-09-27 11:18:14 +1000123 nouveau_pm.o nouveau_volt.o nouveau_perf.o nouveau_temp.o \
Ben Skeggsaa4cc5d22012-07-05 21:36:32 +1000124 nouveau_mxm.o nouveau_agp.o \
Ben Skeggs2a259a32012-05-08 10:24:27 +1000125 nouveau_abi16.o \
Ben Skeggs02a841d2012-07-04 23:44:54 +1000126 nouveau_bios.o \
Ben Skeggs5e120f62012-04-30 13:55:29 +1000127 nv04_fence.o nv10_fence.o nv84_fence.o nvc0_fence.o \
Ben Skeggs20abd162012-04-30 11:33:43 -0500128 nv04_software.o nv50_software.o nvc0_software.o \
Ben Skeggs6ee73862009-12-11 19:24:15 +1000129 nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
Ben Skeggsddbaf792010-11-24 10:52:43 +1000130 nv04_crtc.o nv04_display.o nv04_cursor.o \
Ben Skeggs37b034a2011-07-08 14:43:19 +1000131 nv50_evo.o nv50_crtc.o nv50_dac.o nv50_sor.o \
132 nv50_cursor.o nv50_display.o \
Ben Skeggs26f6d882011-07-04 16:25:18 +1000133 nvd0_display.o \
Ben Skeggs37b034a2011-07-08 14:43:19 +1000134 nv04_fbcon.o nv50_fbcon.o nvc0_fbcon.o \
Ben Skeggs1262a202011-07-18 15:15:34 +1000135 nv04_pm.o nv40_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o \
Ben Skeggs02a841d2012-07-04 23:44:54 +1000136 nouveau_prime.o
Ben Skeggs6ee73862009-12-11 19:24:15 +1000137
138nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o
139nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o
140nouveau-$(CONFIG_DRM_NOUVEAU_BACKLIGHT) += nouveau_backlight.o
141nouveau-$(CONFIG_ACPI) += nouveau_acpi.o
142
143obj-$(CONFIG_DRM_NOUVEAU)+= nouveau.o