David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 1 | /* pci_iommu.c: UltraSparc PCI controller IOM/STC support. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 3 | * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright (C) 1999, 2000 Jakub Jelinek (jakub@redhat.com) |
| 5 | */ |
| 6 | |
| 7 | #include <linux/kernel.h> |
| 8 | #include <linux/sched.h> |
| 9 | #include <linux/mm.h> |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 10 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | |
| 12 | #include <asm/pbm.h> |
| 13 | |
| 14 | #include "iommu_common.h" |
| 15 | |
| 16 | #define PCI_STC_CTXMATCH_ADDR(STC, CTX) \ |
| 17 | ((STC)->strbuf_ctxmatch_base + ((CTX) << 3)) |
| 18 | |
| 19 | /* Accessing IOMMU and Streaming Buffer registers. |
| 20 | * REG parameter is a physical address. All registers |
| 21 | * are 64-bits in size. |
| 22 | */ |
| 23 | #define pci_iommu_read(__reg) \ |
| 24 | ({ u64 __ret; \ |
| 25 | __asm__ __volatile__("ldxa [%1] %2, %0" \ |
| 26 | : "=r" (__ret) \ |
| 27 | : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \ |
| 28 | : "memory"); \ |
| 29 | __ret; \ |
| 30 | }) |
| 31 | #define pci_iommu_write(__reg, __val) \ |
| 32 | __asm__ __volatile__("stxa %0, [%1] %2" \ |
| 33 | : /* no outputs */ \ |
| 34 | : "r" (__val), "r" (__reg), \ |
| 35 | "i" (ASI_PHYS_BYPASS_EC_E)) |
| 36 | |
| 37 | /* Must be invoked under the IOMMU lock. */ |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 38 | static void __iommu_flushall(struct iommu *iommu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | { |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame^] | 40 | if (iommu->iommu_flushinv) { |
| 41 | pci_iommu_write(iommu->iommu_flushinv, ~(u64)0); |
| 42 | } else { |
| 43 | unsigned long tag; |
| 44 | int entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | |
David S. Miller | 861fe90 | 2007-05-02 17:31:36 -0700 | [diff] [blame^] | 46 | tag = iommu->iommu_flush + (0xa580UL - 0x0210UL); |
| 47 | for (entry = 0; entry < 16; entry++) { |
| 48 | pci_iommu_write(tag, 0); |
| 49 | tag += 8; |
| 50 | } |
| 51 | |
| 52 | /* Ensure completion of previous PIO writes. */ |
| 53 | (void) pci_iommu_read(iommu->write_complete_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | } |
| 56 | |
| 57 | #define IOPTE_CONSISTENT(CTX) \ |
| 58 | (IOPTE_VALID | IOPTE_CACHE | \ |
| 59 | (((CTX) << 47) & IOPTE_CONTEXT)) |
| 60 | |
| 61 | #define IOPTE_STREAMING(CTX) \ |
| 62 | (IOPTE_CONSISTENT(CTX) | IOPTE_STBUF) |
| 63 | |
| 64 | /* Existing mappings are never marked invalid, instead they |
| 65 | * are pointed to a dummy page. |
| 66 | */ |
| 67 | #define IOPTE_IS_DUMMY(iommu, iopte) \ |
| 68 | ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa) |
| 69 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 70 | static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | { |
| 72 | unsigned long val = iopte_val(*iopte); |
| 73 | |
| 74 | val &= ~IOPTE_PAGE; |
| 75 | val |= iommu->dummy_page_pa; |
| 76 | |
| 77 | iopte_val(*iopte) = val; |
| 78 | } |
| 79 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 80 | /* Based largely upon the ppc64 iommu allocator. */ |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 81 | static long pci_arena_alloc(struct iommu *iommu, unsigned long npages) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 82 | { |
David S. Miller | 9b3627f | 2007-04-24 23:51:18 -0700 | [diff] [blame] | 83 | struct iommu_arena *arena = &iommu->arena; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 84 | unsigned long n, i, start, end, limit; |
| 85 | int pass; |
| 86 | |
| 87 | limit = arena->limit; |
| 88 | start = arena->hint; |
| 89 | pass = 0; |
| 90 | |
| 91 | again: |
| 92 | n = find_next_zero_bit(arena->map, limit, start); |
| 93 | end = n + npages; |
| 94 | if (unlikely(end >= limit)) { |
| 95 | if (likely(pass < 1)) { |
| 96 | limit = start; |
| 97 | start = 0; |
| 98 | __iommu_flushall(iommu); |
| 99 | pass++; |
| 100 | goto again; |
| 101 | } else { |
| 102 | /* Scanned the whole thing, give up. */ |
| 103 | return -1; |
| 104 | } |
| 105 | } |
| 106 | |
| 107 | for (i = n; i < end; i++) { |
| 108 | if (test_bit(i, arena->map)) { |
| 109 | start = i + 1; |
| 110 | goto again; |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | for (i = n; i < end; i++) |
| 115 | __set_bit(i, arena->map); |
| 116 | |
| 117 | arena->hint = end; |
| 118 | |
| 119 | return n; |
| 120 | } |
| 121 | |
David S. Miller | 9b3627f | 2007-04-24 23:51:18 -0700 | [diff] [blame] | 122 | static void pci_arena_free(struct iommu_arena *arena, unsigned long base, unsigned long npages) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 123 | { |
| 124 | unsigned long i; |
| 125 | |
| 126 | for (i = base; i < (base + npages); i++) |
| 127 | __clear_bit(i, arena->map); |
| 128 | } |
| 129 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 130 | void pci_iommu_table_init(struct iommu *iommu, int tsbsize, u32 dma_offset, u32 dma_addr_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 132 | unsigned long i, tsbbase, order, sz, num_tsb_entries; |
| 133 | |
| 134 | num_tsb_entries = tsbsize / sizeof(iopte_t); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 136 | /* Setup initial software IOMMU state. */ |
| 137 | spin_lock_init(&iommu->lock); |
| 138 | iommu->ctx_lowest_free = 1; |
| 139 | iommu->page_table_map_base = dma_offset; |
| 140 | iommu->dma_addr_mask = dma_addr_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 142 | /* Allocate and initialize the free area map. */ |
| 143 | sz = num_tsb_entries / 8; |
| 144 | sz = (sz + 7UL) & ~7UL; |
Eric Sesterhenn | 9132983 | 2006-03-06 13:48:40 -0800 | [diff] [blame] | 145 | iommu->arena.map = kzalloc(sz, GFP_KERNEL); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 146 | if (!iommu->arena.map) { |
| 147 | prom_printf("PCI_IOMMU: Error, kmalloc(arena.map) failed.\n"); |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 148 | prom_halt(); |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 149 | } |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 150 | iommu->arena.limit = num_tsb_entries; |
David S. Miller | 51e8513 | 2005-10-13 21:10:08 -0700 | [diff] [blame] | 151 | |
| 152 | /* Allocate and initialize the dummy page which we |
| 153 | * set inactive IO PTEs to point to. |
| 154 | */ |
| 155 | iommu->dummy_page = __get_free_pages(GFP_KERNEL, 0); |
| 156 | if (!iommu->dummy_page) { |
| 157 | prom_printf("PCI_IOMMU: Error, gfp(dummy_page) failed.\n"); |
| 158 | prom_halt(); |
| 159 | } |
| 160 | memset((void *)iommu->dummy_page, 0, PAGE_SIZE); |
| 161 | iommu->dummy_page_pa = (unsigned long) __pa(iommu->dummy_page); |
| 162 | |
| 163 | /* Now allocate and setup the IOMMU page table itself. */ |
| 164 | order = get_order(tsbsize); |
| 165 | tsbbase = __get_free_pages(GFP_KERNEL, order); |
| 166 | if (!tsbbase) { |
| 167 | prom_printf("PCI_IOMMU: Error, gfp(tsb) failed.\n"); |
| 168 | prom_halt(); |
| 169 | } |
| 170 | iommu->page_table = (iopte_t *)tsbbase; |
| 171 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 172 | for (i = 0; i < num_tsb_entries; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | iopte_make_dummy(iommu, &iommu->page_table[i]); |
| 174 | } |
| 175 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 176 | static inline iopte_t *alloc_npages(struct iommu *iommu, unsigned long npages) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 178 | long entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 180 | entry = pci_arena_alloc(iommu, npages); |
| 181 | if (unlikely(entry < 0)) |
| 182 | return NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 184 | return iommu->page_table + entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | } |
| 186 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 187 | static inline void free_npages(struct iommu *iommu, dma_addr_t base, unsigned long npages) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 189 | pci_arena_free(&iommu->arena, base >> IO_PAGE_SHIFT, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | } |
| 191 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 192 | static int iommu_alloc_ctx(struct iommu *iommu) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 193 | { |
| 194 | int lowest = iommu->ctx_lowest_free; |
| 195 | int sz = IOMMU_NUM_CTXS - lowest; |
| 196 | int n = find_next_zero_bit(iommu->ctx_bitmap, sz, lowest); |
| 197 | |
| 198 | if (unlikely(n == sz)) { |
| 199 | n = find_next_zero_bit(iommu->ctx_bitmap, lowest, 1); |
| 200 | if (unlikely(n == lowest)) { |
| 201 | printk(KERN_WARNING "IOMMU: Ran out of contexts.\n"); |
| 202 | n = 0; |
| 203 | } |
| 204 | } |
| 205 | if (n) |
| 206 | __set_bit(n, iommu->ctx_bitmap); |
| 207 | |
| 208 | return n; |
| 209 | } |
| 210 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 211 | static inline void iommu_free_ctx(struct iommu *iommu, int ctx) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 212 | { |
| 213 | if (likely(ctx)) { |
| 214 | __clear_bit(ctx, iommu->ctx_bitmap); |
| 215 | if (ctx < iommu->ctx_lowest_free) |
| 216 | iommu->ctx_lowest_free = ctx; |
| 217 | } |
| 218 | } |
| 219 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | /* Allocate and map kernel buffer of size SIZE using consistent mode |
| 221 | * DMA for PCI device PDEV. Return non-NULL cpu-side address if |
| 222 | * successful and set *DMA_ADDRP to the PCI side dma address. |
| 223 | */ |
David S. Miller | 42f1423 | 2006-05-23 02:07:22 -0700 | [diff] [blame] | 224 | static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp, gfp_t gfp) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 226 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | iopte_t *iopte; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 228 | unsigned long flags, order, first_page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | void *ret; |
| 230 | int npages; |
| 231 | |
| 232 | size = IO_PAGE_ALIGN(size); |
| 233 | order = get_order(size); |
| 234 | if (order >= 10) |
| 235 | return NULL; |
| 236 | |
David S. Miller | 42f1423 | 2006-05-23 02:07:22 -0700 | [diff] [blame] | 237 | first_page = __get_free_pages(gfp, order); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | if (first_page == 0UL) |
| 239 | return NULL; |
| 240 | memset((char *)first_page, 0, PAGE_SIZE << order); |
| 241 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 242 | iommu = pdev->dev.archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | |
| 244 | spin_lock_irqsave(&iommu->lock, flags); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 245 | iopte = alloc_npages(iommu, size >> IO_PAGE_SHIFT); |
| 246 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 247 | |
| 248 | if (unlikely(iopte == NULL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | free_pages(first_page, order); |
| 250 | return NULL; |
| 251 | } |
| 252 | |
| 253 | *dma_addrp = (iommu->page_table_map_base + |
| 254 | ((iopte - iommu->page_table) << IO_PAGE_SHIFT)); |
| 255 | ret = (void *) first_page; |
| 256 | npages = size >> IO_PAGE_SHIFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | first_page = __pa(first_page); |
| 258 | while (npages--) { |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 259 | iopte_val(*iopte) = (IOPTE_CONSISTENT(0UL) | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | IOPTE_WRITE | |
| 261 | (first_page & IOPTE_PAGE)); |
| 262 | iopte++; |
| 263 | first_page += IO_PAGE_SIZE; |
| 264 | } |
| 265 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | return ret; |
| 267 | } |
| 268 | |
| 269 | /* Free and unmap a consistent DMA translation. */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 270 | static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 272 | struct iommu *iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | iopte_t *iopte; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 274 | unsigned long flags, order, npages; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | |
| 276 | npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT; |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 277 | iommu = pdev->dev.archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | iopte = iommu->page_table + |
| 279 | ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 280 | |
| 281 | spin_lock_irqsave(&iommu->lock, flags); |
| 282 | |
David S. Miller | 012d64f | 2006-10-25 22:33:07 -0700 | [diff] [blame] | 283 | free_npages(iommu, dvma - iommu->page_table_map_base, npages); |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 284 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 285 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 286 | |
| 287 | order = get_order(size); |
| 288 | if (order < 10) |
| 289 | free_pages((unsigned long)cpu, order); |
| 290 | } |
| 291 | |
| 292 | /* Map a single buffer at PTR of SZ bytes for PCI DMA |
| 293 | * in streaming mode. |
| 294 | */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 295 | static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 297 | struct iommu *iommu; |
| 298 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | iopte_t *base; |
| 300 | unsigned long flags, npages, oaddr; |
| 301 | unsigned long i, base_paddr, ctx; |
| 302 | u32 bus_addr, ret; |
| 303 | unsigned long iopte_protection; |
| 304 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 305 | iommu = pdev->dev.archdata.iommu; |
| 306 | strbuf = pdev->dev.archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 308 | if (unlikely(direction == PCI_DMA_NONE)) |
| 309 | goto bad_no_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | |
| 311 | oaddr = (unsigned long)ptr; |
| 312 | npages = IO_PAGE_ALIGN(oaddr + sz) - (oaddr & IO_PAGE_MASK); |
| 313 | npages >>= IO_PAGE_SHIFT; |
| 314 | |
| 315 | spin_lock_irqsave(&iommu->lock, flags); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 316 | base = alloc_npages(iommu, npages); |
| 317 | ctx = 0; |
| 318 | if (iommu->iommu_ctxflush) |
| 319 | ctx = iommu_alloc_ctx(iommu); |
| 320 | spin_unlock_irqrestore(&iommu->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 321 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 322 | if (unlikely(!base)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | goto bad; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 324 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | bus_addr = (iommu->page_table_map_base + |
| 326 | ((base - iommu->page_table) << IO_PAGE_SHIFT)); |
| 327 | ret = bus_addr | (oaddr & ~IO_PAGE_MASK); |
| 328 | base_paddr = __pa(oaddr & IO_PAGE_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | if (strbuf->strbuf_enabled) |
| 330 | iopte_protection = IOPTE_STREAMING(ctx); |
| 331 | else |
| 332 | iopte_protection = IOPTE_CONSISTENT(ctx); |
| 333 | if (direction != PCI_DMA_TODEVICE) |
| 334 | iopte_protection |= IOPTE_WRITE; |
| 335 | |
| 336 | for (i = 0; i < npages; i++, base++, base_paddr += IO_PAGE_SIZE) |
| 337 | iopte_val(*base) = iopte_protection | base_paddr; |
| 338 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | return ret; |
| 340 | |
| 341 | bad: |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 342 | iommu_free_ctx(iommu, ctx); |
| 343 | bad_no_ctx: |
| 344 | if (printk_ratelimit()) |
| 345 | WARN_ON(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | return PCI_DMA_ERROR_CODE; |
| 347 | } |
| 348 | |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 349 | static void pci_strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, u32 vaddr, unsigned long ctx, unsigned long npages, int direction) |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 350 | { |
| 351 | int limit; |
| 352 | |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 353 | if (strbuf->strbuf_ctxflush && |
| 354 | iommu->iommu_ctxflush) { |
| 355 | unsigned long matchreg, flushreg; |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 356 | u64 val; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 357 | |
| 358 | flushreg = strbuf->strbuf_ctxflush; |
| 359 | matchreg = PCI_STC_CTXMATCH_ADDR(strbuf, ctx); |
| 360 | |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 361 | pci_iommu_write(flushreg, ctx); |
David S. Miller | 88314ee | 2005-05-31 19:13:52 -0700 | [diff] [blame] | 362 | val = pci_iommu_read(matchreg); |
| 363 | val &= 0xffff; |
| 364 | if (!val) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 365 | goto do_flush_sync; |
| 366 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 367 | while (val) { |
| 368 | if (val & 0x1) |
| 369 | pci_iommu_write(flushreg, ctx); |
| 370 | val >>= 1; |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 371 | } |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 372 | val = pci_iommu_read(matchreg); |
| 373 | if (unlikely(val)) { |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 374 | printk(KERN_WARNING "pci_strbuf_flush: ctx flush " |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 375 | "timeout matchreg[%lx] ctx[%lx]\n", |
| 376 | val, ctx); |
| 377 | goto do_page_flush; |
| 378 | } |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 379 | } else { |
| 380 | unsigned long i; |
| 381 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 382 | do_page_flush: |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 383 | for (i = 0; i < npages; i++, vaddr += IO_PAGE_SIZE) |
| 384 | pci_iommu_write(strbuf->strbuf_pflush, vaddr); |
| 385 | } |
| 386 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 387 | do_flush_sync: |
| 388 | /* If the device could not have possibly put dirty data into |
| 389 | * the streaming cache, no flush-flag synchronization needs |
| 390 | * to be performed. |
| 391 | */ |
| 392 | if (direction == PCI_DMA_TODEVICE) |
| 393 | return; |
| 394 | |
| 395 | PCI_STC_FLUSHFLAG_INIT(strbuf); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 396 | pci_iommu_write(strbuf->strbuf_fsync, strbuf->strbuf_flushflag_pa); |
| 397 | (void) pci_iommu_read(iommu->write_complete_reg); |
| 398 | |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 399 | limit = 100000; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 400 | while (!PCI_STC_FLUSHFLAG_SET(strbuf)) { |
| 401 | limit--; |
| 402 | if (!limit) |
| 403 | break; |
David S. Miller | a228dfd | 2005-05-20 11:40:32 -0700 | [diff] [blame] | 404 | udelay(1); |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 405 | rmb(); |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 406 | } |
| 407 | if (!limit) |
| 408 | printk(KERN_WARNING "pci_strbuf_flush: flushflag timeout " |
| 409 | "vaddr[%08x] ctx[%lx] npages[%ld]\n", |
| 410 | vaddr, ctx, npages); |
| 411 | } |
| 412 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 413 | /* Unmap a single streaming mode DMA translation. */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 414 | static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 416 | struct iommu *iommu; |
| 417 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | iopte_t *base; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 419 | unsigned long flags, npages, ctx, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 421 | if (unlikely(direction == PCI_DMA_NONE)) { |
| 422 | if (printk_ratelimit()) |
| 423 | WARN_ON(1); |
| 424 | return; |
| 425 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 427 | iommu = pdev->dev.archdata.iommu; |
| 428 | strbuf = pdev->dev.archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | |
| 430 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 431 | npages >>= IO_PAGE_SHIFT; |
| 432 | base = iommu->page_table + |
| 433 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 434 | #ifdef DEBUG_PCI_IOMMU |
| 435 | if (IOPTE_IS_DUMMY(iommu, base)) |
| 436 | printk("pci_unmap_single called on non-mapped region %08x,%08x from %016lx\n", |
| 437 | bus_addr, sz, __builtin_return_address(0)); |
| 438 | #endif |
| 439 | bus_addr &= IO_PAGE_MASK; |
| 440 | |
| 441 | spin_lock_irqsave(&iommu->lock, flags); |
| 442 | |
| 443 | /* Record the context, if any. */ |
| 444 | ctx = 0; |
| 445 | if (iommu->iommu_ctxflush) |
| 446 | ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL; |
| 447 | |
| 448 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 449 | if (strbuf->strbuf_enabled) |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 450 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, |
| 451 | npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 453 | /* Step 2: Clear out TSB entries. */ |
| 454 | for (i = 0; i < npages; i++) |
| 455 | iopte_make_dummy(iommu, base + i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 457 | free_npages(iommu, bus_addr - iommu->page_table_map_base, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 459 | iommu_free_ctx(iommu, ctx); |
| 460 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 462 | } |
| 463 | |
| 464 | #define SG_ENT_PHYS_ADDRESS(SG) \ |
| 465 | (__pa(page_address((SG)->page)) + (SG)->offset) |
| 466 | |
| 467 | static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg, |
| 468 | int nused, int nelems, unsigned long iopte_protection) |
| 469 | { |
| 470 | struct scatterlist *dma_sg = sg; |
| 471 | struct scatterlist *sg_end = sg + nelems; |
| 472 | int i; |
| 473 | |
| 474 | for (i = 0; i < nused; i++) { |
| 475 | unsigned long pteval = ~0UL; |
| 476 | u32 dma_npages; |
| 477 | |
| 478 | dma_npages = ((dma_sg->dma_address & (IO_PAGE_SIZE - 1UL)) + |
| 479 | dma_sg->dma_length + |
| 480 | ((IO_PAGE_SIZE - 1UL))) >> IO_PAGE_SHIFT; |
| 481 | do { |
| 482 | unsigned long offset; |
| 483 | signed int len; |
| 484 | |
| 485 | /* If we are here, we know we have at least one |
| 486 | * more page to map. So walk forward until we |
| 487 | * hit a page crossing, and begin creating new |
| 488 | * mappings from that spot. |
| 489 | */ |
| 490 | for (;;) { |
| 491 | unsigned long tmp; |
| 492 | |
| 493 | tmp = SG_ENT_PHYS_ADDRESS(sg); |
| 494 | len = sg->length; |
| 495 | if (((tmp ^ pteval) >> IO_PAGE_SHIFT) != 0UL) { |
| 496 | pteval = tmp & IO_PAGE_MASK; |
| 497 | offset = tmp & (IO_PAGE_SIZE - 1UL); |
| 498 | break; |
| 499 | } |
| 500 | if (((tmp ^ (tmp + len - 1UL)) >> IO_PAGE_SHIFT) != 0UL) { |
| 501 | pteval = (tmp + IO_PAGE_SIZE) & IO_PAGE_MASK; |
| 502 | offset = 0UL; |
| 503 | len -= (IO_PAGE_SIZE - (tmp & (IO_PAGE_SIZE - 1UL))); |
| 504 | break; |
| 505 | } |
| 506 | sg++; |
| 507 | } |
| 508 | |
| 509 | pteval = iopte_protection | (pteval & IOPTE_PAGE); |
| 510 | while (len > 0) { |
| 511 | *iopte++ = __iopte(pteval); |
| 512 | pteval += IO_PAGE_SIZE; |
| 513 | len -= (IO_PAGE_SIZE - offset); |
| 514 | offset = 0; |
| 515 | dma_npages--; |
| 516 | } |
| 517 | |
| 518 | pteval = (pteval & IOPTE_PAGE) + len; |
| 519 | sg++; |
| 520 | |
| 521 | /* Skip over any tail mappings we've fully mapped, |
| 522 | * adjusting pteval along the way. Stop when we |
| 523 | * detect a page crossing event. |
| 524 | */ |
| 525 | while (sg < sg_end && |
| 526 | (pteval << (64 - IO_PAGE_SHIFT)) != 0UL && |
| 527 | (pteval == SG_ENT_PHYS_ADDRESS(sg)) && |
| 528 | ((pteval ^ |
| 529 | (SG_ENT_PHYS_ADDRESS(sg) + sg->length - 1UL)) >> IO_PAGE_SHIFT) == 0UL) { |
| 530 | pteval += sg->length; |
| 531 | sg++; |
| 532 | } |
| 533 | if ((pteval << (64 - IO_PAGE_SHIFT)) == 0UL) |
| 534 | pteval = ~0UL; |
| 535 | } while (dma_npages != 0); |
| 536 | dma_sg++; |
| 537 | } |
| 538 | } |
| 539 | |
| 540 | /* Map a set of buffers described by SGLIST with NELEMS array |
| 541 | * elements in streaming mode for PCI DMA. |
| 542 | * When making changes here, inspect the assembly output. I was having |
| 543 | * hard time to kepp this routine out of using stack slots for holding variables. |
| 544 | */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 545 | static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 547 | struct iommu *iommu; |
| 548 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | unsigned long flags, ctx, npages, iopte_protection; |
| 550 | iopte_t *base; |
| 551 | u32 dma_base; |
| 552 | struct scatterlist *sgtmp; |
| 553 | int used; |
| 554 | |
| 555 | /* Fast path single entry scatterlists. */ |
| 556 | if (nelems == 1) { |
| 557 | sglist->dma_address = |
David S. Miller | 1839794 | 2006-02-10 00:08:26 -0800 | [diff] [blame] | 558 | pci_4u_map_single(pdev, |
| 559 | (page_address(sglist->page) + sglist->offset), |
| 560 | sglist->length, direction); |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 561 | if (unlikely(sglist->dma_address == PCI_DMA_ERROR_CODE)) |
| 562 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | sglist->dma_length = sglist->length; |
| 564 | return 1; |
| 565 | } |
| 566 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 567 | iommu = pdev->dev.archdata.iommu; |
| 568 | strbuf = pdev->dev.archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 570 | if (unlikely(direction == PCI_DMA_NONE)) |
| 571 | goto bad_no_ctx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | |
| 573 | /* Step 1: Prepare scatter list. */ |
| 574 | |
| 575 | npages = prepare_sg(sglist, nelems); |
| 576 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 577 | /* Step 2: Allocate a cluster and context, if necessary. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | |
| 579 | spin_lock_irqsave(&iommu->lock, flags); |
| 580 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 581 | base = alloc_npages(iommu, npages); |
| 582 | ctx = 0; |
| 583 | if (iommu->iommu_ctxflush) |
| 584 | ctx = iommu_alloc_ctx(iommu); |
| 585 | |
| 586 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 587 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | if (base == NULL) |
| 589 | goto bad; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 590 | |
| 591 | dma_base = iommu->page_table_map_base + |
| 592 | ((base - iommu->page_table) << IO_PAGE_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | |
| 594 | /* Step 3: Normalize DMA addresses. */ |
| 595 | used = nelems; |
| 596 | |
| 597 | sgtmp = sglist; |
| 598 | while (used && sgtmp->dma_length) { |
| 599 | sgtmp->dma_address += dma_base; |
| 600 | sgtmp++; |
| 601 | used--; |
| 602 | } |
| 603 | used = nelems - used; |
| 604 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 605 | /* Step 4: Create the mappings. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | if (strbuf->strbuf_enabled) |
| 607 | iopte_protection = IOPTE_STREAMING(ctx); |
| 608 | else |
| 609 | iopte_protection = IOPTE_CONSISTENT(ctx); |
| 610 | if (direction != PCI_DMA_TODEVICE) |
| 611 | iopte_protection |= IOPTE_WRITE; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 612 | |
| 613 | fill_sg(base, sglist, used, nelems, iopte_protection); |
| 614 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | #ifdef VERIFY_SG |
| 616 | verify_sglist(sglist, nelems, base, npages); |
| 617 | #endif |
| 618 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 619 | return used; |
| 620 | |
| 621 | bad: |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 622 | iommu_free_ctx(iommu, ctx); |
| 623 | bad_no_ctx: |
| 624 | if (printk_ratelimit()) |
| 625 | WARN_ON(1); |
| 626 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | /* Unmap a set of streaming mode DMA translations. */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 630 | static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 632 | struct iommu *iommu; |
| 633 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | iopte_t *base; |
| 635 | unsigned long flags, ctx, i, npages; |
| 636 | u32 bus_addr; |
| 637 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 638 | if (unlikely(direction == PCI_DMA_NONE)) { |
| 639 | if (printk_ratelimit()) |
| 640 | WARN_ON(1); |
| 641 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 643 | iommu = pdev->dev.archdata.iommu; |
| 644 | strbuf = pdev->dev.archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | |
| 646 | bus_addr = sglist->dma_address & IO_PAGE_MASK; |
| 647 | |
| 648 | for (i = 1; i < nelems; i++) |
| 649 | if (sglist[i].dma_length == 0) |
| 650 | break; |
| 651 | i--; |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 652 | npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) - |
| 653 | bus_addr) >> IO_PAGE_SHIFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | |
| 655 | base = iommu->page_table + |
| 656 | ((bus_addr - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 657 | |
| 658 | #ifdef DEBUG_PCI_IOMMU |
| 659 | if (IOPTE_IS_DUMMY(iommu, base)) |
| 660 | printk("pci_unmap_sg called on non-mapped region %016lx,%d from %016lx\n", sglist->dma_address, nelems, __builtin_return_address(0)); |
| 661 | #endif |
| 662 | |
| 663 | spin_lock_irqsave(&iommu->lock, flags); |
| 664 | |
| 665 | /* Record the context, if any. */ |
| 666 | ctx = 0; |
| 667 | if (iommu->iommu_ctxflush) |
| 668 | ctx = (iopte_val(*base) & IOPTE_CONTEXT) >> 47UL; |
| 669 | |
| 670 | /* Step 1: Kick data out of streaming buffers if necessary. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 671 | if (strbuf->strbuf_enabled) |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 672 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 674 | /* Step 2: Clear out the TSB entries. */ |
| 675 | for (i = 0; i < npages; i++) |
| 676 | iopte_make_dummy(iommu, base + i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | |
David S. Miller | 688cb30 | 2005-10-13 22:15:24 -0700 | [diff] [blame] | 678 | free_npages(iommu, bus_addr - iommu->page_table_map_base, npages); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 680 | iommu_free_ctx(iommu, ctx); |
| 681 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 683 | } |
| 684 | |
| 685 | /* Make physical memory consistent for a single |
| 686 | * streaming mode DMA translation after a transfer. |
| 687 | */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 688 | static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 690 | struct iommu *iommu; |
| 691 | struct strbuf *strbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | unsigned long flags, ctx, npages; |
| 693 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 694 | iommu = pdev->dev.archdata.iommu; |
| 695 | strbuf = pdev->dev.archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | |
| 697 | if (!strbuf->strbuf_enabled) |
| 698 | return; |
| 699 | |
| 700 | spin_lock_irqsave(&iommu->lock, flags); |
| 701 | |
| 702 | npages = IO_PAGE_ALIGN(bus_addr + sz) - (bus_addr & IO_PAGE_MASK); |
| 703 | npages >>= IO_PAGE_SHIFT; |
| 704 | bus_addr &= IO_PAGE_MASK; |
| 705 | |
| 706 | /* Step 1: Record the context, if any. */ |
| 707 | ctx = 0; |
| 708 | if (iommu->iommu_ctxflush && |
| 709 | strbuf->strbuf_ctxflush) { |
| 710 | iopte_t *iopte; |
| 711 | |
| 712 | iopte = iommu->page_table + |
| 713 | ((bus_addr - iommu->page_table_map_base)>>IO_PAGE_SHIFT); |
| 714 | ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; |
| 715 | } |
| 716 | |
| 717 | /* Step 2: Kick data out of streaming buffers. */ |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 718 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | |
| 720 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 721 | } |
| 722 | |
| 723 | /* Make physical memory consistent for a set of streaming |
| 724 | * mode DMA translations after a transfer. |
| 725 | */ |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 726 | static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 728 | struct iommu *iommu; |
| 729 | struct strbuf *strbuf; |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 730 | unsigned long flags, ctx, npages, i; |
| 731 | u32 bus_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | |
David S. Miller | a2fb23a | 2007-02-28 23:35:04 -0800 | [diff] [blame] | 733 | iommu = pdev->dev.archdata.iommu; |
| 734 | strbuf = pdev->dev.archdata.stc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | |
| 736 | if (!strbuf->strbuf_enabled) |
| 737 | return; |
| 738 | |
| 739 | spin_lock_irqsave(&iommu->lock, flags); |
| 740 | |
| 741 | /* Step 1: Record the context, if any. */ |
| 742 | ctx = 0; |
| 743 | if (iommu->iommu_ctxflush && |
| 744 | strbuf->strbuf_ctxflush) { |
| 745 | iopte_t *iopte; |
| 746 | |
| 747 | iopte = iommu->page_table + |
| 748 | ((sglist[0].dma_address - iommu->page_table_map_base) >> IO_PAGE_SHIFT); |
| 749 | ctx = (iopte_val(*iopte) & IOPTE_CONTEXT) >> 47UL; |
| 750 | } |
| 751 | |
| 752 | /* Step 2: Kick data out of streaming buffers. */ |
David S. Miller | 4dbc30f | 2005-05-11 11:37:00 -0700 | [diff] [blame] | 753 | bus_addr = sglist[0].dma_address & IO_PAGE_MASK; |
| 754 | for(i = 1; i < nelems; i++) |
| 755 | if (!sglist[i].dma_length) |
| 756 | break; |
| 757 | i--; |
| 758 | npages = (IO_PAGE_ALIGN(sglist[i].dma_address + sglist[i].dma_length) |
| 759 | - bus_addr) >> IO_PAGE_SHIFT; |
David S. Miller | 7c963ad | 2005-05-31 16:57:59 -0700 | [diff] [blame] | 760 | pci_strbuf_flush(strbuf, iommu, bus_addr, ctx, npages, direction); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | |
| 762 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 763 | } |
| 764 | |
David S. Miller | c6e8756 | 2007-03-09 16:58:43 -0800 | [diff] [blame] | 765 | const struct pci_iommu_ops pci_sun4u_iommu_ops = { |
David S. Miller | 8f6a93a | 2006-02-09 21:32:07 -0800 | [diff] [blame] | 766 | .alloc_consistent = pci_4u_alloc_consistent, |
| 767 | .free_consistent = pci_4u_free_consistent, |
| 768 | .map_single = pci_4u_map_single, |
| 769 | .unmap_single = pci_4u_unmap_single, |
| 770 | .map_sg = pci_4u_map_sg, |
| 771 | .unmap_sg = pci_4u_unmap_sg, |
| 772 | .dma_sync_single_for_cpu = pci_4u_dma_sync_single_for_cpu, |
| 773 | .dma_sync_sg_for_cpu = pci_4u_dma_sync_sg_for_cpu, |
| 774 | }; |
| 775 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit) |
| 777 | { |
| 778 | struct pci_dev *ali_isa_bridge; |
| 779 | u8 val; |
| 780 | |
| 781 | /* ALI sound chips generate 31-bits of DMA, a special register |
| 782 | * determines what bit 31 is emitted as. |
| 783 | */ |
| 784 | ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, |
| 785 | PCI_DEVICE_ID_AL_M1533, |
| 786 | NULL); |
| 787 | |
| 788 | pci_read_config_byte(ali_isa_bridge, 0x7e, &val); |
| 789 | if (set_bit) |
| 790 | val |= 0x01; |
| 791 | else |
| 792 | val &= ~0x01; |
| 793 | pci_write_config_byte(ali_isa_bridge, 0x7e, val); |
| 794 | pci_dev_put(ali_isa_bridge); |
| 795 | } |
| 796 | |
| 797 | int pci_dma_supported(struct pci_dev *pdev, u64 device_mask) |
| 798 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | u64 dma_addr_mask; |
| 800 | |
| 801 | if (pdev == NULL) { |
| 802 | dma_addr_mask = 0xffffffff; |
| 803 | } else { |
David S. Miller | 16ce82d | 2007-04-26 21:08:21 -0700 | [diff] [blame] | 804 | struct iommu *iommu = pdev->dev.archdata.iommu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | |
| 806 | dma_addr_mask = iommu->dma_addr_mask; |
| 807 | |
| 808 | if (pdev->vendor == PCI_VENDOR_ID_AL && |
| 809 | pdev->device == PCI_DEVICE_ID_AL_M5451 && |
| 810 | device_mask == 0x7fffffff) { |
| 811 | ali_sound_dma_hack(pdev, |
| 812 | (dma_addr_mask & 0x80000000) != 0); |
| 813 | return 1; |
| 814 | } |
| 815 | } |
| 816 | |
| 817 | if (device_mask >= (1UL << 32UL)) |
| 818 | return 0; |
| 819 | |
| 820 | return (device_mask & dma_addr_mask) == dma_addr_mask; |
| 821 | } |