Jean-Christophe PLAGNIOL-VILLARD | 23fa648 | 2012-02-27 11:19:34 +0100 | [diff] [blame] | 1 | Atmel AT91 device tree bindings. |
| 2 | ================================ |
| 3 | |
| 4 | PIT Timer required properties: |
| 5 | - compatible: Should be "atmel,at91sam9260-pit" |
| 6 | - reg: Should contain registers location and length |
| 7 | - interrupts: Should contain interrupt for the PIT which is the IRQ line |
| 8 | shared across all System Controller members. |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 9 | |
Joachim Eastwood | 454c46d | 2012-10-28 18:31:07 +0000 | [diff] [blame] | 10 | System Timer (ST) required properties: |
| 11 | - compatible: Should be "atmel,at91rm9200-st" |
| 12 | - reg: Should contain registers location and length |
| 13 | - interrupts: Should contain interrupt for the ST which is the IRQ line |
| 14 | shared across all System Controller members. |
| 15 | |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 16 | TC/TCLIB Timer required properties: |
Josh Wu | 11930c5 | 2012-09-14 17:01:29 +0800 | [diff] [blame] | 17 | - compatible: Should be "atmel,<chip>-tcb". |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 18 | <chip> can be "at91rm9200" or "at91sam9x5" |
| 19 | - reg: Should contain registers location and length |
| 20 | - interrupts: Should contain all interrupts for the TC block |
| 21 | Note that you can specify several interrupt cells if the TC |
| 22 | block has one interrupt per channel. |
Boris BREZILLON | 864382d | 2013-12-17 16:47:14 +0100 | [diff] [blame^] | 23 | - clock-names: tuple listing input clock names. |
| 24 | Required elements: "t0_clk" |
| 25 | Optional elements: "t1_clk", "t2_clk" |
| 26 | - clocks: phandles to input clocks. |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 27 | |
| 28 | Examples: |
| 29 | |
| 30 | One interrupt per TC block: |
| 31 | tcb0: timer@fff7c000 { |
| 32 | compatible = "atmel,at91rm9200-tcb"; |
| 33 | reg = <0xfff7c000 0x100>; |
| 34 | interrupts = <18 4>; |
Boris BREZILLON | 864382d | 2013-12-17 16:47:14 +0100 | [diff] [blame^] | 35 | clocks = <&tcb0_clk>; |
| 36 | clock-names = "t0_clk"; |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | One interrupt per TC channel in a TC block: |
| 40 | tcb1: timer@fffdc000 { |
| 41 | compatible = "atmel,at91rm9200-tcb"; |
| 42 | reg = <0xfffdc000 0x100>; |
| 43 | interrupts = <26 4 27 4 28 4>; |
Boris BREZILLON | 864382d | 2013-12-17 16:47:14 +0100 | [diff] [blame^] | 44 | clocks = <&tcb1_clk>; |
| 45 | clock-names = "t0_clk"; |
Nicolas Ferre | 3a61a5d | 2012-01-19 10:13:40 +0100 | [diff] [blame] | 46 | }; |
Jean-Christophe PLAGNIOL-VILLARD | c8082d3 | 2012-03-03 03:16:27 +0800 | [diff] [blame] | 47 | |
| 48 | RSTC Reset Controller required properties: |
| 49 | - compatible: Should be "atmel,<chip>-rstc". |
| 50 | <chip> can be "at91sam9260" or "at91sam9g45" |
| 51 | - reg: Should contain registers location and length |
| 52 | |
| 53 | Example: |
| 54 | |
| 55 | rstc@fffffd00 { |
| 56 | compatible = "atmel,at91sam9260-rstc"; |
| 57 | reg = <0xfffffd00 0x10>; |
| 58 | }; |
Jean-Christophe PLAGNIOL-VILLARD | a7776ec | 2012-03-02 20:54:37 +0800 | [diff] [blame] | 59 | |
| 60 | RAMC SDRAM/DDR Controller required properties: |
| 61 | - compatible: Should be "atmel,at91sam9260-sdramc", |
| 62 | "atmel,at91sam9g45-ddramc", |
| 63 | - reg: Should contain registers location and length |
| 64 | For at91sam9263 and at91sam9g45 you must specify 2 entries. |
| 65 | |
| 66 | Examples: |
| 67 | |
| 68 | ramc0: ramc@ffffe800 { |
| 69 | compatible = "atmel,at91sam9g45-ddramc"; |
| 70 | reg = <0xffffe800 0x200>; |
| 71 | }; |
| 72 | |
| 73 | ramc0: ramc@ffffe400 { |
| 74 | compatible = "atmel,at91sam9g45-ddramc"; |
| 75 | reg = <0xffffe400 0x200 |
| 76 | 0xffffe600 0x200>; |
| 77 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 82015c4 | 2012-03-02 21:01:00 +0800 | [diff] [blame] | 78 | |
| 79 | SHDWC Shutdown Controller |
| 80 | |
| 81 | required properties: |
| 82 | - compatible: Should be "atmel,<chip>-shdwc". |
| 83 | <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". |
| 84 | - reg: Should contain registers location and length |
| 85 | |
| 86 | optional properties: |
| 87 | - atmel,wakeup-mode: String, operation mode of the wakeup mode. |
| 88 | Supported values are: "none", "high", "low", "any". |
| 89 | - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). |
| 90 | |
| 91 | optional at91sam9260 properties: |
| 92 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. |
| 93 | |
| 94 | optional at91sam9rl properties: |
| 95 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. |
| 96 | - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. |
| 97 | |
| 98 | optional at91sam9x5 properties: |
| 99 | - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. |
| 100 | |
| 101 | Example: |
| 102 | |
| 103 | rstc@fffffd00 { |
| 104 | compatible = "atmel,at91sam9260-rstc"; |
| 105 | reg = <0xfffffd00 0x10>; |
| 106 | }; |