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Carlo Caionedfe7a1b2014-04-11 11:38:10 +02001/*
2 * AXP20x regulators driver.
3 *
4 * Copyright (C) 2013 Carlo Caione <carlo@caione.org>
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file "COPYING" in the main directory of this
8 * archive for more details.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/err.h>
17#include <linux/init.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/platform_device.h>
22#include <linux/regmap.h>
23#include <linux/mfd/axp20x.h>
24#include <linux/regulator/driver.h>
25#include <linux/regulator/of_regulator.h>
26
27#define AXP20X_IO_ENABLED 0x03
28#define AXP20X_IO_DISABLED 0x07
29
30#define AXP20X_WORKMODE_DCDC2_MASK BIT(2)
31#define AXP20X_WORKMODE_DCDC3_MASK BIT(1)
32
33#define AXP20X_FREQ_DCDC_MASK 0x0f
34
Boris BREZILLON866bd952015-04-10 12:09:03 +080035#define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
36 _vmask, _ereg, _emask, _enable_val, _disable_val) \
37 [_family##_##_id] = { \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020038 .name = #_id, \
39 .supply_name = (_supply), \
Chen-Yu Tsai880fe822015-01-10 00:23:43 +080040 .of_match = of_match_ptr(_match), \
41 .regulators_node = of_match_ptr("regulators"), \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020042 .type = REGULATOR_VOLTAGE, \
Boris BREZILLON866bd952015-04-10 12:09:03 +080043 .id = _family##_##_id, \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020044 .n_voltages = (((_max) - (_min)) / (_step) + 1), \
45 .owner = THIS_MODULE, \
46 .min_uV = (_min) * 1000, \
47 .uV_step = (_step) * 1000, \
48 .vsel_reg = (_vreg), \
49 .vsel_mask = (_vmask), \
50 .enable_reg = (_ereg), \
51 .enable_mask = (_emask), \
52 .enable_val = (_enable_val), \
53 .disable_val = (_disable_val), \
54 .ops = &axp20x_ops, \
55 }
56
Boris BREZILLON866bd952015-04-10 12:09:03 +080057#define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
58 _vmask, _ereg, _emask) \
59 [_family##_##_id] = { \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020060 .name = #_id, \
61 .supply_name = (_supply), \
Chen-Yu Tsai880fe822015-01-10 00:23:43 +080062 .of_match = of_match_ptr(_match), \
63 .regulators_node = of_match_ptr("regulators"), \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020064 .type = REGULATOR_VOLTAGE, \
Boris BREZILLON866bd952015-04-10 12:09:03 +080065 .id = _family##_##_id, \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020066 .n_voltages = (((_max) - (_min)) / (_step) + 1), \
67 .owner = THIS_MODULE, \
68 .min_uV = (_min) * 1000, \
69 .uV_step = (_step) * 1000, \
70 .vsel_reg = (_vreg), \
71 .vsel_mask = (_vmask), \
72 .enable_reg = (_ereg), \
73 .enable_mask = (_emask), \
74 .ops = &axp20x_ops, \
75 }
76
Boris BREZILLON866bd952015-04-10 12:09:03 +080077#define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \
78 [_family##_##_id] = { \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020079 .name = #_id, \
80 .supply_name = (_supply), \
Chen-Yu Tsai880fe822015-01-10 00:23:43 +080081 .of_match = of_match_ptr(_match), \
82 .regulators_node = of_match_ptr("regulators"), \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020083 .type = REGULATOR_VOLTAGE, \
Boris BREZILLON866bd952015-04-10 12:09:03 +080084 .id = _family##_##_id, \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020085 .n_voltages = 1, \
86 .owner = THIS_MODULE, \
87 .min_uV = (_volt) * 1000, \
88 .ops = &axp20x_ops_fixed \
89 }
90
Boris BREZILLON866bd952015-04-10 12:09:03 +080091#define AXP_DESC_TABLE(_family, _id, _match, _supply, _table, _vreg, _vmask, \
92 _ereg, _emask) \
93 [_family##_##_id] = { \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020094 .name = #_id, \
95 .supply_name = (_supply), \
Chen-Yu Tsai880fe822015-01-10 00:23:43 +080096 .of_match = of_match_ptr(_match), \
97 .regulators_node = of_match_ptr("regulators"), \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +020098 .type = REGULATOR_VOLTAGE, \
Boris BREZILLON866bd952015-04-10 12:09:03 +080099 .id = _family##_##_id, \
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200100 .n_voltages = ARRAY_SIZE(_table), \
101 .owner = THIS_MODULE, \
102 .vsel_reg = (_vreg), \
103 .vsel_mask = (_vmask), \
104 .enable_reg = (_ereg), \
105 .enable_mask = (_emask), \
106 .volt_table = (_table), \
107 .ops = &axp20x_ops_table, \
108 }
109
110static const int axp20x_ldo4_data[] = { 1250000, 1300000, 1400000, 1500000, 1600000,
111 1700000, 1800000, 1900000, 2000000, 2500000,
112 2700000, 2800000, 3000000, 3100000, 3200000,
113 3300000 };
114
115static struct regulator_ops axp20x_ops_fixed = {
116 .list_voltage = regulator_list_voltage_linear,
117};
118
119static struct regulator_ops axp20x_ops_table = {
120 .set_voltage_sel = regulator_set_voltage_sel_regmap,
121 .get_voltage_sel = regulator_get_voltage_sel_regmap,
122 .list_voltage = regulator_list_voltage_table,
Axel Linb8870352014-04-15 19:58:42 +0800123 .map_voltage = regulator_map_voltage_ascend,
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200124 .enable = regulator_enable_regmap,
125 .disable = regulator_disable_regmap,
126 .is_enabled = regulator_is_enabled_regmap,
127};
128
129static struct regulator_ops axp20x_ops = {
130 .set_voltage_sel = regulator_set_voltage_sel_regmap,
131 .get_voltage_sel = regulator_get_voltage_sel_regmap,
132 .list_voltage = regulator_list_voltage_linear,
133 .enable = regulator_enable_regmap,
134 .disable = regulator_disable_regmap,
135 .is_enabled = regulator_is_enabled_regmap,
136};
137
138static const struct regulator_desc axp20x_regulators[] = {
Boris BREZILLON866bd952015-04-10 12:09:03 +0800139 AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
140 AXP20X_DCDC2_V_OUT, 0x3f, AXP20X_PWR_OUT_CTRL, 0x10),
141 AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25,
142 AXP20X_DCDC3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x02),
143 AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300),
144 AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100,
145 AXP20X_LDO24_V_OUT, 0xf0, AXP20X_PWR_OUT_CTRL, 0x04),
146 AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25,
147 AXP20X_LDO3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x40),
148 AXP_DESC_TABLE(AXP20X, LDO4, "ldo4", "ldo24in", axp20x_ldo4_data,
149 AXP20X_LDO24_V_OUT, 0x0f, AXP20X_PWR_OUT_CTRL, 0x08),
150 AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100,
151 AXP20X_LDO5_V_OUT, 0xf0, AXP20X_GPIO0_CTRL, 0x07,
152 AXP20X_IO_ENABLED, AXP20X_IO_DISABLED),
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200153};
154
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200155static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
156{
157 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
Boris BREZILLON866bd952015-04-10 12:09:03 +0800158 u32 min, max, def, step;
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200159
Boris BREZILLON866bd952015-04-10 12:09:03 +0800160 switch (axp20x->variant) {
161 case AXP202_ID:
162 case AXP209_ID:
163 min = 750;
164 max = 1875;
165 def = 1500;
166 step = 75;
167 break;
168 default:
169 dev_err(&pdev->dev,
170 "Setting DCDC frequency for unsupported AXP variant\n");
171 return -EINVAL;
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200172 }
173
Boris BREZILLON866bd952015-04-10 12:09:03 +0800174 if (dcdcfreq == 0)
175 dcdcfreq = def;
176
177 if (dcdcfreq < min) {
178 dcdcfreq = min;
179 dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n",
180 min);
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200181 }
182
Boris BREZILLON866bd952015-04-10 12:09:03 +0800183 if (dcdcfreq > max) {
184 dcdcfreq = max;
185 dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n",
186 max);
187 }
188
189 dcdcfreq = (dcdcfreq - min) / step;
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200190
191 return regmap_update_bits(axp20x->regmap, AXP20X_DCDC_FREQ,
192 AXP20X_FREQ_DCDC_MASK, dcdcfreq);
193}
194
195static int axp20x_regulator_parse_dt(struct platform_device *pdev)
196{
197 struct device_node *np, *regulators;
198 int ret;
Boris BREZILLON866bd952015-04-10 12:09:03 +0800199 u32 dcdcfreq = 0;
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200200
201 np = of_node_get(pdev->dev.parent->of_node);
202 if (!np)
203 return 0;
204
Boris BREZILLONa6016c52014-05-19 10:25:30 +0200205 regulators = of_get_child_by_name(np, "regulators");
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200206 if (!regulators) {
207 dev_warn(&pdev->dev, "regulators node not found\n");
208 } else {
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200209 of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq);
210 ret = axp20x_set_dcdc_freq(pdev, dcdcfreq);
211 if (ret < 0) {
212 dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret);
213 return ret;
214 }
215
216 of_node_put(regulators);
217 }
218
219 return 0;
220}
221
222static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode)
223{
Boris BREZILLON866bd952015-04-10 12:09:03 +0800224 struct axp20x_dev *axp20x = rdev_get_drvdata(rdev);
225 unsigned int mask;
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200226
Boris BREZILLON866bd952015-04-10 12:09:03 +0800227 switch (axp20x->variant) {
228 case AXP202_ID:
229 case AXP209_ID:
230 if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3))
231 return -EINVAL;
232
233 mask = AXP20X_WORKMODE_DCDC2_MASK;
234 if (id == AXP20X_DCDC3)
235 mask = AXP20X_WORKMODE_DCDC3_MASK;
236
237 workmode <<= ffs(mask) - 1;
238 break;
239
240 default:
241 /* should not happen */
242 WARN_ON(1);
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200243 return -EINVAL;
Boris BREZILLON866bd952015-04-10 12:09:03 +0800244 }
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200245
246 return regmap_update_bits(rdev->regmap, AXP20X_DCDC_MODE, mask, workmode);
247}
248
249static int axp20x_regulator_probe(struct platform_device *pdev)
250{
251 struct regulator_dev *rdev;
252 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
Boris BREZILLON866bd952015-04-10 12:09:03 +0800253 const struct regulator_desc *regulators;
Chen-Yu Tsai765e8022015-01-10 00:23:44 +0800254 struct regulator_config config = {
255 .dev = pdev->dev.parent,
256 .regmap = axp20x->regmap,
Boris BREZILLON866bd952015-04-10 12:09:03 +0800257 .driver_data = axp20x,
Chen-Yu Tsai765e8022015-01-10 00:23:44 +0800258 };
Boris BREZILLON866bd952015-04-10 12:09:03 +0800259 int ret, i, nregulators;
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200260 u32 workmode;
261
Boris BREZILLON866bd952015-04-10 12:09:03 +0800262 switch (axp20x->variant) {
263 case AXP202_ID:
264 case AXP209_ID:
265 regulators = axp20x_regulators;
266 nregulators = AXP20X_REG_ID_MAX;
267 break;
268 default:
269 dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
270 axp20x->variant);
271 return -EINVAL;
272 }
273
Chen-Yu Tsai765e8022015-01-10 00:23:44 +0800274 /* This only sets the dcdc freq. Ignore any errors */
275 axp20x_regulator_parse_dt(pdev);
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200276
Boris BREZILLON866bd952015-04-10 12:09:03 +0800277 for (i = 0; i < nregulators; i++) {
278 rdev = devm_regulator_register(&pdev->dev, &regulators[i],
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200279 &config);
280 if (IS_ERR(rdev)) {
281 dev_err(&pdev->dev, "Failed to register %s\n",
Boris BREZILLON866bd952015-04-10 12:09:03 +0800282 regulators[i].name);
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200283
284 return PTR_ERR(rdev);
285 }
286
Chen-Yu Tsai765e8022015-01-10 00:23:44 +0800287 ret = of_property_read_u32(rdev->dev.of_node,
288 "x-powers,dcdc-workmode",
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200289 &workmode);
290 if (!ret) {
291 if (axp20x_set_dcdc_workmode(rdev, i, workmode))
292 dev_err(&pdev->dev, "Failed to set workmode on %s\n",
Boris BREZILLON866bd952015-04-10 12:09:03 +0800293 rdev->desc->name);
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200294 }
295 }
296
297 return 0;
298}
299
300static struct platform_driver axp20x_regulator_driver = {
301 .probe = axp20x_regulator_probe,
302 .driver = {
303 .name = "axp20x-regulator",
Carlo Caionedfe7a1b2014-04-11 11:38:10 +0200304 },
305};
306
307module_platform_driver(axp20x_regulator_driver);
308
309MODULE_LICENSE("GPL v2");
310MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
311MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC");