Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 1 | /* |
| 2 | * AXP20x regulators driver. |
| 3 | * |
| 4 | * Copyright (C) 2013 Carlo Caione <carlo@caione.org> |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General |
| 7 | * Public License. See the file "COPYING" in the main directory of this |
| 8 | * archive for more details. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/of_device.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/regmap.h> |
| 23 | #include <linux/mfd/axp20x.h> |
| 24 | #include <linux/regulator/driver.h> |
| 25 | #include <linux/regulator/of_regulator.h> |
| 26 | |
| 27 | #define AXP20X_IO_ENABLED 0x03 |
| 28 | #define AXP20X_IO_DISABLED 0x07 |
| 29 | |
| 30 | #define AXP20X_WORKMODE_DCDC2_MASK BIT(2) |
| 31 | #define AXP20X_WORKMODE_DCDC3_MASK BIT(1) |
| 32 | |
| 33 | #define AXP20X_FREQ_DCDC_MASK 0x0f |
| 34 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 35 | #define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ |
| 36 | _vmask, _ereg, _emask, _enable_val, _disable_val) \ |
| 37 | [_family##_##_id] = { \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 38 | .name = #_id, \ |
| 39 | .supply_name = (_supply), \ |
Chen-Yu Tsai | 880fe82 | 2015-01-10 00:23:43 +0800 | [diff] [blame] | 40 | .of_match = of_match_ptr(_match), \ |
| 41 | .regulators_node = of_match_ptr("regulators"), \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 42 | .type = REGULATOR_VOLTAGE, \ |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 43 | .id = _family##_##_id, \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 44 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ |
| 45 | .owner = THIS_MODULE, \ |
| 46 | .min_uV = (_min) * 1000, \ |
| 47 | .uV_step = (_step) * 1000, \ |
| 48 | .vsel_reg = (_vreg), \ |
| 49 | .vsel_mask = (_vmask), \ |
| 50 | .enable_reg = (_ereg), \ |
| 51 | .enable_mask = (_emask), \ |
| 52 | .enable_val = (_enable_val), \ |
| 53 | .disable_val = (_disable_val), \ |
| 54 | .ops = &axp20x_ops, \ |
| 55 | } |
| 56 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 57 | #define AXP_DESC(_family, _id, _match, _supply, _min, _max, _step, _vreg, \ |
| 58 | _vmask, _ereg, _emask) \ |
| 59 | [_family##_##_id] = { \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 60 | .name = #_id, \ |
| 61 | .supply_name = (_supply), \ |
Chen-Yu Tsai | 880fe82 | 2015-01-10 00:23:43 +0800 | [diff] [blame] | 62 | .of_match = of_match_ptr(_match), \ |
| 63 | .regulators_node = of_match_ptr("regulators"), \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 64 | .type = REGULATOR_VOLTAGE, \ |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 65 | .id = _family##_##_id, \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 66 | .n_voltages = (((_max) - (_min)) / (_step) + 1), \ |
| 67 | .owner = THIS_MODULE, \ |
| 68 | .min_uV = (_min) * 1000, \ |
| 69 | .uV_step = (_step) * 1000, \ |
| 70 | .vsel_reg = (_vreg), \ |
| 71 | .vsel_mask = (_vmask), \ |
| 72 | .enable_reg = (_ereg), \ |
| 73 | .enable_mask = (_emask), \ |
| 74 | .ops = &axp20x_ops, \ |
| 75 | } |
| 76 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 77 | #define AXP_DESC_FIXED(_family, _id, _match, _supply, _volt) \ |
| 78 | [_family##_##_id] = { \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 79 | .name = #_id, \ |
| 80 | .supply_name = (_supply), \ |
Chen-Yu Tsai | 880fe82 | 2015-01-10 00:23:43 +0800 | [diff] [blame] | 81 | .of_match = of_match_ptr(_match), \ |
| 82 | .regulators_node = of_match_ptr("regulators"), \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 83 | .type = REGULATOR_VOLTAGE, \ |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 84 | .id = _family##_##_id, \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 85 | .n_voltages = 1, \ |
| 86 | .owner = THIS_MODULE, \ |
| 87 | .min_uV = (_volt) * 1000, \ |
| 88 | .ops = &axp20x_ops_fixed \ |
| 89 | } |
| 90 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 91 | #define AXP_DESC_TABLE(_family, _id, _match, _supply, _table, _vreg, _vmask, \ |
| 92 | _ereg, _emask) \ |
| 93 | [_family##_##_id] = { \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 94 | .name = #_id, \ |
| 95 | .supply_name = (_supply), \ |
Chen-Yu Tsai | 880fe82 | 2015-01-10 00:23:43 +0800 | [diff] [blame] | 96 | .of_match = of_match_ptr(_match), \ |
| 97 | .regulators_node = of_match_ptr("regulators"), \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 98 | .type = REGULATOR_VOLTAGE, \ |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 99 | .id = _family##_##_id, \ |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 100 | .n_voltages = ARRAY_SIZE(_table), \ |
| 101 | .owner = THIS_MODULE, \ |
| 102 | .vsel_reg = (_vreg), \ |
| 103 | .vsel_mask = (_vmask), \ |
| 104 | .enable_reg = (_ereg), \ |
| 105 | .enable_mask = (_emask), \ |
| 106 | .volt_table = (_table), \ |
| 107 | .ops = &axp20x_ops_table, \ |
| 108 | } |
| 109 | |
| 110 | static const int axp20x_ldo4_data[] = { 1250000, 1300000, 1400000, 1500000, 1600000, |
| 111 | 1700000, 1800000, 1900000, 2000000, 2500000, |
| 112 | 2700000, 2800000, 3000000, 3100000, 3200000, |
| 113 | 3300000 }; |
| 114 | |
| 115 | static struct regulator_ops axp20x_ops_fixed = { |
| 116 | .list_voltage = regulator_list_voltage_linear, |
| 117 | }; |
| 118 | |
| 119 | static struct regulator_ops axp20x_ops_table = { |
| 120 | .set_voltage_sel = regulator_set_voltage_sel_regmap, |
| 121 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
| 122 | .list_voltage = regulator_list_voltage_table, |
Axel Lin | b887035 | 2014-04-15 19:58:42 +0800 | [diff] [blame] | 123 | .map_voltage = regulator_map_voltage_ascend, |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 124 | .enable = regulator_enable_regmap, |
| 125 | .disable = regulator_disable_regmap, |
| 126 | .is_enabled = regulator_is_enabled_regmap, |
| 127 | }; |
| 128 | |
| 129 | static struct regulator_ops axp20x_ops = { |
| 130 | .set_voltage_sel = regulator_set_voltage_sel_regmap, |
| 131 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
| 132 | .list_voltage = regulator_list_voltage_linear, |
| 133 | .enable = regulator_enable_regmap, |
| 134 | .disable = regulator_disable_regmap, |
| 135 | .is_enabled = regulator_is_enabled_regmap, |
| 136 | }; |
| 137 | |
| 138 | static const struct regulator_desc axp20x_regulators[] = { |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 139 | AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25, |
| 140 | AXP20X_DCDC2_V_OUT, 0x3f, AXP20X_PWR_OUT_CTRL, 0x10), |
| 141 | AXP_DESC(AXP20X, DCDC3, "dcdc3", "vin3", 700, 3500, 25, |
| 142 | AXP20X_DCDC3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x02), |
| 143 | AXP_DESC_FIXED(AXP20X, LDO1, "ldo1", "acin", 1300), |
| 144 | AXP_DESC(AXP20X, LDO2, "ldo2", "ldo24in", 1800, 3300, 100, |
| 145 | AXP20X_LDO24_V_OUT, 0xf0, AXP20X_PWR_OUT_CTRL, 0x04), |
| 146 | AXP_DESC(AXP20X, LDO3, "ldo3", "ldo3in", 700, 3500, 25, |
| 147 | AXP20X_LDO3_V_OUT, 0x7f, AXP20X_PWR_OUT_CTRL, 0x40), |
| 148 | AXP_DESC_TABLE(AXP20X, LDO4, "ldo4", "ldo24in", axp20x_ldo4_data, |
| 149 | AXP20X_LDO24_V_OUT, 0x0f, AXP20X_PWR_OUT_CTRL, 0x08), |
| 150 | AXP_DESC_IO(AXP20X, LDO5, "ldo5", "ldo5in", 1800, 3300, 100, |
| 151 | AXP20X_LDO5_V_OUT, 0xf0, AXP20X_GPIO0_CTRL, 0x07, |
| 152 | AXP20X_IO_ENABLED, AXP20X_IO_DISABLED), |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 153 | }; |
| 154 | |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 155 | static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq) |
| 156 | { |
| 157 | struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 158 | u32 min, max, def, step; |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 159 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 160 | switch (axp20x->variant) { |
| 161 | case AXP202_ID: |
| 162 | case AXP209_ID: |
| 163 | min = 750; |
| 164 | max = 1875; |
| 165 | def = 1500; |
| 166 | step = 75; |
| 167 | break; |
| 168 | default: |
| 169 | dev_err(&pdev->dev, |
| 170 | "Setting DCDC frequency for unsupported AXP variant\n"); |
| 171 | return -EINVAL; |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 172 | } |
| 173 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 174 | if (dcdcfreq == 0) |
| 175 | dcdcfreq = def; |
| 176 | |
| 177 | if (dcdcfreq < min) { |
| 178 | dcdcfreq = min; |
| 179 | dev_warn(&pdev->dev, "DCDC frequency too low. Set to %ukHz\n", |
| 180 | min); |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 181 | } |
| 182 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 183 | if (dcdcfreq > max) { |
| 184 | dcdcfreq = max; |
| 185 | dev_warn(&pdev->dev, "DCDC frequency too high. Set to %ukHz\n", |
| 186 | max); |
| 187 | } |
| 188 | |
| 189 | dcdcfreq = (dcdcfreq - min) / step; |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 190 | |
| 191 | return regmap_update_bits(axp20x->regmap, AXP20X_DCDC_FREQ, |
| 192 | AXP20X_FREQ_DCDC_MASK, dcdcfreq); |
| 193 | } |
| 194 | |
| 195 | static int axp20x_regulator_parse_dt(struct platform_device *pdev) |
| 196 | { |
| 197 | struct device_node *np, *regulators; |
| 198 | int ret; |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 199 | u32 dcdcfreq = 0; |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 200 | |
| 201 | np = of_node_get(pdev->dev.parent->of_node); |
| 202 | if (!np) |
| 203 | return 0; |
| 204 | |
Boris BREZILLON | a6016c5 | 2014-05-19 10:25:30 +0200 | [diff] [blame] | 205 | regulators = of_get_child_by_name(np, "regulators"); |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 206 | if (!regulators) { |
| 207 | dev_warn(&pdev->dev, "regulators node not found\n"); |
| 208 | } else { |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 209 | of_property_read_u32(regulators, "x-powers,dcdc-freq", &dcdcfreq); |
| 210 | ret = axp20x_set_dcdc_freq(pdev, dcdcfreq); |
| 211 | if (ret < 0) { |
| 212 | dev_err(&pdev->dev, "Error setting dcdc frequency: %d\n", ret); |
| 213 | return ret; |
| 214 | } |
| 215 | |
| 216 | of_node_put(regulators); |
| 217 | } |
| 218 | |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 workmode) |
| 223 | { |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 224 | struct axp20x_dev *axp20x = rdev_get_drvdata(rdev); |
| 225 | unsigned int mask; |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 226 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 227 | switch (axp20x->variant) { |
| 228 | case AXP202_ID: |
| 229 | case AXP209_ID: |
| 230 | if ((id != AXP20X_DCDC2) && (id != AXP20X_DCDC3)) |
| 231 | return -EINVAL; |
| 232 | |
| 233 | mask = AXP20X_WORKMODE_DCDC2_MASK; |
| 234 | if (id == AXP20X_DCDC3) |
| 235 | mask = AXP20X_WORKMODE_DCDC3_MASK; |
| 236 | |
| 237 | workmode <<= ffs(mask) - 1; |
| 238 | break; |
| 239 | |
| 240 | default: |
| 241 | /* should not happen */ |
| 242 | WARN_ON(1); |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 243 | return -EINVAL; |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 244 | } |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 245 | |
| 246 | return regmap_update_bits(rdev->regmap, AXP20X_DCDC_MODE, mask, workmode); |
| 247 | } |
| 248 | |
| 249 | static int axp20x_regulator_probe(struct platform_device *pdev) |
| 250 | { |
| 251 | struct regulator_dev *rdev; |
| 252 | struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 253 | const struct regulator_desc *regulators; |
Chen-Yu Tsai | 765e802 | 2015-01-10 00:23:44 +0800 | [diff] [blame] | 254 | struct regulator_config config = { |
| 255 | .dev = pdev->dev.parent, |
| 256 | .regmap = axp20x->regmap, |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 257 | .driver_data = axp20x, |
Chen-Yu Tsai | 765e802 | 2015-01-10 00:23:44 +0800 | [diff] [blame] | 258 | }; |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 259 | int ret, i, nregulators; |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 260 | u32 workmode; |
| 261 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 262 | switch (axp20x->variant) { |
| 263 | case AXP202_ID: |
| 264 | case AXP209_ID: |
| 265 | regulators = axp20x_regulators; |
| 266 | nregulators = AXP20X_REG_ID_MAX; |
| 267 | break; |
| 268 | default: |
| 269 | dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n", |
| 270 | axp20x->variant); |
| 271 | return -EINVAL; |
| 272 | } |
| 273 | |
Chen-Yu Tsai | 765e802 | 2015-01-10 00:23:44 +0800 | [diff] [blame] | 274 | /* This only sets the dcdc freq. Ignore any errors */ |
| 275 | axp20x_regulator_parse_dt(pdev); |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 276 | |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 277 | for (i = 0; i < nregulators; i++) { |
| 278 | rdev = devm_regulator_register(&pdev->dev, ®ulators[i], |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 279 | &config); |
| 280 | if (IS_ERR(rdev)) { |
| 281 | dev_err(&pdev->dev, "Failed to register %s\n", |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 282 | regulators[i].name); |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 283 | |
| 284 | return PTR_ERR(rdev); |
| 285 | } |
| 286 | |
Chen-Yu Tsai | 765e802 | 2015-01-10 00:23:44 +0800 | [diff] [blame] | 287 | ret = of_property_read_u32(rdev->dev.of_node, |
| 288 | "x-powers,dcdc-workmode", |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 289 | &workmode); |
| 290 | if (!ret) { |
| 291 | if (axp20x_set_dcdc_workmode(rdev, i, workmode)) |
| 292 | dev_err(&pdev->dev, "Failed to set workmode on %s\n", |
Boris BREZILLON | 866bd95 | 2015-04-10 12:09:03 +0800 | [diff] [blame^] | 293 | rdev->desc->name); |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 294 | } |
| 295 | } |
| 296 | |
| 297 | return 0; |
| 298 | } |
| 299 | |
| 300 | static struct platform_driver axp20x_regulator_driver = { |
| 301 | .probe = axp20x_regulator_probe, |
| 302 | .driver = { |
| 303 | .name = "axp20x-regulator", |
Carlo Caione | dfe7a1b | 2014-04-11 11:38:10 +0200 | [diff] [blame] | 304 | }, |
| 305 | }; |
| 306 | |
| 307 | module_platform_driver(axp20x_regulator_driver); |
| 308 | |
| 309 | MODULE_LICENSE("GPL v2"); |
| 310 | MODULE_AUTHOR("Carlo Caione <carlo@caione.org>"); |
| 311 | MODULE_DESCRIPTION("Regulator Driver for AXP20X PMIC"); |