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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08002 * MFD core driver for the X-Powers' Power Management ICs
Carlo Caionecfb61a42014-05-01 14:29:27 +02003 *
Jacob Panaf7e9062014-10-06 21:17:14 -07004 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
Carlo Caionecfb61a42014-05-01 14:29:27 +02007 *
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08008 * This file contains the interface independent core functions.
9 *
Chen-Yu Tsaie7402352016-02-12 10:02:41 +080010 * Copyright (C) 2014 Carlo Caione
11 *
Carlo Caionecfb61a42014-05-01 14:29:27 +020012 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/err.h>
Hans de Goede179dc632016-06-05 15:50:48 +020020#include <linux/delay.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020021#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020026#include <linux/regulator/consumer.h>
27#include <linux/mfd/axp20x.h>
28#include <linux/mfd/core.h>
29#include <linux/of_device.h>
Jacob Panaf7e9062014-10-06 21:17:14 -070030#include <linux/acpi.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020031
32#define AXP20X_OFF 0x80
33
Krzysztof Kozlowskic31e8582015-03-24 11:21:17 +010034static const char * const axp20x_model_names[] = {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020035 "AXP152",
Jacob Panaf7e9062014-10-06 21:17:14 -070036 "AXP202",
37 "AXP209",
Boris BREZILLONf05be582015-04-10 12:09:01 +080038 "AXP221",
Chen-Yu Tsai02071f02016-02-12 10:02:44 +080039 "AXP223",
Jacob Panaf7e9062014-10-06 21:17:14 -070040 "AXP288",
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080041 "AXP809",
Jacob Panaf7e9062014-10-06 21:17:14 -070042};
43
Michal Suchanekd8d79f82015-07-11 14:59:56 +020044static const struct regmap_range axp152_writeable_ranges[] = {
45 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
46 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
47};
48
49static const struct regmap_range axp152_volatile_ranges[] = {
50 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
51 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
52 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
53};
54
55static const struct regmap_access_table axp152_writeable_table = {
56 .yes_ranges = axp152_writeable_ranges,
57 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
58};
59
60static const struct regmap_access_table axp152_volatile_table = {
61 .yes_ranges = axp152_volatile_ranges,
62 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
63};
64
Carlo Caionecfb61a42014-05-01 14:29:27 +020065static const struct regmap_range axp20x_writeable_ranges[] = {
66 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
67 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020068 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
Carlo Caionecfb61a42014-05-01 14:29:27 +020069};
70
71static const struct regmap_range axp20x_volatile_ranges[] = {
Bruno Prémont553ed4b2015-08-08 17:58:40 +020072 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
73 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
Carlo Caionecfb61a42014-05-01 14:29:27 +020074 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020075 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
76 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
77 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
Carlo Caionecfb61a42014-05-01 14:29:27 +020078};
79
80static const struct regmap_access_table axp20x_writeable_table = {
81 .yes_ranges = axp20x_writeable_ranges,
82 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
83};
84
85static const struct regmap_access_table axp20x_volatile_table = {
86 .yes_ranges = axp20x_volatile_ranges,
87 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
88};
89
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080090/* AXP22x ranges are shared with the AXP809, as they cover the same range */
Boris BREZILLONf05be582015-04-10 12:09:01 +080091static const struct regmap_range axp22x_writeable_ranges[] = {
92 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
93 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
94};
95
96static const struct regmap_range axp22x_volatile_ranges[] = {
Hans de Goede15093252016-05-14 19:51:28 +020097 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
Boris BREZILLONf05be582015-04-10 12:09:01 +080098 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Hans de Goede15093252016-05-14 19:51:28 +020099 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
100 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
Boris BREZILLONf05be582015-04-10 12:09:01 +0800101};
102
103static const struct regmap_access_table axp22x_writeable_table = {
104 .yes_ranges = axp22x_writeable_ranges,
105 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
106};
107
108static const struct regmap_access_table axp22x_volatile_table = {
109 .yes_ranges = axp22x_volatile_ranges,
110 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
111};
112
Jacob Panaf7e9062014-10-06 21:17:14 -0700113static const struct regmap_range axp288_writeable_ranges[] = {
114 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
115 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
116};
117
118static const struct regmap_range axp288_volatile_ranges[] = {
119 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
120};
121
122static const struct regmap_access_table axp288_writeable_table = {
123 .yes_ranges = axp288_writeable_ranges,
124 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
125};
126
127static const struct regmap_access_table axp288_volatile_table = {
128 .yes_ranges = axp288_volatile_ranges,
129 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
130};
131
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200132static struct resource axp152_pek_resources[] = {
133 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
134 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
135};
136
Michael Haascd7cf272016-05-06 07:19:49 +0200137static struct resource axp20x_ac_power_supply_resources[] = {
138 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
139 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
140 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
141};
142
Carlo Caionecfb61a42014-05-01 14:29:27 +0200143static struct resource axp20x_pek_resources[] = {
144 {
145 .name = "PEK_DBR",
146 .start = AXP20X_IRQ_PEK_RIS_EDGE,
147 .end = AXP20X_IRQ_PEK_RIS_EDGE,
148 .flags = IORESOURCE_IRQ,
149 }, {
150 .name = "PEK_DBF",
151 .start = AXP20X_IRQ_PEK_FAL_EDGE,
152 .end = AXP20X_IRQ_PEK_FAL_EDGE,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
Hans de Goede8de4efd2015-08-08 17:58:41 +0200157static struct resource axp20x_usb_power_supply_resources[] = {
158 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
159 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
160 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
161 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
162};
163
Hans de Goedeecd98cc2016-06-02 19:18:55 +0200164static struct resource axp22x_usb_power_supply_resources[] = {
165 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
166 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
167};
168
Boris BREZILLONf05be582015-04-10 12:09:01 +0800169static struct resource axp22x_pek_resources[] = {
170 {
171 .name = "PEK_DBR",
172 .start = AXP22X_IRQ_PEK_RIS_EDGE,
173 .end = AXP22X_IRQ_PEK_RIS_EDGE,
174 .flags = IORESOURCE_IRQ,
175 }, {
176 .name = "PEK_DBF",
177 .start = AXP22X_IRQ_PEK_FAL_EDGE,
178 .end = AXP22X_IRQ_PEK_FAL_EDGE,
179 .flags = IORESOURCE_IRQ,
180 },
181};
182
Borun Fue56e5ad2015-10-14 16:16:26 +0800183static struct resource axp288_power_button_resources[] = {
184 {
185 .name = "PEK_DBR",
186 .start = AXP288_IRQ_POKN,
187 .end = AXP288_IRQ_POKN,
188 .flags = IORESOURCE_IRQ,
189 },
190 {
191 .name = "PEK_DBF",
192 .start = AXP288_IRQ_POKP,
193 .end = AXP288_IRQ_POKP,
194 .flags = IORESOURCE_IRQ,
195 },
196};
197
Todd Brandtd63878742015-02-02 15:41:41 -0800198static struct resource axp288_fuel_gauge_resources[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700199 {
200 .start = AXP288_IRQ_QWBTU,
201 .end = AXP288_IRQ_QWBTU,
202 .flags = IORESOURCE_IRQ,
203 },
204 {
205 .start = AXP288_IRQ_WBTU,
206 .end = AXP288_IRQ_WBTU,
207 .flags = IORESOURCE_IRQ,
208 },
209 {
210 .start = AXP288_IRQ_QWBTO,
211 .end = AXP288_IRQ_QWBTO,
212 .flags = IORESOURCE_IRQ,
213 },
214 {
215 .start = AXP288_IRQ_WBTO,
216 .end = AXP288_IRQ_WBTO,
217 .flags = IORESOURCE_IRQ,
218 },
219 {
220 .start = AXP288_IRQ_WL2,
221 .end = AXP288_IRQ_WL2,
222 .flags = IORESOURCE_IRQ,
223 },
224 {
225 .start = AXP288_IRQ_WL1,
226 .end = AXP288_IRQ_WL1,
227 .flags = IORESOURCE_IRQ,
228 },
229};
230
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800231static struct resource axp809_pek_resources[] = {
232 {
233 .name = "PEK_DBR",
234 .start = AXP809_IRQ_PEK_RIS_EDGE,
235 .end = AXP809_IRQ_PEK_RIS_EDGE,
236 .flags = IORESOURCE_IRQ,
237 }, {
238 .name = "PEK_DBF",
239 .start = AXP809_IRQ_PEK_FAL_EDGE,
240 .end = AXP809_IRQ_PEK_FAL_EDGE,
241 .flags = IORESOURCE_IRQ,
242 },
243};
244
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200245static const struct regmap_config axp152_regmap_config = {
246 .reg_bits = 8,
247 .val_bits = 8,
248 .wr_table = &axp152_writeable_table,
249 .volatile_table = &axp152_volatile_table,
250 .max_register = AXP152_PWM1_DUTY_CYCLE,
251 .cache_type = REGCACHE_RBTREE,
252};
253
Carlo Caionecfb61a42014-05-01 14:29:27 +0200254static const struct regmap_config axp20x_regmap_config = {
255 .reg_bits = 8,
256 .val_bits = 8,
257 .wr_table = &axp20x_writeable_table,
258 .volatile_table = &axp20x_volatile_table,
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200259 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200260 .cache_type = REGCACHE_RBTREE,
261};
262
Boris BREZILLONf05be582015-04-10 12:09:01 +0800263static const struct regmap_config axp22x_regmap_config = {
264 .reg_bits = 8,
265 .val_bits = 8,
266 .wr_table = &axp22x_writeable_table,
267 .volatile_table = &axp22x_volatile_table,
268 .max_register = AXP22X_BATLOW_THRES1,
269 .cache_type = REGCACHE_RBTREE,
270};
271
Jacob Panaf7e9062014-10-06 21:17:14 -0700272static const struct regmap_config axp288_regmap_config = {
273 .reg_bits = 8,
274 .val_bits = 8,
275 .wr_table = &axp288_writeable_table,
276 .volatile_table = &axp288_volatile_table,
277 .max_register = AXP288_FG_TUNE5,
278 .cache_type = REGCACHE_RBTREE,
279};
280
281#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
282 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
Carlo Caionecfb61a42014-05-01 14:29:27 +0200283
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200284static const struct regmap_irq axp152_regmap_irqs[] = {
285 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
286 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
287 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
288 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
289 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
290 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
291 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
292 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
293 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
294 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
295 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
296 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
297 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
298 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
299 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
300 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
301 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
302};
303
Carlo Caionecfb61a42014-05-01 14:29:27 +0200304static const struct regmap_irq axp20x_regmap_irqs[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700305 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
306 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
307 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
308 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
309 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
310 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
311 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
312 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
313 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
314 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
315 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
316 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
317 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
318 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
319 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
320 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
321 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
322 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
323 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
324 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
325 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
326 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
327 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
328 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
329 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
330 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
331 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
332 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
333 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
334 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
335 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
336 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
337 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
338 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
339 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
340 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
341 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
342};
343
Boris BREZILLONf05be582015-04-10 12:09:01 +0800344static const struct regmap_irq axp22x_regmap_irqs[] = {
345 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
346 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
347 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
348 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
349 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
350 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
351 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
352 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
353 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
354 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
355 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
356 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
357 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
358 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
359 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
360 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
361 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
362 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
363 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
364 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
365 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
366 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
367 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
368 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
369 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
370};
371
Jacob Panaf7e9062014-10-06 21:17:14 -0700372/* some IRQs are compatible with axp20x models */
373static const struct regmap_irq axp288_regmap_irqs[] = {
Jacob Panff3bbc52014-11-11 11:30:09 -0800374 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
375 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
376 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
Jacob Panaf7e9062014-10-06 21:17:14 -0700377
Jacob Panff3bbc52014-11-11 11:30:09 -0800378 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
379 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700380 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
381 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
Jacob Panff3bbc52014-11-11 11:30:09 -0800382 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
383 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700384
385 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
386 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
387 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
Jacob Panff3bbc52014-11-11 11:30:09 -0800388 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700389 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
390 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
391 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
392 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
393
394 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
395 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
396 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
397 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
398
399 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
400 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
401 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
402 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
403 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
404 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
405 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
Jacob Panff3bbc52014-11-11 11:30:09 -0800406 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700407
408 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
409 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200410};
411
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800412static const struct regmap_irq axp809_regmap_irqs[] = {
413 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
414 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
415 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
416 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
417 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
418 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
419 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
420 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
421 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
422 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
423 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
424 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
425 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
426 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
427 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
428 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
429 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
430 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
431 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
432 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
433 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
434 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
435 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
436 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
437 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
438 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
439 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
440 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
441 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
442 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
443 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
444 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
445};
446
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200447static const struct regmap_irq_chip axp152_regmap_irq_chip = {
448 .name = "axp152_irq_chip",
449 .status_base = AXP152_IRQ1_STATE,
450 .ack_base = AXP152_IRQ1_STATE,
451 .mask_base = AXP152_IRQ1_EN,
452 .mask_invert = true,
453 .init_ack_masked = true,
454 .irqs = axp152_regmap_irqs,
455 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
456 .num_regs = 3,
457};
458
Carlo Caionecfb61a42014-05-01 14:29:27 +0200459static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
460 .name = "axp20x_irq_chip",
461 .status_base = AXP20X_IRQ1_STATE,
462 .ack_base = AXP20X_IRQ1_STATE,
463 .mask_base = AXP20X_IRQ1_EN,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200464 .mask_invert = true,
465 .init_ack_masked = true,
Jacob Panaf7e9062014-10-06 21:17:14 -0700466 .irqs = axp20x_regmap_irqs,
467 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
468 .num_regs = 5,
469
470};
471
Boris BREZILLONf05be582015-04-10 12:09:01 +0800472static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
473 .name = "axp22x_irq_chip",
474 .status_base = AXP20X_IRQ1_STATE,
475 .ack_base = AXP20X_IRQ1_STATE,
476 .mask_base = AXP20X_IRQ1_EN,
477 .mask_invert = true,
478 .init_ack_masked = true,
479 .irqs = axp22x_regmap_irqs,
480 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
481 .num_regs = 5,
482};
483
Jacob Panaf7e9062014-10-06 21:17:14 -0700484static const struct regmap_irq_chip axp288_regmap_irq_chip = {
485 .name = "axp288_irq_chip",
486 .status_base = AXP20X_IRQ1_STATE,
487 .ack_base = AXP20X_IRQ1_STATE,
488 .mask_base = AXP20X_IRQ1_EN,
489 .mask_invert = true,
490 .init_ack_masked = true,
491 .irqs = axp288_regmap_irqs,
492 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
493 .num_regs = 6,
494
Carlo Caionecfb61a42014-05-01 14:29:27 +0200495};
496
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800497static const struct regmap_irq_chip axp809_regmap_irq_chip = {
498 .name = "axp809",
499 .status_base = AXP20X_IRQ1_STATE,
500 .ack_base = AXP20X_IRQ1_STATE,
501 .mask_base = AXP20X_IRQ1_EN,
502 .mask_invert = true,
503 .init_ack_masked = true,
504 .irqs = axp809_regmap_irqs,
505 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
506 .num_regs = 5,
507};
508
Carlo Caionecfb61a42014-05-01 14:29:27 +0200509static struct mfd_cell axp20x_cells[] = {
510 {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200511 .name = "axp20x-pek",
512 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
513 .resources = axp20x_pek_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200514 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200515 .name = "axp20x-regulator",
516 }, {
Michael Haascd7cf272016-05-06 07:19:49 +0200517 .name = "axp20x-ac-power-supply",
518 .of_compatible = "x-powers,axp202-ac-power-supply",
519 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
520 .resources = axp20x_ac_power_supply_resources,
521 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200522 .name = "axp20x-usb-power-supply",
523 .of_compatible = "x-powers,axp202-usb-power-supply",
524 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
525 .resources = axp20x_usb_power_supply_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200526 },
527};
528
Boris BREZILLONf05be582015-04-10 12:09:01 +0800529static struct mfd_cell axp22x_cells[] = {
530 {
531 .name = "axp20x-pek",
532 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
533 .resources = axp22x_pek_resources,
Chen-Yu Tsai6d4fa892015-04-10 12:09:06 +0800534 }, {
535 .name = "axp20x-regulator",
Hans de Goedeecd98cc2016-06-02 19:18:55 +0200536 }, {
537 .name = "axp20x-usb-power-supply",
538 .of_compatible = "x-powers,axp221-usb-power-supply",
539 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
540 .resources = axp22x_usb_power_supply_resources,
Boris BREZILLONf05be582015-04-10 12:09:01 +0800541 },
542};
543
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200544static struct mfd_cell axp152_cells[] = {
545 {
546 .name = "axp20x-pek",
547 .num_resources = ARRAY_SIZE(axp152_pek_resources),
548 .resources = axp152_pek_resources,
549 },
550};
551
Jacob Panaf7e9062014-10-06 21:17:14 -0700552static struct resource axp288_adc_resources[] = {
553 {
554 .name = "GPADC",
555 .start = AXP288_IRQ_GPADC,
556 .end = AXP288_IRQ_GPADC,
557 .flags = IORESOURCE_IRQ,
558 },
559};
560
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530561static struct resource axp288_extcon_resources[] = {
562 {
563 .start = AXP288_IRQ_VBUS_FALL,
564 .end = AXP288_IRQ_VBUS_FALL,
565 .flags = IORESOURCE_IRQ,
566 },
567 {
568 .start = AXP288_IRQ_VBUS_RISE,
569 .end = AXP288_IRQ_VBUS_RISE,
570 .flags = IORESOURCE_IRQ,
571 },
572 {
573 .start = AXP288_IRQ_MV_CHNG,
574 .end = AXP288_IRQ_MV_CHNG,
575 .flags = IORESOURCE_IRQ,
576 },
577 {
578 .start = AXP288_IRQ_BC_USB_CHNG,
579 .end = AXP288_IRQ_BC_USB_CHNG,
580 .flags = IORESOURCE_IRQ,
581 },
582};
583
Jacob Panaf7e9062014-10-06 21:17:14 -0700584static struct resource axp288_charger_resources[] = {
585 {
586 .start = AXP288_IRQ_OV,
587 .end = AXP288_IRQ_OV,
588 .flags = IORESOURCE_IRQ,
589 },
590 {
591 .start = AXP288_IRQ_DONE,
592 .end = AXP288_IRQ_DONE,
593 .flags = IORESOURCE_IRQ,
594 },
595 {
596 .start = AXP288_IRQ_CHARGING,
597 .end = AXP288_IRQ_CHARGING,
598 .flags = IORESOURCE_IRQ,
599 },
600 {
601 .start = AXP288_IRQ_SAFE_QUIT,
602 .end = AXP288_IRQ_SAFE_QUIT,
603 .flags = IORESOURCE_IRQ,
604 },
605 {
606 .start = AXP288_IRQ_SAFE_ENTER,
607 .end = AXP288_IRQ_SAFE_ENTER,
608 .flags = IORESOURCE_IRQ,
609 },
610 {
611 .start = AXP288_IRQ_QCBTU,
612 .end = AXP288_IRQ_QCBTU,
613 .flags = IORESOURCE_IRQ,
614 },
615 {
616 .start = AXP288_IRQ_CBTU,
617 .end = AXP288_IRQ_CBTU,
618 .flags = IORESOURCE_IRQ,
619 },
620 {
621 .start = AXP288_IRQ_QCBTO,
622 .end = AXP288_IRQ_QCBTO,
623 .flags = IORESOURCE_IRQ,
624 },
625 {
626 .start = AXP288_IRQ_CBTO,
627 .end = AXP288_IRQ_CBTO,
628 .flags = IORESOURCE_IRQ,
629 },
630};
631
632static struct mfd_cell axp288_cells[] = {
633 {
634 .name = "axp288_adc",
635 .num_resources = ARRAY_SIZE(axp288_adc_resources),
636 .resources = axp288_adc_resources,
637 },
638 {
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530639 .name = "axp288_extcon",
640 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
641 .resources = axp288_extcon_resources,
642 },
643 {
Jacob Panaf7e9062014-10-06 21:17:14 -0700644 .name = "axp288_charger",
645 .num_resources = ARRAY_SIZE(axp288_charger_resources),
646 .resources = axp288_charger_resources,
647 },
648 {
Todd Brandtd63878742015-02-02 15:41:41 -0800649 .name = "axp288_fuel_gauge",
650 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
651 .resources = axp288_fuel_gauge_resources,
Jacob Panaf7e9062014-10-06 21:17:14 -0700652 },
Aaron Lud8139f62014-11-24 17:24:47 +0800653 {
Borun Fue56e5ad2015-10-14 16:16:26 +0800654 .name = "axp20x-pek",
655 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
656 .resources = axp288_power_button_resources,
657 },
658 {
Aaron Lud8139f62014-11-24 17:24:47 +0800659 .name = "axp288_pmic_acpi",
660 },
Jacob Panaf7e9062014-10-06 21:17:14 -0700661};
662
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800663static struct mfd_cell axp809_cells[] = {
664 {
665 .name = "axp20x-pek",
666 .num_resources = ARRAY_SIZE(axp809_pek_resources),
667 .resources = axp809_pek_resources,
668 }, {
669 .name = "axp20x-regulator",
670 },
671};
672
Carlo Caionecfb61a42014-05-01 14:29:27 +0200673static struct axp20x_dev *axp20x_pm_power_off;
674static void axp20x_power_off(void)
675{
Jacob Panaf7e9062014-10-06 21:17:14 -0700676 if (axp20x_pm_power_off->variant == AXP288_ID)
677 return;
678
Carlo Caionecfb61a42014-05-01 14:29:27 +0200679 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
680 AXP20X_OFF);
Hans de Goede179dc632016-06-05 15:50:48 +0200681
682 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
683 msleep(500);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200684}
685
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800686int axp20x_match_device(struct axp20x_dev *axp20x)
Jacob Panaf7e9062014-10-06 21:17:14 -0700687{
Chen-Yu Tsaie47a3cf2016-02-12 10:02:39 +0800688 struct device *dev = axp20x->dev;
Jacob Panaf7e9062014-10-06 21:17:14 -0700689 const struct acpi_device_id *acpi_id;
690 const struct of_device_id *of_id;
691
692 if (dev->of_node) {
Chen-Yu Tsaiaf7acc32016-02-12 10:02:40 +0800693 of_id = of_match_device(dev->driver->of_match_table, dev);
Jacob Panaf7e9062014-10-06 21:17:14 -0700694 if (!of_id) {
695 dev_err(dev, "Unable to match OF ID\n");
696 return -ENODEV;
697 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800698 axp20x->variant = (long)of_id->data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700699 } else {
700 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
701 if (!acpi_id || !acpi_id->driver_data) {
702 dev_err(dev, "Unable to match ACPI ID and data\n");
703 return -ENODEV;
704 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800705 axp20x->variant = (long)acpi_id->driver_data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700706 }
707
708 switch (axp20x->variant) {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200709 case AXP152_ID:
710 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
711 axp20x->cells = axp152_cells;
712 axp20x->regmap_cfg = &axp152_regmap_config;
713 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
714 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700715 case AXP202_ID:
716 case AXP209_ID:
717 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
718 axp20x->cells = axp20x_cells;
719 axp20x->regmap_cfg = &axp20x_regmap_config;
720 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
721 break;
Boris BREZILLONf05be582015-04-10 12:09:01 +0800722 case AXP221_ID:
Chen-Yu Tsai02071f02016-02-12 10:02:44 +0800723 case AXP223_ID:
Boris BREZILLONf05be582015-04-10 12:09:01 +0800724 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
725 axp20x->cells = axp22x_cells;
726 axp20x->regmap_cfg = &axp22x_regmap_config;
727 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
728 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700729 case AXP288_ID:
730 axp20x->cells = axp288_cells;
731 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
732 axp20x->regmap_cfg = &axp288_regmap_config;
733 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
734 break;
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800735 case AXP809_ID:
736 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
737 axp20x->cells = axp809_cells;
738 axp20x->regmap_cfg = &axp22x_regmap_config;
739 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
740 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700741 default:
742 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
743 return -EINVAL;
744 }
745 dev_info(dev, "AXP20x variant %s found\n",
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800746 axp20x_model_names[axp20x->variant]);
Jacob Panaf7e9062014-10-06 21:17:14 -0700747
748 return 0;
749}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800750EXPORT_SYMBOL(axp20x_match_device);
Jacob Panaf7e9062014-10-06 21:17:14 -0700751
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800752int axp20x_device_probe(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200753{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200754 int ret;
755
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800756 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200757 IRQF_ONESHOT | IRQF_SHARED, -1,
Jacob Panaf7e9062014-10-06 21:17:14 -0700758 axp20x->regmap_irq_chip,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200759 &axp20x->regmap_irqc);
760 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800761 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200762 return ret;
763 }
764
Jacob Panaf7e9062014-10-06 21:17:14 -0700765 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800766 axp20x->nr_cells, NULL, 0, NULL);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200767
768 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800769 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
770 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200771 return ret;
772 }
773
774 if (!pm_power_off) {
775 axp20x_pm_power_off = axp20x;
776 pm_power_off = axp20x_power_off;
777 }
778
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800779 dev_info(axp20x->dev, "AXP20X driver loaded\n");
Carlo Caionecfb61a42014-05-01 14:29:27 +0200780
781 return 0;
782}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800783EXPORT_SYMBOL(axp20x_device_probe);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200784
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800785int axp20x_device_remove(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200786{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200787 if (axp20x == axp20x_pm_power_off) {
788 axp20x_pm_power_off = NULL;
789 pm_power_off = NULL;
790 }
791
792 mfd_remove_devices(axp20x->dev);
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800793 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200794
795 return 0;
796}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800797EXPORT_SYMBOL(axp20x_device_remove);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200798
799MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
800MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
801MODULE_LICENSE("GPL");