Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2000 Hewlett-Packard Co |
| 3 | * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com> |
| 4 | * |
| 5 | * 32-bit integer division. |
| 6 | * |
| 7 | * This code is based on the application note entitled "Divide, Square Root |
| 8 | * and Remainder Algorithms for the IA-64 Architecture". This document |
| 9 | * is available as Intel document number 248725-002 or via the web at |
| 10 | * http://developer.intel.com/software/opensource/numerics/ |
| 11 | * |
| 12 | * For more details on the theory behind these algorithms, see "IA-64 |
| 13 | * and Elementary Functions" by Peter Markstein; HP Professional Books |
| 14 | * (http://www.hp.com/go/retailbooks/) |
| 15 | */ |
| 16 | |
| 17 | #include <asm/asmmacro.h> |
| 18 | |
| 19 | #ifdef MODULO |
| 20 | # define OP mod |
| 21 | #else |
| 22 | # define OP div |
| 23 | #endif |
| 24 | |
| 25 | #ifdef UNSIGNED |
| 26 | # define SGN u |
| 27 | # define EXTEND zxt4 |
| 28 | # define INT_TO_FP(a,b) fcvt.xuf.s1 a=b |
| 29 | # define FP_TO_INT(a,b) fcvt.fxu.trunc.s1 a=b |
| 30 | #else |
| 31 | # define SGN |
| 32 | # define EXTEND sxt4 |
| 33 | # define INT_TO_FP(a,b) fcvt.xf a=b |
| 34 | # define FP_TO_INT(a,b) fcvt.fx.trunc.s1 a=b |
| 35 | #endif |
| 36 | |
| 37 | #define PASTE1(a,b) a##b |
| 38 | #define PASTE(a,b) PASTE1(a,b) |
| 39 | #define NAME PASTE(PASTE(__,SGN),PASTE(OP,si3)) |
| 40 | |
| 41 | GLOBAL_ENTRY(NAME) |
| 42 | .regstk 2,0,0,0 |
| 43 | // Transfer inputs to FP registers. |
| 44 | mov r2 = 0xffdd // r2 = -34 + 65535 (fp reg format bias) |
| 45 | EXTEND in0 = in0 // in0 = a |
| 46 | EXTEND in1 = in1 // in1 = b |
| 47 | ;; |
| 48 | setf.sig f8 = in0 |
| 49 | setf.sig f9 = in1 |
| 50 | #ifdef MODULO |
| 51 | sub in1 = r0, in1 // in1 = -b |
| 52 | #endif |
| 53 | ;; |
| 54 | // Convert the inputs to FP, to avoid FP software-assist faults. |
| 55 | INT_TO_FP(f8, f8) |
| 56 | INT_TO_FP(f9, f9) |
| 57 | ;; |
| 58 | setf.exp f7 = r2 // f7 = 2^-34 |
| 59 | frcpa.s1 f6, p6 = f8, f9 // y0 = frcpa(b) |
| 60 | ;; |
| 61 | (p6) fmpy.s1 f8 = f8, f6 // q0 = a*y0 |
| 62 | (p6) fnma.s1 f6 = f9, f6, f1 // e0 = -b*y0 + 1 |
| 63 | ;; |
| 64 | #ifdef MODULO |
| 65 | setf.sig f9 = in1 // f9 = -b |
| 66 | #endif |
| 67 | (p6) fma.s1 f8 = f6, f8, f8 // q1 = e0*q0 + q0 |
| 68 | (p6) fma.s1 f6 = f6, f6, f7 // e1 = e0*e0 + 2^-34 |
| 69 | ;; |
| 70 | #ifdef MODULO |
| 71 | setf.sig f7 = in0 |
| 72 | #endif |
| 73 | (p6) fma.s1 f6 = f6, f8, f8 // q2 = e1*q1 + q1 |
| 74 | ;; |
| 75 | FP_TO_INT(f6, f6) // q = trunc(q2) |
| 76 | ;; |
| 77 | #ifdef MODULO |
| 78 | xma.l f6 = f6, f9, f7 // r = q*(-b) + a |
| 79 | ;; |
| 80 | #endif |
| 81 | getf.sig r8 = f6 // transfer result to result register |
| 82 | br.ret.sptk.many rp |
| 83 | END(NAME) |