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gerrit-public.fairphone.software / kernel / msm-4.9 / 880c0d140deb12d5be39a96375fcc42ad357f17d / . / arch / m68k / coldfire / m54xx.c
blob: 075aaabd136026a408ee4560ee4870127c6b1b9d [file] [log] [blame]
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]1/***************************************************************************/
2
3/*
Greg Ungererece9ae62014-08-19 11:55:24 +1000[diff] [blame]4 * m54xx.c -- platform support for ColdFire 54xx based boards
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]5 *
6 * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
7 */
8
9/***************************************************************************/
10
11#include <linux/kernel.h>
12#include <linux/param.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
Greg Ungerer88be3512011-10-14 15:06:22 +1000[diff] [blame]16#include <linux/mm.h>
Greg Ungerer98122d72012-07-13 16:07:15 +1000[diff] [blame]17#include <linux/clk.h>
Greg Ungerer88be3512011-10-14 15:06:22 +1000[diff] [blame]18#include <linux/bootmem.h>
19#include <asm/pgalloc.h>
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]20#include <asm/machdep.h>
21#include <asm/coldfire.h>
Greg Ungerer5b2e6552010-11-02 12:05:29 +1000[diff] [blame]22#include <asm/m54xxsim.h>
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]23#include <asm/mcfuart.h>
Greg Ungerer98122d72012-07-13 16:07:15 +1000[diff] [blame]24#include <asm/mcfclk.h>
Greg Ungerer5b2e6552010-11-02 12:05:29 +1000[diff] [blame]25#include <asm/m54xxgpt.h>
Greg Ungerer88be3512011-10-14 15:06:22 +1000[diff] [blame]26#ifdef CONFIG_MMU
27#include <asm/mmu_context.h>
28#endif
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]29
30/***************************************************************************/
31
Greg Ungerer98122d72012-07-13 16:07:15 +1000[diff] [blame]32DEFINE_CLK(pll, "pll.0", MCF_CLK);
33DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
34DEFINE_CLK(mcfslt0, "mcfslt.0", MCF_BUSCLK);
35DEFINE_CLK(mcfslt1, "mcfslt.1", MCF_BUSCLK);
36DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
37DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
38DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
39DEFINE_CLK(mcfuart3, "mcfuart.3", MCF_BUSCLK);
40
41struct clk *mcf_clks[] = {
42 &clk_pll,
43 &clk_sys,
44 &clk_mcfslt0,
45 &clk_mcfslt1,
46 &clk_mcfuart0,
47 &clk_mcfuart1,
48 &clk_mcfuart2,
49 &clk_mcfuart3,
50 NULL
51};
52
53/***************************************************************************/
54
Greg Ungerer5b2e6552010-11-02 12:05:29 +1000[diff] [blame]55static void __init m54xx_uarts_init(void)
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]56{
Greg Ungererb9a0c3f2011-12-24 01:08:47 +1000[diff] [blame]57 /* enable io pins */
Greg Ungerer632306f2012-09-18 14:34:04 +1000[diff] [blame]58 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC0);
Greg Ungererb9a0c3f2011-12-24 01:08:47 +1000[diff] [blame]59 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
Greg Ungerer632306f2012-09-18 14:34:04 +1000[diff] [blame]60 MCFGPIO_PAR_PSC1);
Greg Ungererb9a0c3f2011-12-24 01:08:47 +1000[diff] [blame]61 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
Greg Ungerer632306f2012-09-18 14:34:04 +1000[diff] [blame]62 MCF_PAR_PSC_CTS_CTS, MCFGPIO_PAR_PSC2);
63 __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC3);
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]64}
65
66/***************************************************************************/
67
Greg Ungerer5b2e6552010-11-02 12:05:29 +1000[diff] [blame]68static void mcf54xx_reset(void)
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]69{
70 /* disable interrupts and enable the watchdog */
71 asm("movew #0x2700, %sr\n");
Greg Ungerer944c3d82012-09-18 14:51:46 +1000[diff] [blame]72 __raw_writel(0, MCF_GPT_GMS0);
73 __raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0);
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]74 __raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
Greg Ungerer944c3d82012-09-18 14:51:46 +1000[diff] [blame]75 MCF_GPT_GMS0);
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]76}
77
78/***************************************************************************/
79
Greg Ungerer88be3512011-10-14 15:06:22 +1000[diff] [blame]80#ifdef CONFIG_MMU
81
82unsigned long num_pages;
83
84static void __init mcf54xx_bootmem_alloc(void)
85{
86 unsigned long start_pfn;
87 unsigned long memstart;
88
89 /* _rambase and _ramend will be naturally page aligned */
90 m68k_memory[0].addr = _rambase;
91 m68k_memory[0].size = _ramend - _rambase;
92
93 /* compute total pages in system */
94 num_pages = (_ramend - _rambase) >> PAGE_SHIFT;
95
96 /* page numbers */
97 memstart = PAGE_ALIGN(_ramstart);
98 min_low_pfn = _rambase >> PAGE_SHIFT;
99 start_pfn = memstart >> PAGE_SHIFT;
100 max_low_pfn = _ramend >> PAGE_SHIFT;
101 high_memory = (void *)_ramend;
102
103 m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
104 module_fixup(NULL, __start_fixup, __stop_fixup);
105
106 /* setup bootmem data */
107 m68k_setup_node(0);
108 memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
109 min_low_pfn, max_low_pfn);
110 free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
111}
112
113#endif /* CONFIG_MMU */
114
115/***************************************************************************/
116
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]117void __init config_BSP(char *commandp, int size)
118{
Greg Ungerer88be3512011-10-14 15:06:22 +1000[diff] [blame]119#ifdef CONFIG_MMU
120 mcf54xx_bootmem_alloc();
121 mmu_context_init();
122#endif
Greg Ungerer5b2e6552010-11-02 12:05:29 +1000[diff] [blame]123 mach_reset = mcf54xx_reset;
Greg Ungerer35aefb22012-01-23 15:34:58 +1000[diff] [blame]124 mach_sched_init = hw_timer_init;
Greg Ungerer5b2e6552010-11-02 12:05:29 +1000[diff] [blame]125 m54xx_uarts_init();
Philippe De Muyterea49f8ff2010-09-20 13:11:11 +0200[diff] [blame]126}
127
128/***************************************************************************/