Patrice Chotard | 1aa2d8d | 2013-01-28 14:23:45 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2012 |
| 3 | * |
| 4 | * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/gpio.h> |
| 13 | #include <linux/pinctrl/pinctrl.h> |
| 14 | #include <linux/mfd/abx500/ab8500.h> |
| 15 | #include "pinctrl-abx500.h" |
| 16 | |
| 17 | /* All the pins that can be used for GPIO and some other functions */ |
| 18 | #define ABX500_GPIO(offset) (offset) |
| 19 | |
| 20 | #define AB8505_PIN_N4 ABX500_GPIO(1) |
| 21 | #define AB8505_PIN_R5 ABX500_GPIO(2) |
| 22 | #define AB8505_PIN_P5 ABX500_GPIO(3) |
| 23 | /* hole */ |
| 24 | #define AB8505_PIN_B16 ABX500_GPIO(10) |
| 25 | #define AB8505_PIN_B17 ABX500_GPIO(11) |
| 26 | /* hole */ |
| 27 | #define AB8505_PIN_D17 ABX500_GPIO(13) |
| 28 | #define AB8505_PIN_C16 ABX500_GPIO(14) |
| 29 | /* hole */ |
| 30 | #define AB8505_PIN_P2 ABX500_GPIO(17) |
| 31 | #define AB8505_PIN_N3 ABX500_GPIO(18) |
| 32 | #define AB8505_PIN_T1 ABX500_GPIO(19) |
| 33 | #define AB8505_PIN_P3 ABX500_GPIO(20) |
| 34 | /* hole */ |
| 35 | #define AB8505_PIN_H14 ABX500_GPIO(34) |
| 36 | /* hole */ |
| 37 | #define AB8505_PIN_J15 ABX500_GPIO(40) |
| 38 | #define AB8505_PIN_J14 ABX500_GPIO(41) |
| 39 | /* hole */ |
| 40 | #define AB8505_PIN_L4 ABX500_GPIO(50) |
| 41 | /* hole */ |
| 42 | #define AB8505_PIN_D16 ABX500_GPIO(52) |
| 43 | #define AB8505_PIN_D15 ABX500_GPIO(53) |
| 44 | |
| 45 | /* indicates the higher GPIO number */ |
| 46 | #define AB8505_GPIO_MAX_NUMBER 53 |
| 47 | |
| 48 | /* |
| 49 | * The names of the pins are denoted by GPIO number and ball name, even |
| 50 | * though they can be used for other things than GPIO, this is the first |
| 51 | * column in the table of the data sheet and often used on schematics and |
| 52 | * such. |
| 53 | */ |
| 54 | static const struct pinctrl_pin_desc ab8505_pins[] = { |
| 55 | PINCTRL_PIN(AB8505_PIN_N4, "GPIO1_N4"), |
| 56 | PINCTRL_PIN(AB8505_PIN_R5, "GPIO2_R5"), |
| 57 | PINCTRL_PIN(AB8505_PIN_P5, "GPIO3_P5"), |
| 58 | /* hole */ |
| 59 | PINCTRL_PIN(AB8505_PIN_B16, "GPIO10_B16"), |
| 60 | PINCTRL_PIN(AB8505_PIN_B17, "GPIO11_B17"), |
| 61 | /* hole */ |
| 62 | PINCTRL_PIN(AB8505_PIN_D17, "GPIO13_D17"), |
| 63 | PINCTRL_PIN(AB8505_PIN_C16, "GPIO14_C16"), |
| 64 | /* hole */ |
| 65 | PINCTRL_PIN(AB8505_PIN_P2, "GPIO17_P2"), |
| 66 | PINCTRL_PIN(AB8505_PIN_N3, "GPIO18_N3"), |
| 67 | PINCTRL_PIN(AB8505_PIN_T1, "GPIO19_T1"), |
| 68 | PINCTRL_PIN(AB8505_PIN_P3, "GPIO20_P3"), |
| 69 | /* hole */ |
| 70 | PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"), |
| 71 | /* hole */ |
| 72 | PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"), |
| 73 | PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"), |
| 74 | /* hole */ |
| 75 | PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"), |
| 76 | /* hole */ |
| 77 | PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"), |
| 78 | PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"), |
| 79 | }; |
| 80 | |
| 81 | /* |
| 82 | * Maps local GPIO offsets to local pin numbers |
| 83 | */ |
| 84 | static const struct abx500_pinrange ab8505_pinranges[] = { |
| 85 | ABX500_PINRANGE(1, 3, ABX500_ALT_A), |
| 86 | ABX500_PINRANGE(10, 2, ABX500_DEFAULT), |
| 87 | ABX500_PINRANGE(13, 1, ABX500_DEFAULT), |
| 88 | ABX500_PINRANGE(14, 1, ABX500_ALT_A), |
| 89 | ABX500_PINRANGE(17, 4, ABX500_ALT_A), |
| 90 | ABX500_PINRANGE(34, 1, ABX500_ALT_A), |
| 91 | ABX500_PINRANGE(40, 2, ABX500_ALT_A), |
| 92 | ABX500_PINRANGE(50, 1, ABX500_DEFAULT), |
| 93 | ABX500_PINRANGE(52, 2, ABX500_ALT_A), |
| 94 | }; |
| 95 | |
| 96 | /* |
| 97 | * Read the pin group names like this: |
| 98 | * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function |
| 99 | * |
| 100 | * The groups are arranged as sets per altfunction column, so we can |
| 101 | * mux in one group at a time by selecting the same altfunction for them |
| 102 | * all. When functions require pins on different altfunctions, you need |
| 103 | * to combine several groups. |
| 104 | */ |
| 105 | |
| 106 | /* default column */ |
| 107 | static const unsigned sysclkreq2_d_1_pins[] = { AB8505_PIN_N4 }; |
| 108 | static const unsigned sysclkreq3_d_1_pins[] = { AB8505_PIN_R5 }; |
| 109 | static const unsigned sysclkreq4_d_1_pins[] = { AB8505_PIN_P5 }; |
| 110 | static const unsigned gpio10_d_1_pins[] = { AB8505_PIN_B16 }; |
| 111 | static const unsigned gpio11_d_1_pins[] = { AB8505_PIN_B17 }; |
| 112 | static const unsigned gpio13_d_1_pins[] = { AB8505_PIN_D17 }; |
| 113 | static const unsigned pwmout1_d_1_pins[] = { AB8505_PIN_C16 }; |
| 114 | /* audio data interface 2*/ |
| 115 | static const unsigned adi2_d_1_pins[] = { AB8505_PIN_P2, AB8505_PIN_N3, |
| 116 | AB8505_PIN_T1, AB8505_PIN_P3 }; |
| 117 | static const unsigned extcpena_d_1_pins[] = { AB8505_PIN_H14 }; |
| 118 | /* modem SDA/SCL */ |
| 119 | static const unsigned modsclsda_d_1_pins[] = { AB8505_PIN_J15, AB8505_PIN_J14 }; |
| 120 | static const unsigned gpio50_d_1_pins[] = { AB8505_PIN_L4 }; |
| 121 | static const unsigned resethw_d_1_pins[] = { AB8505_PIN_D16 }; |
| 122 | static const unsigned service_d_1_pins[] = { AB8505_PIN_D15 }; |
| 123 | |
| 124 | /* Altfunction A column */ |
| 125 | static const unsigned gpio1_a_1_pins[] = { AB8505_PIN_N4 }; |
| 126 | static const unsigned gpio2_a_1_pins[] = { AB8505_PIN_R5 }; |
| 127 | static const unsigned gpio3_a_1_pins[] = { AB8505_PIN_P5 }; |
| 128 | static const unsigned hiqclkena_a_1_pins[] = { AB8505_PIN_B16 }; |
| 129 | static const unsigned pdmclk_a_1_pins[] = { AB8505_PIN_B17 }; |
| 130 | static const unsigned uarttxdata_a_1_pins[] = { AB8505_PIN_D17 }; |
| 131 | static const unsigned gpio14_a_1_pins[] = { AB8505_PIN_C16 }; |
| 132 | static const unsigned gpio17_a_1_pins[] = { AB8505_PIN_P2 }; |
| 133 | static const unsigned gpio18_a_1_pins[] = { AB8505_PIN_N3 }; |
| 134 | static const unsigned gpio19_a_1_pins[] = { AB8505_PIN_T1 }; |
| 135 | static const unsigned gpio20_a_1_pins[] = { AB8505_PIN_P3 }; |
| 136 | static const unsigned gpio34_a_1_pins[] = { AB8505_PIN_H14 }; |
| 137 | static const unsigned gpio40_a_1_pins[] = { AB8505_PIN_J15 }; |
| 138 | static const unsigned gpio41_a_1_pins[] = { AB8505_PIN_J14 }; |
| 139 | static const unsigned uartrxdata_a_1_pins[] = { AB8505_PIN_J14 }; |
| 140 | static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 }; |
| 141 | static const unsigned gpio52_a_1_pins[] = { AB8505_PIN_D16 }; |
| 142 | static const unsigned gpio53_a_1_pins[] = { AB8505_PIN_D15 }; |
| 143 | |
| 144 | /* Altfunction B colum */ |
| 145 | static const unsigned pdmdata_b_1_pins[] = { AB8505_PIN_B16 }; |
| 146 | static const unsigned extvibrapwm1_b_1_pins[] = { AB8505_PIN_D17 }; |
| 147 | static const unsigned extvibrapwm2_b_1_pins[] = { AB8505_PIN_L4 }; |
| 148 | |
| 149 | /* Altfunction C column */ |
| 150 | static const unsigned usbvdat_c_1_pins[] = { AB8505_PIN_D17 }; |
| 151 | |
| 152 | #define AB8505_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \ |
| 153 | .npins = ARRAY_SIZE(a##_pins), .altsetting = b } |
| 154 | |
| 155 | static const struct abx500_pingroup ab8505_groups[] = { |
| 156 | AB8505_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT), |
| 157 | AB8505_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT), |
| 158 | AB8505_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT), |
| 159 | AB8505_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT), |
| 160 | AB8505_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT), |
| 161 | AB8505_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT), |
| 162 | AB8505_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT), |
| 163 | AB8505_PIN_GROUP(adi2_d_1, ABX500_DEFAULT), |
| 164 | AB8505_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT), |
| 165 | AB8505_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT), |
| 166 | AB8505_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT), |
| 167 | AB8505_PIN_GROUP(resethw_d_1, ABX500_DEFAULT), |
| 168 | AB8505_PIN_GROUP(service_d_1, ABX500_DEFAULT), |
| 169 | AB8505_PIN_GROUP(gpio1_a_1, ABX500_ALT_A), |
| 170 | AB8505_PIN_GROUP(gpio2_a_1, ABX500_ALT_A), |
| 171 | AB8505_PIN_GROUP(gpio3_a_1, ABX500_ALT_A), |
| 172 | AB8505_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A), |
| 173 | AB8505_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A), |
| 174 | AB8505_PIN_GROUP(uarttxdata_a_1, ABX500_ALT_A), |
| 175 | AB8505_PIN_GROUP(gpio14_a_1, ABX500_ALT_A), |
| 176 | AB8505_PIN_GROUP(gpio17_a_1, ABX500_ALT_A), |
| 177 | AB8505_PIN_GROUP(gpio18_a_1, ABX500_ALT_A), |
| 178 | AB8505_PIN_GROUP(gpio19_a_1, ABX500_ALT_A), |
| 179 | AB8505_PIN_GROUP(gpio20_a_1, ABX500_ALT_A), |
| 180 | AB8505_PIN_GROUP(gpio34_a_1, ABX500_ALT_A), |
| 181 | AB8505_PIN_GROUP(gpio40_a_1, ABX500_ALT_A), |
| 182 | AB8505_PIN_GROUP(gpio41_a_1, ABX500_ALT_A), |
| 183 | AB8505_PIN_GROUP(uartrxdata_a_1, ABX500_ALT_A), |
| 184 | AB8505_PIN_GROUP(gpio52_a_1, ABX500_ALT_A), |
| 185 | AB8505_PIN_GROUP(gpio53_a_1, ABX500_ALT_A), |
| 186 | AB8505_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B), |
| 187 | AB8505_PIN_GROUP(extvibrapwm1_b_1, ABX500_ALT_B), |
| 188 | AB8505_PIN_GROUP(extvibrapwm2_b_1, ABX500_ALT_B), |
| 189 | AB8505_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C), |
| 190 | }; |
| 191 | |
| 192 | /* We use this macro to define the groups applicable to a function */ |
| 193 | #define AB8505_FUNC_GROUPS(a, b...) \ |
| 194 | static const char * const a##_groups[] = { b }; |
| 195 | |
| 196 | AB8505_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1", |
| 197 | "sysclkreq4_d_1"); |
| 198 | AB8505_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1", |
| 199 | "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1", |
| 200 | "gpio17_a_1", "gpio18_a_1", "gpio19_a_1", "gpio20_a_1", |
| 201 | "gpio34_a_1", "gpio40_a_1", "gpio41_a_1", "gpio50_d_1", |
| 202 | "gpio52_a_1", "gpio53_a_1"); |
| 203 | AB8505_FUNC_GROUPS(pwmout, "pwmout1_d_1"); |
| 204 | AB8505_FUNC_GROUPS(adi2, "adi2_d_1"); |
| 205 | AB8505_FUNC_GROUPS(extcpena, "extcpena_d_1"); |
| 206 | AB8505_FUNC_GROUPS(modsclsda, "modsclsda_d_1"); |
| 207 | AB8505_FUNC_GROUPS(resethw, "resethw_d_1"); |
| 208 | AB8505_FUNC_GROUPS(service, "service_d_1"); |
| 209 | AB8505_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1"); |
| 210 | AB8505_FUNC_GROUPS(pdm, "pdmclk_a_1", "pdmdata_b_1"); |
| 211 | AB8505_FUNC_GROUPS(uartdata, "uarttxdata_a_1", "uartrxdata_a_1"); |
| 212 | AB8505_FUNC_GROUPS(extvibra, "extvibrapwm1_b_1", "extvibrapwm2_b_1"); |
| 213 | AB8505_FUNC_GROUPS(usbvdat, "usbvdat_c_1"); |
| 214 | |
| 215 | #define FUNCTION(fname) \ |
| 216 | { \ |
| 217 | .name = #fname, \ |
| 218 | .groups = fname##_groups, \ |
| 219 | .ngroups = ARRAY_SIZE(fname##_groups), \ |
| 220 | } |
| 221 | |
| 222 | static const struct abx500_function ab8505_functions[] = { |
| 223 | FUNCTION(sysclkreq), |
| 224 | FUNCTION(gpio), |
| 225 | FUNCTION(pwmout), |
| 226 | FUNCTION(adi2), |
| 227 | FUNCTION(extcpena), |
| 228 | FUNCTION(modsclsda), |
| 229 | FUNCTION(resethw), |
| 230 | FUNCTION(service), |
| 231 | FUNCTION(hiqclkena), |
| 232 | FUNCTION(pdm), |
| 233 | FUNCTION(uartdata), |
| 234 | FUNCTION(extvibra), |
| 235 | FUNCTION(extvibra), |
| 236 | FUNCTION(usbvdat), |
| 237 | }; |
| 238 | |
| 239 | /* |
| 240 | * this table translates what's is in the AB8505 specification regarding the |
| 241 | * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C). |
| 242 | * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1, |
| 243 | * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val), |
| 244 | * |
| 245 | * example : |
| 246 | * |
| 247 | * ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), |
| 248 | * means that pin AB8505_PIN_D18 (pin 13) supports 4 mux (default/ALT_A, |
| 249 | * ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to |
| 250 | * select the mux. ALTA, ALTB and ALTC val indicates values to write in |
| 251 | * ALTERNATFUNC register. We need to specifies these values as SOC |
| 252 | * designers didn't apply the same logic on how to select mux in the |
| 253 | * ABx500 family. |
| 254 | * |
| 255 | * As this pins supports at least ALT_B mux, default mux is |
| 256 | * selected by writing 1 in GPIOSEL bit : |
| 257 | * |
| 258 | * | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3 |
| 259 | * default | 1 | 0 | 0 |
| 260 | * alt_A | 0 | 0 | 1 |
| 261 | * alt_B | 0 | 0 | 0 |
| 262 | * alt_C | 0 | 1 | 0 |
| 263 | * |
| 264 | * ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED), |
| 265 | * means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL |
| 266 | * register is used to select the mux. As this pins doesn't support at |
| 267 | * least ALT_B mux, default mux is by writing 0 in GPIOSEL bit : |
| 268 | * |
| 269 | * | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1= |
| 270 | * default | 0 | 0 | 0 |
| 271 | * alt_A | 1 | 0 | 0 |
| 272 | */ |
| 273 | |
| 274 | struct alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = { |
| 275 | ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */ |
| 276 | ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */ |
| 277 | ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */ |
| 278 | ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/ |
| 279 | ALTERNATE_FUNCTIONS(4, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO4, bit 3 reserved */ |
| 280 | ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5, bit 4 reserved */ |
| 281 | ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6, bit 5 reserved */ |
| 282 | ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7, bit 6 reserved */ |
| 283 | ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8, bit 7 reserved */ |
| 284 | |
| 285 | ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */ |
| 286 | ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */ |
| 287 | ALTERNATE_FUNCTIONS(11, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */ |
| 288 | ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reseved */ |
| 289 | ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */ |
| 290 | ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */ |
| 291 | ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */ |
| 292 | ALTERNATE_FUNCTIONS(16, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 7 reserved */ |
| 293 | /* |
| 294 | * pins 17 to 20 are special case, only bit 0 is used to select |
| 295 | * alternate function for these 4 pins. |
| 296 | * bits 1 to 3 are reserved |
| 297 | */ |
| 298 | ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */ |
| 299 | ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */ |
| 300 | ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */ |
| 301 | ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */ |
| 302 | ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21, bit 4 reserved */ |
| 303 | ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22, bit 5 reserved */ |
| 304 | ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23, bit 6 reserved */ |
| 305 | ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24, bit 7 reserved */ |
| 306 | |
| 307 | ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25, bit 0 reserved */ |
| 308 | ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26, bit 1 reserved */ |
| 309 | ALTERNATE_FUNCTIONS(27, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO27, bit 2 reserved */ |
| 310 | ALTERNATE_FUNCTIONS(28, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO28, bit 3 reserved */ |
| 311 | ALTERNATE_FUNCTIONS(29, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO29, bit 4 reserved */ |
| 312 | ALTERNATE_FUNCTIONS(30, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO30, bit 5 reserved */ |
| 313 | ALTERNATE_FUNCTIONS(31, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO31, bit 6 reserved */ |
| 314 | ALTERNATE_FUNCTIONS(32, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO32, bit 7 reserved */ |
| 315 | |
| 316 | ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33, bit 0 reserved */ |
| 317 | ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */ |
| 318 | ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35, bit 2 reserved */ |
| 319 | ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36, bit 2 reserved */ |
| 320 | ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37, bit 2 reserved */ |
| 321 | ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38, bit 2 reserved */ |
| 322 | ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39, bit 2 reserved */ |
| 323 | ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7*/ |
| 324 | |
| 325 | ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */ |
| 326 | ALTERNATE_FUNCTIONS(42, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO42, bit 1 reserved */ |
| 327 | ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43, bit 2 reserved */ |
| 328 | ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44, bit 3 reserved */ |
| 329 | ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45, bit 4 reserved */ |
| 330 | ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46, bit 5 reserved */ |
| 331 | ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47, bit 6 reserved */ |
| 332 | ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48, bit 7 reserved */ |
| 333 | |
| 334 | ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */ |
| 335 | ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA controlled by bit 1 */ |
| 336 | ALTERNATE_FUNCTIONS(51, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */ |
| 337 | ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */ |
| 338 | ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */ |
| 339 | }; |
| 340 | |
| 341 | /* |
| 342 | * For AB8505 Only some GPIOs are interrupt capable, and they are |
| 343 | * organized in discontiguous clusters: |
| 344 | * |
| 345 | * GPIO10 to GPIO11 |
| 346 | * GPIO13 |
| 347 | * GPIO40 and GPIO41 |
| 348 | * GPIO50 |
| 349 | * GPIO52 to GPIO53 |
| 350 | */ |
| 351 | struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = { |
Linus Walleij | 43a255d | 2013-02-04 15:21:41 +0100 | [diff] [blame] | 352 | GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R), |
| 353 | GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R), |
| 354 | GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R), |
| 355 | GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R), |
| 356 | GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R), |
Patrice Chotard | 1aa2d8d | 2013-01-28 14:23:45 +0100 | [diff] [blame] | 357 | }; |
| 358 | |
| 359 | static struct abx500_pinctrl_soc_data ab8505_soc = { |
| 360 | .gpio_ranges = ab8505_pinranges, |
| 361 | .gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges), |
| 362 | .pins = ab8505_pins, |
| 363 | .npins = ARRAY_SIZE(ab8505_pins), |
| 364 | .functions = ab8505_functions, |
| 365 | .nfunctions = ARRAY_SIZE(ab8505_functions), |
| 366 | .groups = ab8505_groups, |
| 367 | .ngroups = ARRAY_SIZE(ab8505_groups), |
| 368 | .alternate_functions = ab8505_alternate_functions, |
| 369 | .gpio_irq_cluster = ab8505_gpio_irq_cluster, |
| 370 | .ngpio_irq_cluster = ARRAY_SIZE(ab8505_gpio_irq_cluster), |
| 371 | .irq_gpio_rising_offset = AB8500_INT_GPIO6R, |
| 372 | .irq_gpio_falling_offset = AB8500_INT_GPIO6F, |
| 373 | .irq_gpio_factor = 1, |
| 374 | }; |
| 375 | |
| 376 | void |
| 377 | abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc) |
| 378 | { |
| 379 | *soc = &ab8505_soc; |
| 380 | } |