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Laurent Pinchart4d8864c2013-12-11 15:05:13 +01001/*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
11#define __DT_BINDINGS_CLOCK_R8A7791_H__
12
13/* CPG */
14#define R8A7791_CLK_MAIN 0
15#define R8A7791_CLK_PLL0 1
16#define R8A7791_CLK_PLL1 2
17#define R8A7791_CLK_PLL3 3
18#define R8A7791_CLK_LB 4
19#define R8A7791_CLK_QSPI 5
20#define R8A7791_CLK_SDH 6
21#define R8A7791_CLK_SD0 7
22#define R8A7791_CLK_Z 8
Sergei Shtylyovb3242522015-01-06 01:24:08 +030023#define R8A7791_CLK_RCAN 9
Sergei Shtylyovae65a8a2014-12-30 23:20:34 +030024#define R8A7791_CLK_ADSP 10
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010025
Laurent Pinchartcded80f2013-12-19 16:51:02 +010026/* MSTP0 */
27#define R8A7791_CLK_MSIOF0 0
28
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010029/* MSTP1 */
Yoshifumi Hosoya74d89d22014-10-14 16:01:43 +090030#define R8A7791_CLK_VCP0 1
31#define R8A7791_CLK_VPC0 3
32#define R8A7791_CLK_JPU 6
33#define R8A7791_CLK_SSP1 9
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010034#define R8A7791_CLK_TMU1 11
Kouei Abee4d2fd92014-10-14 16:01:41 +090035#define R8A7791_CLK_3DG 12
Yoshifumi Hosoya74d89d22014-10-14 16:01:43 +090036#define R8A7791_CLK_2DDMAC 15
37#define R8A7791_CLK_FDP1_1 18
38#define R8A7791_CLK_FDP1_0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010039#define R8A7791_CLK_TMU3 21
40#define R8A7791_CLK_TMU2 22
41#define R8A7791_CLK_CMT0 24
42#define R8A7791_CLK_TMU0 25
43#define R8A7791_CLK_VSP1_DU1 27
44#define R8A7791_CLK_VSP1_DU0 28
Laurent Pinchart58ea1d52014-04-02 16:31:47 +020045#define R8A7791_CLK_VSP1_S 31
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010046
47/* MSTP2 */
48#define R8A7791_CLK_SCIFA2 2
49#define R8A7791_CLK_SCIFA1 3
50#define R8A7791_CLK_SCIFA0 4
Laurent Pinchartcded80f2013-12-19 16:51:02 +010051#define R8A7791_CLK_MSIOF2 5
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010052#define R8A7791_CLK_SCIFB0 6
53#define R8A7791_CLK_SCIFB1 7
Laurent Pinchartcded80f2013-12-19 16:51:02 +010054#define R8A7791_CLK_MSIOF1 8
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010055#define R8A7791_CLK_SCIFB2 16
Geert Uytterhoevena505daa2014-05-12 20:49:33 +020056#define R8A7791_CLK_SYS_DMAC1 18
57#define R8A7791_CLK_SYS_DMAC0 19
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010058
59/* MSTP3 */
60#define R8A7791_CLK_TPU0 4
61#define R8A7791_CLK_SDHI2 11
62#define R8A7791_CLK_SDHI1 12
63#define R8A7791_CLK_SDHI0 14
64#define R8A7791_CLK_MMCIF0 15
Wolfram Sangc6e8f322014-03-10 12:26:56 +010065#define R8A7791_CLK_IIC0 18
Phil Edworthy4bfb3762014-06-13 10:37:18 +010066#define R8A7791_CLK_PCIEC 19
Wolfram Sangc6e8f322014-03-10 12:26:56 +010067#define R8A7791_CLK_IIC1 23
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010068#define R8A7791_CLK_SSUSB 28
69#define R8A7791_CLK_CMT1 29
70#define R8A7791_CLK_USBDMAC0 30
71#define R8A7791_CLK_USBDMAC1 31
72
Geert Uytterhoeven62d386c2015-03-18 19:56:00 +010073/* MSTP4 */
74#define R8A7791_CLK_IRQC 7
75
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010076/* MSTP5 */
Kuninori Morimoto8994fff2014-11-03 17:45:37 -080077#define R8A7791_CLK_AUDIO_DMAC1 1
78#define R8A7791_CLK_AUDIO_DMAC0 2
Sergei Shtylyovae65a8a2014-12-30 23:20:34 +030079#define R8A7791_CLK_ADSP_MOD 6
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010080#define R8A7791_CLK_THERMAL 22
81#define R8A7791_CLK_PWM 23
82
83/* MSTP7 */
Magnus Damm6225b992014-04-07 15:04:21 +090084#define R8A7791_CLK_EHCI 3
Laurent Pinchart4d8864c2013-12-11 15:05:13 +010085#define R8A7791_CLK_HSUSB 4
86#define R8A7791_CLK_HSCIF2 13
87#define R8A7791_CLK_SCIF5 14
88#define R8A7791_CLK_SCIF4 15
89#define R8A7791_CLK_HSCIF1 16
90#define R8A7791_CLK_HSCIF0 17
91#define R8A7791_CLK_SCIF3 18
92#define R8A7791_CLK_SCIF2 19
93#define R8A7791_CLK_SCIF1 20
94#define R8A7791_CLK_SCIF0 21
95#define R8A7791_CLK_DU1 23
96#define R8A7791_CLK_DU0 24
97#define R8A7791_CLK_LVDS0 26
98
99/* MSTP8 */
Ryo Kataokace85ad42014-12-09 13:21:22 +0900100#define R8A7791_CLK_IPMMU_SGX 0
Andrey Gusakov7408d302014-12-18 23:43:03 +0300101#define R8A7791_CLK_MLB 2
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100102#define R8A7791_CLK_VIN2 9
103#define R8A7791_CLK_VIN1 10
104#define R8A7791_CLK_VIN0 11
105#define R8A7791_CLK_ETHER 13
106#define R8A7791_CLK_SATA1 14
107#define R8A7791_CLK_SATA0 15
108
109/* MSTP9 */
110#define R8A7791_CLK_GPIO7 4
111#define R8A7791_CLK_GPIO6 5
112#define R8A7791_CLK_GPIO5 7
113#define R8A7791_CLK_GPIO4 8
114#define R8A7791_CLK_GPIO3 9
115#define R8A7791_CLK_GPIO2 10
116#define R8A7791_CLK_GPIO1 11
117#define R8A7791_CLK_GPIO0 12
118#define R8A7791_CLK_RCAN1 15
119#define R8A7791_CLK_RCAN0 16
Laurent Pinchartec71f552013-12-19 16:51:04 +0100120#define R8A7791_CLK_QSPI_MOD 17
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100121#define R8A7791_CLK_I2C5 25
122#define R8A7791_CLK_IICDVFS 26
123#define R8A7791_CLK_I2C4 27
124#define R8A7791_CLK_I2C3 28
125#define R8A7791_CLK_I2C2 29
126#define R8A7791_CLK_I2C1 30
127#define R8A7791_CLK_I2C0 31
128
Kuninori Morimotoee914152014-06-11 21:44:16 -0700129/* MSTP10 */
130#define R8A7791_CLK_SSI_ALL 5
131#define R8A7791_CLK_SSI9 6
132#define R8A7791_CLK_SSI8 7
133#define R8A7791_CLK_SSI7 8
134#define R8A7791_CLK_SSI6 9
135#define R8A7791_CLK_SSI5 10
136#define R8A7791_CLK_SSI4 11
137#define R8A7791_CLK_SSI3 12
138#define R8A7791_CLK_SSI2 13
139#define R8A7791_CLK_SSI1 14
140#define R8A7791_CLK_SSI0 15
141#define R8A7791_CLK_SCU_ALL 17
142#define R8A7791_CLK_SCU_DVC1 18
143#define R8A7791_CLK_SCU_DVC0 19
Kuninori Morimoto88401702015-07-21 00:27:03 +0000144#define R8A7791_CLK_SCU_CTU1_MIX1 20
145#define R8A7791_CLK_SCU_CTU0_MIX0 21
Kuninori Morimotoee914152014-06-11 21:44:16 -0700146#define R8A7791_CLK_SCU_SRC9 22
147#define R8A7791_CLK_SCU_SRC8 23
148#define R8A7791_CLK_SCU_SRC7 24
149#define R8A7791_CLK_SCU_SRC6 25
150#define R8A7791_CLK_SCU_SRC5 26
151#define R8A7791_CLK_SCU_SRC4 27
152#define R8A7791_CLK_SCU_SRC3 28
153#define R8A7791_CLK_SCU_SRC2 29
154#define R8A7791_CLK_SCU_SRC1 30
155#define R8A7791_CLK_SCU_SRC0 31
156
Laurent Pinchart4d8864c2013-12-11 15:05:13 +0100157/* MSTP11 */
158#define R8A7791_CLK_SCIFA3 6
159#define R8A7791_CLK_SCIFA4 7
160#define R8A7791_CLK_SCIFA5 8
161
162#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */