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gerrit-public.fairphone.software / kernel / msm-4.9 / 884d04cd8d7bba3dc885227ad400f8aea5623cdc / . / include / asm-sparc64 / ttable.h
blob: 7208a777750e77e624507f7ce4a53b5c44335c0d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/* $Id: ttable.h,v 1.18 2002/02/09 19:49:32 davem Exp $ */
2#ifndef _SPARC64_TTABLE_H
3#define _SPARC64_TTABLE_H
4
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]5#include <asm/utrap.h>
6
7#ifdef __ASSEMBLY__
8#include <asm/thread_info.h>
9#endif
10
11#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
12
13/* We need a "cleaned" instruction... */
14#define CLEAN_WINDOW \
15 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
16 wrpr %l0, 0x0, %cleanwin; \
17 clr %o0; clr %o1; clr %o2; clr %o3; \
18 clr %o4; clr %o5; clr %o6; clr %o7; \
19 clr %l0; clr %l1; clr %l2; clr %l3; \
20 clr %l4; clr %l5; clr %l6; clr %l7; \
21 retry; \
22 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
23
24#define TRAP(routine) \
25 sethi %hi(109f), %g7; \
26 ba,pt %xcc, etrap; \
27109: or %g7, %lo(109b), %g7; \
28 call routine; \
29 add %sp, PTREGS_OFF, %o0; \
30 ba,pt %xcc, rtrap; \
31 clr %l6; \
32 nop;
33
34#define TRAP_7INSNS(routine) \
35 sethi %hi(109f), %g7; \
36 ba,pt %xcc, etrap; \
37109: or %g7, %lo(109b), %g7; \
38 call routine; \
39 add %sp, PTREGS_OFF, %o0; \
40 ba,pt %xcc, rtrap; \
41 clr %l6;
42
43#define TRAP_SAVEFPU(routine) \
44 sethi %hi(109f), %g7; \
45 ba,pt %xcc, do_fptrap; \
46109: or %g7, %lo(109b), %g7; \
47 call routine; \
48 add %sp, PTREGS_OFF, %o0; \
49 ba,pt %xcc, rtrap; \
50 clr %l6; \
51 nop;
52
53#define TRAP_NOSAVE(routine) \
54 ba,pt %xcc, routine; \
55 nop; \
56 nop; nop; nop; nop; nop; nop;
57
58#define TRAP_NOSAVE_7INSNS(routine) \
59 ba,pt %xcc, routine; \
60 nop; \
61 nop; nop; nop; nop; nop;
62
63#define TRAPTL1(routine) \
64 sethi %hi(109f), %g7; \
65 ba,pt %xcc, etraptl1; \
66109: or %g7, %lo(109b), %g7; \
67 call routine; \
68 add %sp, PTREGS_OFF, %o0; \
69 ba,pt %xcc, rtrap; \
70 clr %l6; \
71 nop;
72
73#define TRAP_ARG(routine, arg) \
74 sethi %hi(109f), %g7; \
75 ba,pt %xcc, etrap; \
76109: or %g7, %lo(109b), %g7; \
77 add %sp, PTREGS_OFF, %o0; \
78 call routine; \
79 mov arg, %o1; \
80 ba,pt %xcc, rtrap; \
81 clr %l6;
82
83#define TRAPTL1_ARG(routine, arg) \
84 sethi %hi(109f), %g7; \
85 ba,pt %xcc, etraptl1; \
86109: or %g7, %lo(109b), %g7; \
87 add %sp, PTREGS_OFF, %o0; \
88 call routine; \
89 mov arg, %o1; \
90 ba,pt %xcc, rtrap; \
91 clr %l6;
92
93#define SYSCALL_TRAP(routine, systbl) \
94 sethi %hi(109f), %g7; \
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]95 ba,pt %xcc, etrap; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]96109: or %g7, %lo(109b), %g7; \
97 sethi %hi(systbl), %l7; \
98 ba,pt %xcc, routine; \
99 or %l7, %lo(systbl), %l7; \
100 nop; nop;
101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]102#define TRAP_UTRAP(handler,lvl) \
David S. Miller56fb4df2006-02-26 23:24:22 -0800[diff] [blame]103 mov handler, %g3; \
104 ba,pt %xcc, utrap_trap; \
105 mov lvl, %g4; \
106 nop; \
107 nop; \
108 nop; \
109 nop; \
110 nop;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]111
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]112#ifdef CONFIG_COMPAT
113#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
114#else
115#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
116#endif
117#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
118#define GETCC_TRAP TRAP(getcc)
119#define SETCC_TRAP TRAP(setcc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]120#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
121
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]122#ifdef CONFIG_TRACE_IRQFLAGS
123
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]124#define TRAP_IRQ(routine, level) \
125 rdpr %pil, %g2; \
126 wrpr %g0, 15, %pil; \
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]127 sethi %hi(1f-4), %g7; \
128 ba,pt %xcc, etrap_irq; \
129 or %g7, %lo(1f-4), %g7; \
130 nop; \
131 nop; \
132 nop; \
133 .subsection 2; \
1341: call trace_hardirqs_off; \
135 nop; \
136 mov level, %o0; \
137 call routine; \
138 add %sp, PTREGS_OFF, %o1; \
139 ba,a,pt %xcc, rtrap_irq; \
140 .previous;
141
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]142#else
143
144#define TRAP_IRQ(routine, level) \
145 rdpr %pil, %g2; \
146 wrpr %g0, 15, %pil; \
147 ba,pt %xcc, etrap_irq; \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]148 rd %pc, %g7; \
149 mov level, %o0; \
150 call routine; \
151 add %sp, PTREGS_OFF, %o1; \
152 ba,a,pt %xcc, rtrap_irq;
153
David S. Miller10e26722006-11-16 13:38:57 -0800[diff] [blame]154#endif
155
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]156#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
157
158#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
159
160#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
161
162#define FLUSH_WINDOW_TRAP \
163 ba,pt %xcc, etrap; \
164 rd %pc, %g7; \
165 flushw; \
166 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
167 add %l1, 4, %l2; \
168 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
169 ba,pt %xcc, rtrap_clr_l6; \
170 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
171
172#ifdef CONFIG_KPROBES
173#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
174#else
175#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
176#endif
177
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]178#define SUN4V_ITSB_MISS \
179 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
180 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
181 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]182 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]183 ba,pt %xcc, sun4v_itsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]184 nop; \
185 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]186 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]187
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]188#define SUN4V_DTSB_MISS \
David S. Miller12eaa322006-02-10 15:39:51 -0800[diff] [blame]189 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
190 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
191 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]192 srlx %g4, 22, %g6; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]193 ba,pt %xcc, sun4v_dtsb_miss; \
David S. Miller8b234272006-02-17 18:01:02 -0800[diff] [blame]194 nop; \
195 nop; \
David S. Miller459b6e62006-02-11 12:21:20 -0800[diff] [blame]196 nop;
David S. Milleraa9143b2006-02-09 16:12:22 -0800[diff] [blame]197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]198/* Before touching these macros, you owe it to yourself to go and
199 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
200 *
201 * For the user cases we used to use the %asi register, but
202 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
203 * now we use immediate ASI loads and stores instead. Kudos
204 * to Greg Onufer for pointing out this performance anomaly.
205 *
206 * Further note that we cannot use the g2, g4, g5, and g7 alternate
207 * globals in the spill routines, check out the save instruction in
208 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
209 * g4/g5 are the globals which are preserved by etrap processing
210 * for the caller of it. The g7 register is the return pc for
211 * etrap. Finally, g6 is the current thread register so we cannot
212 * us it in the spill handlers either. Most of these rules do not
213 * apply to fill processing, only g6 is not usable.
214 */
215
216/* Normal kernel spill */
217#define SPILL_0_NORMAL \
218 stx %l0, [%sp + STACK_BIAS + 0x00]; \
219 stx %l1, [%sp + STACK_BIAS + 0x08]; \
220 stx %l2, [%sp + STACK_BIAS + 0x10]; \
221 stx %l3, [%sp + STACK_BIAS + 0x18]; \
222 stx %l4, [%sp + STACK_BIAS + 0x20]; \
223 stx %l5, [%sp + STACK_BIAS + 0x28]; \
224 stx %l6, [%sp + STACK_BIAS + 0x30]; \
225 stx %l7, [%sp + STACK_BIAS + 0x38]; \
226 stx %i0, [%sp + STACK_BIAS + 0x40]; \
227 stx %i1, [%sp + STACK_BIAS + 0x48]; \
228 stx %i2, [%sp + STACK_BIAS + 0x50]; \
229 stx %i3, [%sp + STACK_BIAS + 0x58]; \
230 stx %i4, [%sp + STACK_BIAS + 0x60]; \
231 stx %i5, [%sp + STACK_BIAS + 0x68]; \
232 stx %i6, [%sp + STACK_BIAS + 0x70]; \
233 stx %i7, [%sp + STACK_BIAS + 0x78]; \
234 saved; retry; nop; nop; nop; nop; nop; nop; \
235 nop; nop; nop; nop; nop; nop; nop; nop;
236
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]237#define SPILL_0_NORMAL_ETRAP \
238etrap_kernel_spill: \
239 stx %l0, [%sp + STACK_BIAS + 0x00]; \
240 stx %l1, [%sp + STACK_BIAS + 0x08]; \
241 stx %l2, [%sp + STACK_BIAS + 0x10]; \
242 stx %l3, [%sp + STACK_BIAS + 0x18]; \
243 stx %l4, [%sp + STACK_BIAS + 0x20]; \
244 stx %l5, [%sp + STACK_BIAS + 0x28]; \
245 stx %l6, [%sp + STACK_BIAS + 0x30]; \
246 stx %l7, [%sp + STACK_BIAS + 0x38]; \
247 stx %i0, [%sp + STACK_BIAS + 0x40]; \
248 stx %i1, [%sp + STACK_BIAS + 0x48]; \
249 stx %i2, [%sp + STACK_BIAS + 0x50]; \
250 stx %i3, [%sp + STACK_BIAS + 0x58]; \
251 stx %i4, [%sp + STACK_BIAS + 0x60]; \
252 stx %i5, [%sp + STACK_BIAS + 0x68]; \
253 stx %i6, [%sp + STACK_BIAS + 0x70]; \
254 stx %i7, [%sp + STACK_BIAS + 0x78]; \
255 saved; \
256 sub %g1, 2, %g1; \
257 ba,pt %xcc, etrap_save; \
258 wrpr %g1, %cwp; \
259 nop; nop; nop; nop; nop; nop; nop; nop; \
260 nop; nop; nop; nop;
261
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]262/* Normal 64bit spill */
263#define SPILL_1_GENERIC(ASI) \
264 add %sp, STACK_BIAS + 0x00, %g1; \
265 stxa %l0, [%g1 + %g0] ASI; \
266 mov 0x08, %g3; \
267 stxa %l1, [%g1 + %g3] ASI; \
268 add %g1, 0x10, %g1; \
269 stxa %l2, [%g1 + %g0] ASI; \
270 stxa %l3, [%g1 + %g3] ASI; \
271 add %g1, 0x10, %g1; \
272 stxa %l4, [%g1 + %g0] ASI; \
273 stxa %l5, [%g1 + %g3] ASI; \
274 add %g1, 0x10, %g1; \
275 stxa %l6, [%g1 + %g0] ASI; \
276 stxa %l7, [%g1 + %g3] ASI; \
277 add %g1, 0x10, %g1; \
278 stxa %i0, [%g1 + %g0] ASI; \
279 stxa %i1, [%g1 + %g3] ASI; \
280 add %g1, 0x10, %g1; \
281 stxa %i2, [%g1 + %g0] ASI; \
282 stxa %i3, [%g1 + %g3] ASI; \
283 add %g1, 0x10, %g1; \
284 stxa %i4, [%g1 + %g0] ASI; \
285 stxa %i5, [%g1 + %g3] ASI; \
286 add %g1, 0x10, %g1; \
287 stxa %i6, [%g1 + %g0] ASI; \
288 stxa %i7, [%g1 + %g3] ASI; \
289 saved; \
290 retry; nop; nop; \
291 b,a,pt %xcc, spill_fixup_dax; \
292 b,a,pt %xcc, spill_fixup_mna; \
293 b,a,pt %xcc, spill_fixup;
294
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]295#define SPILL_1_GENERIC_ETRAP \
296etrap_user_spill_64bit: \
297 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
298 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
299 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
300 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
301 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
302 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
303 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
304 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
305 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
306 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
307 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
308 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
309 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
310 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
311 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
312 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
313 saved; \
314 sub %g1, 2, %g1; \
315 ba,pt %xcc, etrap_save; \
316 wrpr %g1, %cwp; \
317 nop; nop; nop; nop; nop; \
318 nop; nop; nop; nop; \
319 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
320 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
321 ba,a,pt %xcc, etrap_spill_fixup_64bit;
322
323#define SPILL_1_GENERIC_ETRAP_FIXUP \
324etrap_spill_fixup_64bit: \
325 ldub [%g6 + TI_WSAVED], %g1; \
326 sll %g1, 3, %g3; \
327 add %g6, %g3, %g3; \
328 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
329 sll %g1, 7, %g3; \
330 add %g6, %g3, %g3; \
331 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
332 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
333 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
334 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
335 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
336 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
337 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
338 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
339 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
340 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
341 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
342 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
343 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
344 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
345 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
346 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
347 add %g1, 1, %g1; \
348 stb %g1, [%g6 + TI_WSAVED]; \
349 saved; \
350 rdpr %cwp, %g1; \
351 sub %g1, 2, %g1; \
352 ba,pt %xcc, etrap_save; \
353 wrpr %g1, %cwp; \
354 nop; nop; nop
355
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]356/* Normal 32bit spill */
357#define SPILL_2_GENERIC(ASI) \
358 srl %sp, 0, %sp; \
359 stwa %l0, [%sp + %g0] ASI; \
360 mov 0x04, %g3; \
361 stwa %l1, [%sp + %g3] ASI; \
362 add %sp, 0x08, %g1; \
363 stwa %l2, [%g1 + %g0] ASI; \
364 stwa %l3, [%g1 + %g3] ASI; \
365 add %g1, 0x08, %g1; \
366 stwa %l4, [%g1 + %g0] ASI; \
367 stwa %l5, [%g1 + %g3] ASI; \
368 add %g1, 0x08, %g1; \
369 stwa %l6, [%g1 + %g0] ASI; \
370 stwa %l7, [%g1 + %g3] ASI; \
371 add %g1, 0x08, %g1; \
372 stwa %i0, [%g1 + %g0] ASI; \
373 stwa %i1, [%g1 + %g3] ASI; \
374 add %g1, 0x08, %g1; \
375 stwa %i2, [%g1 + %g0] ASI; \
376 stwa %i3, [%g1 + %g3] ASI; \
377 add %g1, 0x08, %g1; \
378 stwa %i4, [%g1 + %g0] ASI; \
379 stwa %i5, [%g1 + %g3] ASI; \
380 add %g1, 0x08, %g1; \
381 stwa %i6, [%g1 + %g0] ASI; \
382 stwa %i7, [%g1 + %g3] ASI; \
383 saved; \
384 retry; nop; nop; \
385 b,a,pt %xcc, spill_fixup_dax; \
386 b,a,pt %xcc, spill_fixup_mna; \
387 b,a,pt %xcc, spill_fixup;
388
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]389#define SPILL_2_GENERIC_ETRAP \
390etrap_user_spill_32bit: \
391 srl %sp, 0, %sp; \
392 stwa %l0, [%sp + 0x00] %asi; \
393 stwa %l1, [%sp + 0x04] %asi; \
394 stwa %l2, [%sp + 0x08] %asi; \
395 stwa %l3, [%sp + 0x0c] %asi; \
396 stwa %l4, [%sp + 0x10] %asi; \
397 stwa %l5, [%sp + 0x14] %asi; \
398 stwa %l6, [%sp + 0x18] %asi; \
399 stwa %l7, [%sp + 0x1c] %asi; \
400 stwa %i0, [%sp + 0x20] %asi; \
401 stwa %i1, [%sp + 0x24] %asi; \
402 stwa %i2, [%sp + 0x28] %asi; \
403 stwa %i3, [%sp + 0x2c] %asi; \
404 stwa %i4, [%sp + 0x30] %asi; \
405 stwa %i5, [%sp + 0x34] %asi; \
406 stwa %i6, [%sp + 0x38] %asi; \
407 stwa %i7, [%sp + 0x3c] %asi; \
408 saved; \
409 sub %g1, 2, %g1; \
410 ba,pt %xcc, etrap_save; \
411 wrpr %g1, %cwp; \
412 nop; nop; nop; nop; \
413 nop; nop; nop; nop; \
414 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
415 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
416 ba,a,pt %xcc, etrap_spill_fixup_32bit;
417
418#define SPILL_2_GENERIC_ETRAP_FIXUP \
419etrap_spill_fixup_32bit: \
420 ldub [%g6 + TI_WSAVED], %g1; \
421 sll %g1, 3, %g3; \
422 add %g6, %g3, %g3; \
423 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
424 sll %g1, 7, %g3; \
425 add %g6, %g3, %g3; \
426 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
427 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
428 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
429 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
430 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
431 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
432 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
433 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
434 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
435 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
436 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
437 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
438 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
439 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
440 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
441 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
442 add %g1, 1, %g1; \
443 stb %g1, [%g6 + TI_WSAVED]; \
444 saved; \
445 rdpr %cwp, %g1; \
446 sub %g1, 2, %g1; \
447 ba,pt %xcc, etrap_save; \
448 wrpr %g1, %cwp; \
449 nop; nop; nop
450
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]451#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
452#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
453#define SPILL_3_NORMAL SPILL_0_NORMAL
454#define SPILL_4_NORMAL SPILL_0_NORMAL
455#define SPILL_5_NORMAL SPILL_0_NORMAL
456#define SPILL_6_NORMAL SPILL_0_NORMAL
457#define SPILL_7_NORMAL SPILL_0_NORMAL
458
459#define SPILL_0_OTHER SPILL_0_NORMAL
460#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
461#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
462#define SPILL_3_OTHER SPILL_3_NORMAL
463#define SPILL_4_OTHER SPILL_4_NORMAL
464#define SPILL_5_OTHER SPILL_5_NORMAL
465#define SPILL_6_OTHER SPILL_6_NORMAL
466#define SPILL_7_OTHER SPILL_7_NORMAL
467
468/* Normal kernel fill */
469#define FILL_0_NORMAL \
470 ldx [%sp + STACK_BIAS + 0x00], %l0; \
471 ldx [%sp + STACK_BIAS + 0x08], %l1; \
472 ldx [%sp + STACK_BIAS + 0x10], %l2; \
473 ldx [%sp + STACK_BIAS + 0x18], %l3; \
474 ldx [%sp + STACK_BIAS + 0x20], %l4; \
475 ldx [%sp + STACK_BIAS + 0x28], %l5; \
476 ldx [%sp + STACK_BIAS + 0x30], %l6; \
477 ldx [%sp + STACK_BIAS + 0x38], %l7; \
478 ldx [%sp + STACK_BIAS + 0x40], %i0; \
479 ldx [%sp + STACK_BIAS + 0x48], %i1; \
480 ldx [%sp + STACK_BIAS + 0x50], %i2; \
481 ldx [%sp + STACK_BIAS + 0x58], %i3; \
482 ldx [%sp + STACK_BIAS + 0x60], %i4; \
483 ldx [%sp + STACK_BIAS + 0x68], %i5; \
484 ldx [%sp + STACK_BIAS + 0x70], %i6; \
485 ldx [%sp + STACK_BIAS + 0x78], %i7; \
486 restored; retry; nop; nop; nop; nop; nop; nop; \
487 nop; nop; nop; nop; nop; nop; nop; nop;
488
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]489#define FILL_0_NORMAL_RTRAP \
490kern_rtt_fill: \
491 rdpr %cwp, %g1; \
492 sub %g1, 1, %g1; \
493 wrpr %g1, %cwp; \
494 ldx [%sp + STACK_BIAS + 0x00], %l0; \
495 ldx [%sp + STACK_BIAS + 0x08], %l1; \
496 ldx [%sp + STACK_BIAS + 0x10], %l2; \
497 ldx [%sp + STACK_BIAS + 0x18], %l3; \
498 ldx [%sp + STACK_BIAS + 0x20], %l4; \
499 ldx [%sp + STACK_BIAS + 0x28], %l5; \
500 ldx [%sp + STACK_BIAS + 0x30], %l6; \
501 ldx [%sp + STACK_BIAS + 0x38], %l7; \
502 ldx [%sp + STACK_BIAS + 0x40], %i0; \
503 ldx [%sp + STACK_BIAS + 0x48], %i1; \
504 ldx [%sp + STACK_BIAS + 0x50], %i2; \
505 ldx [%sp + STACK_BIAS + 0x58], %i3; \
506 ldx [%sp + STACK_BIAS + 0x60], %i4; \
507 ldx [%sp + STACK_BIAS + 0x68], %i5; \
508 ldx [%sp + STACK_BIAS + 0x70], %i6; \
509 ldx [%sp + STACK_BIAS + 0x78], %i7; \
510 restored; \
511 add %g1, 1, %g1; \
512 ba,pt %xcc, kern_rtt_restore; \
513 wrpr %g1, %cwp; \
514 nop; nop; nop; nop; nop; \
515 nop; nop; nop; nop;
516
517
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]518/* Normal 64bit fill */
519#define FILL_1_GENERIC(ASI) \
520 add %sp, STACK_BIAS + 0x00, %g1; \
521 ldxa [%g1 + %g0] ASI, %l0; \
522 mov 0x08, %g2; \
523 mov 0x10, %g3; \
524 ldxa [%g1 + %g2] ASI, %l1; \
525 mov 0x18, %g5; \
526 ldxa [%g1 + %g3] ASI, %l2; \
527 ldxa [%g1 + %g5] ASI, %l3; \
528 add %g1, 0x20, %g1; \
529 ldxa [%g1 + %g0] ASI, %l4; \
530 ldxa [%g1 + %g2] ASI, %l5; \
531 ldxa [%g1 + %g3] ASI, %l6; \
532 ldxa [%g1 + %g5] ASI, %l7; \
533 add %g1, 0x20, %g1; \
534 ldxa [%g1 + %g0] ASI, %i0; \
535 ldxa [%g1 + %g2] ASI, %i1; \
536 ldxa [%g1 + %g3] ASI, %i2; \
537 ldxa [%g1 + %g5] ASI, %i3; \
538 add %g1, 0x20, %g1; \
539 ldxa [%g1 + %g0] ASI, %i4; \
540 ldxa [%g1 + %g2] ASI, %i5; \
541 ldxa [%g1 + %g3] ASI, %i6; \
542 ldxa [%g1 + %g5] ASI, %i7; \
543 restored; \
544 retry; nop; nop; nop; nop; \
545 b,a,pt %xcc, fill_fixup_dax; \
546 b,a,pt %xcc, fill_fixup_mna; \
547 b,a,pt %xcc, fill_fixup;
548
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]549#define FILL_1_GENERIC_RTRAP \
550user_rtt_fill_64bit: \
551 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
552 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
553 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
554 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
555 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
556 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
557 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
558 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
559 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
560 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
561 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
562 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
563 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
564 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
565 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
566 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
567 ba,pt %xcc, user_rtt_pre_restore; \
568 restored; \
569 nop; nop; nop; nop; nop; nop; \
570 nop; nop; nop; nop; nop; \
571 ba,a,pt %xcc, user_rtt_fill_fixup; \
572 ba,a,pt %xcc, user_rtt_fill_fixup; \
573 ba,a,pt %xcc, user_rtt_fill_fixup;
574
575
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]576/* Normal 32bit fill */
577#define FILL_2_GENERIC(ASI) \
578 srl %sp, 0, %sp; \
579 lduwa [%sp + %g0] ASI, %l0; \
580 mov 0x04, %g2; \
581 mov 0x08, %g3; \
582 lduwa [%sp + %g2] ASI, %l1; \
583 mov 0x0c, %g5; \
584 lduwa [%sp + %g3] ASI, %l2; \
585 lduwa [%sp + %g5] ASI, %l3; \
586 add %sp, 0x10, %g1; \
587 lduwa [%g1 + %g0] ASI, %l4; \
588 lduwa [%g1 + %g2] ASI, %l5; \
589 lduwa [%g1 + %g3] ASI, %l6; \
590 lduwa [%g1 + %g5] ASI, %l7; \
591 add %g1, 0x10, %g1; \
592 lduwa [%g1 + %g0] ASI, %i0; \
593 lduwa [%g1 + %g2] ASI, %i1; \
594 lduwa [%g1 + %g3] ASI, %i2; \
595 lduwa [%g1 + %g5] ASI, %i3; \
596 add %g1, 0x10, %g1; \
597 lduwa [%g1 + %g0] ASI, %i4; \
598 lduwa [%g1 + %g2] ASI, %i5; \
599 lduwa [%g1 + %g3] ASI, %i6; \
600 lduwa [%g1 + %g5] ASI, %i7; \
601 restored; \
602 retry; nop; nop; nop; nop; \
603 b,a,pt %xcc, fill_fixup_dax; \
604 b,a,pt %xcc, fill_fixup_mna; \
605 b,a,pt %xcc, fill_fixup;
606
David S. Miller314ef682006-02-04 00:10:01 -0800[diff] [blame]607#define FILL_2_GENERIC_RTRAP \
608user_rtt_fill_32bit: \
609 srl %sp, 0, %sp; \
610 lduwa [%sp + 0x00] %asi, %l0; \
611 lduwa [%sp + 0x04] %asi, %l1; \
612 lduwa [%sp + 0x08] %asi, %l2; \
613 lduwa [%sp + 0x0c] %asi, %l3; \
614 lduwa [%sp + 0x10] %asi, %l4; \
615 lduwa [%sp + 0x14] %asi, %l5; \
616 lduwa [%sp + 0x18] %asi, %l6; \
617 lduwa [%sp + 0x1c] %asi, %l7; \
618 lduwa [%sp + 0x20] %asi, %i0; \
619 lduwa [%sp + 0x24] %asi, %i1; \
620 lduwa [%sp + 0x28] %asi, %i2; \
621 lduwa [%sp + 0x2c] %asi, %i3; \
622 lduwa [%sp + 0x30] %asi, %i4; \
623 lduwa [%sp + 0x34] %asi, %i5; \
624 lduwa [%sp + 0x38] %asi, %i6; \
625 lduwa [%sp + 0x3c] %asi, %i7; \
626 ba,pt %xcc, user_rtt_pre_restore; \
627 restored; \
628 nop; nop; nop; nop; nop; \
629 nop; nop; nop; nop; nop; \
630 ba,a,pt %xcc, user_rtt_fill_fixup; \
631 ba,a,pt %xcc, user_rtt_fill_fixup; \
632 ba,a,pt %xcc, user_rtt_fill_fixup;
633
634
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]635#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
636#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
637#define FILL_3_NORMAL FILL_0_NORMAL
638#define FILL_4_NORMAL FILL_0_NORMAL
639#define FILL_5_NORMAL FILL_0_NORMAL
640#define FILL_6_NORMAL FILL_0_NORMAL
641#define FILL_7_NORMAL FILL_0_NORMAL
642
643#define FILL_0_OTHER FILL_0_NORMAL
644#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
645#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
646#define FILL_3_OTHER FILL_3_NORMAL
647#define FILL_4_OTHER FILL_4_NORMAL
648#define FILL_5_OTHER FILL_5_NORMAL
649#define FILL_6_OTHER FILL_6_NORMAL
650#define FILL_7_OTHER FILL_7_NORMAL
651
652#endif /* !(_SPARC64_TTABLE_H) */