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Graf Yangffd7a622010-10-27 21:44:20 -04001/*
Jonathan Cameron10e4a522011-10-05 15:28:02 +01002 * ad2s1200.c simple support for the ADI Resolver to Digital Converters:
3 * AD2S1200/1205
Graf Yangffd7a622010-10-27 21:44:20 -04004 *
5 * Copyright (c) 2010-2010 Analog Devices Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12#include <linux/types.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/delay.h>
19#include <linux/gpio.h>
Paul Gortmaker99c97852011-07-03 15:49:50 -040020#include <linux/module.h>
Graf Yangffd7a622010-10-27 21:44:20 -040021
Jonathan Cameron06458e22012-04-25 15:54:58 +010022#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
Graf Yangffd7a622010-10-27 21:44:20 -040024
Jonathan Cameron10e4a522011-10-05 15:28:02 +010025#define DRV_NAME "ad2s1200"
Graf Yangffd7a622010-10-27 21:44:20 -040026
27/* input pin sample and rdvel is controlled by driver */
Jonathan Cameron10e4a522011-10-05 15:28:02 +010028#define AD2S1200_PN 2
Graf Yangffd7a622010-10-27 21:44:20 -040029
30/* input clock on serial interface */
Jonathan Cameron10e4a522011-10-05 15:28:02 +010031#define AD2S1200_HZ 8192000
Graf Yangffd7a622010-10-27 21:44:20 -040032/* clock period in nano second */
Jonathan Cameron10e4a522011-10-05 15:28:02 +010033#define AD2S1200_TSCLK (1000000000/AD2S1200_HZ)
Graf Yangffd7a622010-10-27 21:44:20 -040034
Jonathan Cameron10e4a522011-10-05 15:28:02 +010035struct ad2s1200_state {
Graf Yangffd7a622010-10-27 21:44:20 -040036 struct mutex lock;
Graf Yangffd7a622010-10-27 21:44:20 -040037 struct spi_device *sdev;
Jonathan Cameron8f2bd832011-06-27 13:07:52 +010038 int sample;
39 int rdvel;
40 u8 rx[2] ____cacheline_aligned;
Graf Yangffd7a622010-10-27 21:44:20 -040041};
42
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010043static int ad2s1200_read_raw(struct iio_dev *indio_dev,
44 struct iio_chan_spec const *chan,
45 int *val,
46 int *val2,
47 long m)
Graf Yangffd7a622010-10-27 21:44:20 -040048{
Graf Yangffd7a622010-10-27 21:44:20 -040049 int ret = 0;
Graf Yangffd7a622010-10-27 21:44:20 -040050 s16 vel;
Jonathan Cameron10e4a522011-10-05 15:28:02 +010051 struct ad2s1200_state *st = iio_priv(indio_dev);
Graf Yangffd7a622010-10-27 21:44:20 -040052
Graf Yangffd7a622010-10-27 21:44:20 -040053 mutex_lock(&st->lock);
Graf Yangffd7a622010-10-27 21:44:20 -040054 gpio_set_value(st->sample, 0);
Jonathan Cameron10e4a522011-10-05 15:28:02 +010055 /* delay (6 * AD2S1200_TSCLK + 20) nano seconds */
Graf Yangffd7a622010-10-27 21:44:20 -040056 udelay(1);
57 gpio_set_value(st->sample, 1);
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010058 gpio_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
Jonathan Cameron8f2bd832011-06-27 13:07:52 +010059 ret = spi_read(st->sdev, st->rx, 2);
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010060 if (ret < 0) {
61 mutex_unlock(&st->lock);
62 return ret;
Jonathan Cameron8f2bd832011-06-27 13:07:52 +010063 }
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010064
65 switch (chan->type) {
66 case IIO_ANGL:
67 *val = (((u16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
68 break;
69 case IIO_ANGL_VEL:
70 vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
71 vel = (vel << 4) >> 4;
72 *val = vel;
73 default:
74 mutex_unlock(&st->lock);
75 return -EINVAL;
76 }
Jonathan Cameron10e4a522011-10-05 15:28:02 +010077 /* delay (2 * AD2S1200_TSCLK + 20) ns for sample pulse */
Graf Yangffd7a622010-10-27 21:44:20 -040078 udelay(1);
79 mutex_unlock(&st->lock);
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010080 return IIO_VAL_INT;
Graf Yangffd7a622010-10-27 21:44:20 -040081}
82
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010083static const struct iio_chan_spec ad2s1200_channels[] = {
84 {
85 .type = IIO_ANGL,
86 .indexed = 1,
87 .channel = 0,
Jonathan Cameron910b51f2013-02-27 19:41:20 +000088 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010089 }, {
90 .type = IIO_ANGL_VEL,
91 .indexed = 1,
92 .channel = 0,
Jonathan Cameron910b51f2013-02-27 19:41:20 +000093 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010094 }
Graf Yangffd7a622010-10-27 21:44:20 -040095};
96
Jonathan Cameron10e4a522011-10-05 15:28:02 +010097static const struct iio_info ad2s1200_info = {
Jonathan Cameron9c5ed822011-10-05 15:28:01 +010098 .read_raw = &ad2s1200_read_raw,
Jonathan Cameron6fe81352011-05-18 14:42:37 +010099 .driver_module = THIS_MODULE,
100};
101
Bill Pemberton4ae1c612012-11-19 13:21:57 -0500102static int ad2s1200_probe(struct spi_device *spi)
Graf Yangffd7a622010-10-27 21:44:20 -0400103{
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100104 struct ad2s1200_state *st;
Jonathan Cameron8f2bd832011-06-27 13:07:52 +0100105 struct iio_dev *indio_dev;
Graf Yangffd7a622010-10-27 21:44:20 -0400106 int pn, ret = 0;
107 unsigned short *pins = spi->dev.platform_data;
108
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100109 for (pn = 0; pn < AD2S1200_PN; pn++)
Sachin Kamat8d1b0b42013-09-11 10:55:00 +0100110 ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT,
111 DRV_NAME);
112 if (ret) {
Sachin Kamata20df3f2013-09-11 10:55:00 +0100113 dev_err(&spi->dev, "request gpio pin %d failed\n",
114 pins[pn]);
Sachin Kamat8d1b0b42013-09-11 10:55:00 +0100115 return ret;
Graf Yangffd7a622010-10-27 21:44:20 -0400116 }
Sachin Kamat8d1b0b42013-09-11 10:55:00 +0100117 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
118 if (!indio_dev)
119 return -ENOMEM;
Jonathan Cameron8f2bd832011-06-27 13:07:52 +0100120 spi_set_drvdata(spi, indio_dev);
121 st = iio_priv(indio_dev);
Graf Yangffd7a622010-10-27 21:44:20 -0400122 mutex_init(&st->lock);
123 st->sdev = spi;
124 st->sample = pins[0];
125 st->rdvel = pins[1];
126
Jonathan Cameron8f2bd832011-06-27 13:07:52 +0100127 indio_dev->dev.parent = &spi->dev;
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100128 indio_dev->info = &ad2s1200_info;
Jonathan Cameron8f2bd832011-06-27 13:07:52 +0100129 indio_dev->modes = INDIO_DIRECT_MODE;
Jonathan Cameron9c5ed822011-10-05 15:28:01 +0100130 indio_dev->channels = ad2s1200_channels;
131 indio_dev->num_channels = ARRAY_SIZE(ad2s1200_channels);
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100132 indio_dev->name = spi_get_device_id(spi)->name;
Graf Yangffd7a622010-10-27 21:44:20 -0400133
Jonathan Cameron8f2bd832011-06-27 13:07:52 +0100134 ret = iio_device_register(indio_dev);
Graf Yangffd7a622010-10-27 21:44:20 -0400135 if (ret)
Sachin Kamat8d1b0b42013-09-11 10:55:00 +0100136 return ret;
Graf Yangffd7a622010-10-27 21:44:20 -0400137
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100138 spi->max_speed_hz = AD2S1200_HZ;
Graf Yangffd7a622010-10-27 21:44:20 -0400139 spi->mode = SPI_MODE_3;
140 spi_setup(spi);
141
142 return 0;
Graf Yangffd7a622010-10-27 21:44:20 -0400143}
144
Bill Pemberton447d4f22012-11-19 13:26:37 -0500145static int ad2s1200_remove(struct spi_device *spi)
Graf Yangffd7a622010-10-27 21:44:20 -0400146{
Jonathan Cameron8f2bd832011-06-27 13:07:52 +0100147 iio_device_unregister(spi_get_drvdata(spi));
Graf Yangffd7a622010-10-27 21:44:20 -0400148
149 return 0;
150}
151
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100152static const struct spi_device_id ad2s1200_id[] = {
153 { "ad2s1200" },
154 { "ad2s1205" },
155 {}
156};
Lars-Peter Clausen55e43902011-11-16 08:53:31 +0100157MODULE_DEVICE_TABLE(spi, ad2s1200_id);
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100158
159static struct spi_driver ad2s1200_driver = {
Graf Yangffd7a622010-10-27 21:44:20 -0400160 .driver = {
161 .name = DRV_NAME,
162 .owner = THIS_MODULE,
163 },
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100164 .probe = ad2s1200_probe,
Bill Pembertone543acf2012-11-19 13:21:38 -0500165 .remove = ad2s1200_remove,
Jonathan Cameron10e4a522011-10-05 15:28:02 +0100166 .id_table = ad2s1200_id,
Graf Yangffd7a622010-10-27 21:44:20 -0400167};
Lars-Peter Clausenae6ae6f2011-11-16 10:13:39 +0100168module_spi_driver(ad2s1200_driver);
Graf Yangffd7a622010-10-27 21:44:20 -0400169
170MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
171MODULE_DESCRIPTION("Analog Devices AD2S1200/1205 Resolver to Digital SPI driver");
172MODULE_LICENSE("GPL v2");