blob: ca466cedfb3e1fc26ddeeb3b863590c4b75ce039 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020046static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030047
Kalle Valo5e3dd152013-06-12 20:52:10 +030048static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
Kalle Valo8cc7f262014-09-14 12:50:39 +0300135 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
Kalle Valo8cc7f262014-09-14 12:50:39 +0300173 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
Michal Kazior6e712d42013-09-24 10:18:36 +0200185 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior6e712d42013-09-24 10:18:36 +0200187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300225
Kalle Valo5e3dd152013-06-12 20:52:10 +0300226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200274 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300275 int idx;
276 struct sk_buff *msdu;
277
Michal Kazior45967082014-02-27 18:50:05 +0200278 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279
Michal Kazior8d60ee82014-02-27 18:50:05 +0200280 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200281 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200282 return NULL;
283 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284
285 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
286 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300287 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288
289 idx++;
290 idx &= htt->rx_ring.size_mask;
291 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
292 htt->rx_ring.fill_cnt--;
293
Rajkumar Manoharan9b57f882014-10-06 22:39:06 +0530294 trace_ath10k_htt_rx_pop_msdu(ar, msdu->data, msdu->len +
295 skb_tailroom(msdu));
296
Kalle Valo5e3dd152013-06-12 20:52:10 +0300297 return msdu;
298}
299
300static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
301{
302 struct sk_buff *next;
303
304 while (skb) {
305 next = skb->next;
306 dev_kfree_skb_any(skb);
307 skb = next;
308 }
309}
310
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100311/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300312static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
313 u8 **fw_desc, int *fw_desc_len,
314 struct sk_buff **head_msdu,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300315 struct sk_buff **tail_msdu,
316 u32 *attention)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300317{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200318 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300319 int msdu_len, msdu_chaining = 0;
Kalle Valoaf762c02014-09-14 12:50:17 +0300320 struct sk_buff *msdu, *next;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300321 struct htt_rx_desc *rx_desc;
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300322 u32 tsf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300323
Michal Kazior45967082014-02-27 18:50:05 +0200324 lockdep_assert_held(&htt->rx_ring.lock);
325
Kalle Valo5e3dd152013-06-12 20:52:10 +0300326 if (htt->rx_confused) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200327 ath10k_warn(ar, "htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100328 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300329 }
330
331 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
332 while (msdu) {
333 int last_msdu, msdu_len_invalid, msdu_chained;
334
335 dma_unmap_single(htt->ar->dev,
336 ATH10K_SKB_CB(msdu)->paddr,
337 msdu->len + skb_tailroom(msdu),
338 DMA_FROM_DEVICE);
339
Michal Kazior7aa7a722014-08-25 12:09:38 +0200340 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300341 msdu->data, msdu->len + skb_tailroom(msdu));
342
343 rx_desc = (struct htt_rx_desc *)msdu->data;
344
345 /* FIXME: we must report msdu payload since this is what caller
346 * expects now */
347 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
348 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
349
350 /*
351 * Sanity check - confirm the HW is finished filling in the
352 * rx data.
353 * If the HW and SW are working correctly, then it's guaranteed
354 * that the HW's MAC DMA is done before this point in the SW.
355 * To prevent the case that we handle a stale Rx descriptor,
356 * just assert for now until we have a way to recover.
357 */
358 if (!(__le32_to_cpu(rx_desc->attention.flags)
359 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
360 ath10k_htt_rx_free_msdu_chain(*head_msdu);
361 *head_msdu = NULL;
362 msdu = NULL;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200363 ath10k_err(ar, "htt rx stopped. cannot recover\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300364 htt->rx_confused = true;
365 break;
366 }
367
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300368 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
369 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
370 RX_ATTENTION_FLAGS_DECRYPT_ERR |
371 RX_ATTENTION_FLAGS_FCS_ERR |
372 RX_ATTENTION_FLAGS_MGMT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300373 /*
374 * Copy the FW rx descriptor for this MSDU from the rx
375 * indication message into the MSDU's netbuf. HL uses the
376 * same rx indication message definition as LL, and simply
377 * appends new info (fields from the HW rx desc, and the
378 * MSDU payload itself). So, the offset into the rx
379 * indication message only has to account for the standard
380 * offset of the per-MSDU FW rx desc info within the
381 * message, and how many bytes of the per-MSDU FW rx desc
382 * info have already been consumed. (And the endianness of
383 * the host, since for a big-endian host, the rx ind
384 * message contents, including the per-MSDU rx desc bytes,
385 * were byteswapped during upload.)
386 */
387 if (*fw_desc_len > 0) {
388 rx_desc->fw_desc.info0 = **fw_desc;
389 /*
390 * The target is expected to only provide the basic
391 * per-MSDU rx descriptors. Just to be sure, verify
392 * that the target has not attached extension data
393 * (e.g. LRO flow ID).
394 */
395
396 /* or more, if there's extension data */
397 (*fw_desc)++;
398 (*fw_desc_len)--;
399 } else {
400 /*
401 * When an oversized AMSDU happened, FW will lost
402 * some of MSDU status - in this case, the FW
403 * descriptors provided will be less than the
404 * actual MSDUs inside this MPDU. Mark the FW
405 * descriptors so that it will still deliver to
406 * upper stack, if no CRC error for this MPDU.
407 *
408 * FIX THIS - the FW descriptors are actually for
409 * MSDUs in the end of this A-MSDU instead of the
410 * beginning.
411 */
412 rx_desc->fw_desc.info0 = 0;
413 }
414
415 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
416 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
417 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
418 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
419 RX_MSDU_START_INFO0_MSDU_LENGTH);
420 msdu_chained = rx_desc->frag_info.ring2_more_count;
421
422 if (msdu_len_invalid)
423 msdu_len = 0;
424
425 skb_trim(msdu, 0);
426 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
427 msdu_len -= msdu->len;
428
429 /* FIXME: Do chained buffers include htt_rx_desc or not? */
430 while (msdu_chained--) {
431 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
432
433 dma_unmap_single(htt->ar->dev,
434 ATH10K_SKB_CB(next)->paddr,
435 next->len + skb_tailroom(next),
436 DMA_FROM_DEVICE);
437
Michal Kazior7aa7a722014-08-25 12:09:38 +0200438 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
Ben Greear75fb2f92014-02-05 13:58:34 -0800439 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300440 next->len + skb_tailroom(next));
441
442 skb_trim(next, 0);
443 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
444 msdu_len -= next->len;
445
446 msdu->next = next;
447 msdu = next;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300448 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300449 }
450
Kalle Valo5e3dd152013-06-12 20:52:10 +0300451 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
452 RX_MSDU_END_INFO0_LAST_MSDU;
453
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300454 tsf = __le32_to_cpu(rx_desc->ppdu_end.tsf_timestamp);
455 trace_ath10k_htt_rx_desc(ar, tsf, &rx_desc->attention,
456 sizeof(*rx_desc) - sizeof(u32));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300457 if (last_msdu) {
458 msdu->next = NULL;
459 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300460 }
Kalle Valod8bb26b2014-09-14 12:50:33 +0300461
462 next = ath10k_htt_rx_netbuf_pop(htt);
463 msdu->next = next;
464 msdu = next;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300465 }
466 *tail_msdu = msdu;
467
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100468 if (*head_msdu == NULL)
469 msdu_chaining = -1;
470
Kalle Valo5e3dd152013-06-12 20:52:10 +0300471 /*
472 * Don't refill the ring yet.
473 *
474 * First, the elements popped here are still in use - it is not
475 * safe to overwrite them until the matching call to
476 * mpdu_desc_list_next. Second, for efficiency it is preferable to
477 * refill the rx ring with 1 PPDU's worth of rx buffers (something
478 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
479 * (something like 3 buffers). Consequently, we'll rely on the txrx
480 * SW to tell us when it is done pulling all the PPDU's rx buffers
481 * out of the rx ring, and then refill it just once.
482 */
483
484 return msdu_chaining;
485}
486
Michal Kazior6e712d42013-09-24 10:18:36 +0200487static void ath10k_htt_rx_replenish_task(unsigned long ptr)
488{
489 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300490
Michal Kazior6e712d42013-09-24 10:18:36 +0200491 ath10k_htt_rx_msdu_buff_replenish(htt);
492}
493
Michal Kazior95bf21f2014-05-16 17:15:39 +0300494int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300495{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200496 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300497 dma_addr_t paddr;
498 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300499 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300500 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
501
502 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
503 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200504 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300505 return -EINVAL;
506 }
507
508 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
509
510 /*
511 * Set the initial value for the level to which the rx ring
512 * should be filled, based on the max throughput and the
513 * worst likely latency for the host to fill the rx ring
514 * with new buffers. In theory, this fill level can be
515 * dynamically adjusted from the initial value set here, to
516 * reflect the actual host latency rather than a
517 * conservative assumption about the host latency.
518 */
519 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
520
521 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300522 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300523 GFP_KERNEL);
524 if (!htt->rx_ring.netbufs_ring)
525 goto err_netbuf;
526
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300527 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
528
529 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300530 if (!vaddr)
531 goto err_dma_ring;
532
533 htt->rx_ring.paddrs_ring = vaddr;
534 htt->rx_ring.base_paddr = paddr;
535
536 vaddr = dma_alloc_coherent(htt->ar->dev,
537 sizeof(*htt->rx_ring.alloc_idx.vaddr),
538 &paddr, GFP_DMA);
539 if (!vaddr)
540 goto err_dma_idx;
541
542 htt->rx_ring.alloc_idx.vaddr = vaddr;
543 htt->rx_ring.alloc_idx.paddr = paddr;
544 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
545 *htt->rx_ring.alloc_idx.vaddr = 0;
546
547 /* Initialize the Rx refill retry timer */
548 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
549
550 spin_lock_init(&htt->rx_ring.lock);
551
552 htt->rx_ring.fill_cnt = 0;
553 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
554 goto err_fill_ring;
555
Michal Kazior6e712d42013-09-24 10:18:36 +0200556 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
557 (unsigned long)htt);
558
Michal Kazior6c5151a2014-02-27 18:50:04 +0200559 skb_queue_head_init(&htt->tx_compl_q);
560 skb_queue_head_init(&htt->rx_compl_q);
561
562 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
563 (unsigned long)htt);
564
Michal Kazior7aa7a722014-08-25 12:09:38 +0200565 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300566 htt->rx_ring.size, htt->rx_ring.fill_level);
567 return 0;
568
569err_fill_ring:
570 ath10k_htt_rx_ring_free(htt);
571 dma_free_coherent(htt->ar->dev,
572 sizeof(*htt->rx_ring.alloc_idx.vaddr),
573 htt->rx_ring.alloc_idx.vaddr,
574 htt->rx_ring.alloc_idx.paddr);
575err_dma_idx:
576 dma_free_coherent(htt->ar->dev,
577 (htt->rx_ring.size *
578 sizeof(htt->rx_ring.paddrs_ring)),
579 htt->rx_ring.paddrs_ring,
580 htt->rx_ring.base_paddr);
581err_dma_ring:
582 kfree(htt->rx_ring.netbufs_ring);
583err_netbuf:
584 return -ENOMEM;
585}
586
Michal Kazior7aa7a722014-08-25 12:09:38 +0200587static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
588 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300589{
590 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300591 case HTT_RX_MPDU_ENCRYPT_NONE:
592 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300593 case HTT_RX_MPDU_ENCRYPT_WEP40:
594 case HTT_RX_MPDU_ENCRYPT_WEP104:
595 return IEEE80211_WEP_IV_LEN;
596 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
597 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
598 return IEEE80211_TKIP_IV_LEN;
599 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
600 return IEEE80211_CCMP_HDR_LEN;
601 case HTT_RX_MPDU_ENCRYPT_WEP128:
602 case HTT_RX_MPDU_ENCRYPT_WAPI:
603 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300604 }
605
Michal Kazior890d3b22014-10-23 17:04:22 +0300606 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300607 return 0;
608}
609
Michal Kazior890d3b22014-10-23 17:04:22 +0300610#define MICHAEL_MIC_LEN 8
611
Michal Kazior7aa7a722014-08-25 12:09:38 +0200612static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
613 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300614{
615 switch (type) {
616 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300617 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300618 case HTT_RX_MPDU_ENCRYPT_WEP40:
619 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300620 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300621 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
622 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300623 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300624 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300625 return IEEE80211_CCMP_MIC_LEN;
626 case HTT_RX_MPDU_ENCRYPT_WEP128:
627 case HTT_RX_MPDU_ENCRYPT_WAPI:
628 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 }
630
Michal Kazior890d3b22014-10-23 17:04:22 +0300631 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300632 return 0;
633}
634
635/* Applies for first msdu in chain, before altering it. */
636static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
637{
638 struct htt_rx_desc *rxd;
639 enum rx_msdu_decap_format fmt;
640
641 rxd = (void *)skb->data - sizeof(*rxd);
642 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +0300643 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300644
645 if (fmt == RX_MSDU_DECAP_RAW)
646 return (void *)skb->data;
Kalle Valod8bb26b2014-09-14 12:50:33 +0300647
648 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300649}
650
651/* This function only applies for first msdu in an msdu chain */
652static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
653{
Kalle Valoaf762c02014-09-14 12:50:17 +0300654 u8 *qc;
655
Kalle Valo5e3dd152013-06-12 20:52:10 +0300656 if (ieee80211_is_data_qos(hdr->frame_control)) {
Kalle Valoaf762c02014-09-14 12:50:17 +0300657 qc = ieee80211_get_qos_ctl(hdr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300658 if (qc[0] & 0x80)
659 return true;
660 }
661 return false;
662}
663
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300664struct rfc1042_hdr {
665 u8 llc_dsap;
666 u8 llc_ssap;
667 u8 llc_ctrl;
668 u8 snap_oui[3];
669 __be16 snap_type;
670} __packed;
671
672struct amsdu_subframe_hdr {
673 u8 dst[ETH_ALEN];
674 u8 src[ETH_ALEN];
675 __be16 len;
676} __packed;
677
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100678static const u8 rx_legacy_rate_idx[] = {
679 3, /* 0x00 - 11Mbps */
680 2, /* 0x01 - 5.5Mbps */
681 1, /* 0x02 - 2Mbps */
682 0, /* 0x03 - 1Mbps */
683 3, /* 0x04 - 11Mbps */
684 2, /* 0x05 - 5.5Mbps */
685 1, /* 0x06 - 2Mbps */
686 0, /* 0x07 - 1Mbps */
687 10, /* 0x08 - 48Mbps */
688 8, /* 0x09 - 24Mbps */
689 6, /* 0x0A - 12Mbps */
690 4, /* 0x0B - 6Mbps */
691 11, /* 0x0C - 54Mbps */
692 9, /* 0x0D - 36Mbps */
693 7, /* 0x0E - 18Mbps */
694 5, /* 0x0F - 9Mbps */
695};
696
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100697static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100698 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100699 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100700 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100701{
702 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100703 u8 preamble = 0;
704
705 /* Check if valid fields */
706 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
707 return;
708
709 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
710
711 switch (preamble) {
712 case HTT_RX_LEGACY:
713 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
714 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
715 rate_idx = 0;
716
717 if (rate < 0x08 || rate > 0x0F)
718 break;
719
720 switch (band) {
721 case IEEE80211_BAND_2GHZ:
722 if (cck)
723 rate &= ~BIT(3);
724 rate_idx = rx_legacy_rate_idx[rate];
725 break;
726 case IEEE80211_BAND_5GHZ:
727 rate_idx = rx_legacy_rate_idx[rate];
728 /* We are using same rate table registering
729 HW - ath10k_rates[]. In case of 5GHz skip
730 CCK rates, so -4 here */
731 rate_idx -= 4;
732 break;
733 default:
734 break;
735 }
736
737 status->rate_idx = rate_idx;
738 break;
739 case HTT_RX_HT:
740 case HTT_RX_HT_WITH_TXBF:
741 /* HT-SIG - Table 20-11 in info1 and info2 */
742 mcs = info1 & 0x1F;
743 nss = mcs >> 3;
744 bw = (info1 >> 7) & 1;
745 sgi = (info2 >> 7) & 1;
746
747 status->rate_idx = mcs;
748 status->flag |= RX_FLAG_HT;
749 if (sgi)
750 status->flag |= RX_FLAG_SHORT_GI;
751 if (bw)
752 status->flag |= RX_FLAG_40MHZ;
753 break;
754 case HTT_RX_VHT:
755 case HTT_RX_VHT_WITH_TXBF:
756 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
757 TODO check this */
758 mcs = (info2 >> 4) & 0x0F;
759 nss = ((info1 >> 10) & 0x07) + 1;
760 bw = info1 & 3;
761 sgi = info2 & 1;
762
763 status->rate_idx = mcs;
764 status->vht_nss = nss;
765
766 if (sgi)
767 status->flag |= RX_FLAG_SHORT_GI;
768
769 switch (bw) {
770 /* 20MHZ */
771 case 0:
772 break;
773 /* 40MHZ */
774 case 1:
775 status->flag |= RX_FLAG_40MHZ;
776 break;
777 /* 80MHZ */
778 case 2:
779 status->vht_flag |= RX_VHT_FLAG_80MHZ;
780 }
781
782 status->flag |= RX_FLAG_VHT;
783 break;
784 default:
785 break;
786 }
787}
788
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100789static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100790 struct ieee80211_rx_status *rx_status,
791 struct sk_buff *skb,
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300792 enum htt_rx_mpdu_encrypt_type enctype,
793 enum rx_msdu_decap_format fmt,
794 bool dot11frag)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100795{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100796 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100797
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300798 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
799 RX_FLAG_IV_STRIPPED |
800 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100801
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300802 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100803 return;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300804
805 /*
806 * There's no explicit rx descriptor flag to indicate whether a given
807 * frame has been decrypted or not. We're forced to use the decap
808 * format as an implicit indication. However fragmentation rx is always
809 * raw and it probably never reports undecrypted raws.
810 *
811 * This makes sure sniffed frames are reported as-is without stripping
812 * the protected flag.
813 */
814 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
815 return;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100816
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100817 rx_status->flag |= RX_FLAG_DECRYPTED |
818 RX_FLAG_IV_STRIPPED |
819 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100820 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
821 ~IEEE80211_FCTL_PROTECTED);
822}
823
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100824static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
825 struct ieee80211_rx_status *status)
826{
827 struct ieee80211_channel *ch;
828
829 spin_lock_bh(&ar->data_lock);
830 ch = ar->scan_channel;
831 if (!ch)
832 ch = ar->rx_channel;
833 spin_unlock_bh(&ar->data_lock);
834
835 if (!ch)
836 return false;
837
838 status->band = ch->band;
839 status->freq = ch->center_freq;
840
841 return true;
842}
843
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300844static const char * const tid_to_ac[] = {
845 "BE",
846 "BK",
847 "BK",
848 "BE",
849 "VI",
850 "VI",
851 "VO",
852 "VO",
853};
854
855static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
856{
857 u8 *qc;
858 int tid;
859
860 if (!ieee80211_is_data_qos(hdr->frame_control))
861 return "";
862
863 qc = ieee80211_get_qos_ctl(hdr);
864 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
865 if (tid < 8)
866 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
867 else
868 snprintf(out, size, "tid %d", tid);
869
870 return out;
871}
872
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100873static void ath10k_process_rx(struct ath10k *ar,
874 struct ieee80211_rx_status *rx_status,
875 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100876{
877 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300878 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
879 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100880
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100881 status = IEEE80211_SKB_RXCB(skb);
882 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100883
Michal Kazior7aa7a722014-08-25 12:09:38 +0200884 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300885 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100886 skb,
887 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300888 ieee80211_get_SA(hdr),
889 ath10k_get_tid(hdr, tid, sizeof(tid)),
890 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
891 "mcast" : "ucast",
892 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100893 status->flag == 0 ? "legacy" : "",
894 status->flag & RX_FLAG_HT ? "ht" : "",
895 status->flag & RX_FLAG_VHT ? "vht" : "",
896 status->flag & RX_FLAG_40MHZ ? "40" : "",
897 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
898 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
899 status->rate_idx,
900 status->vht_nss,
901 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100902 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100903 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300904 !!(status->flag & RX_FLAG_MMIC_ERROR),
905 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200906 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100907 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100908
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100909 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100910}
911
Michal Kaziord960c362014-02-25 09:29:57 +0200912static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
913{
914 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
915 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
916}
917
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300918static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100919 struct ieee80211_rx_status *rx_status,
920 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300921{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200922 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300923 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100924 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300925 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300926 enum rx_msdu_decap_format fmt;
927 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300928 struct ieee80211_hdr *hdr;
Michal Kazior72bdeb82014-07-28 23:59:42 +0300929 u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300930 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300931
932 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300933 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
Kalle Valo5b07e072014-09-14 12:50:06 +0300934 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300935
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300936 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
937 hdr_len = ieee80211_hdrlen(hdr->frame_control);
938 memcpy(hdr_buf, hdr, hdr_len);
939 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300940
Kalle Valo5e3dd152013-06-12 20:52:10 +0300941 first = skb;
942 while (skb) {
943 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300944 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300945
946 rxd = (void *)skb->data - sizeof(*rxd);
947 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300948 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300949 decap_hdr = (void *)rxd->rx_hdr_status;
950
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300951 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
952
953 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300954 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300955 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200956 len += round_up(ath10k_htt_rx_crypto_param_len(ar,
957 enctype), 4);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300958 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300959 }
960
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300961 switch (fmt) {
962 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300963 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300964 skb_trim(skb, skb->len - FCS_LEN);
965 break;
966 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior72bdeb82014-07-28 23:59:42 +0300967 /* pull decapped header and copy SA & DA */
Michal Kazior784f69d2013-09-26 10:12:23 +0300968 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200969 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Kalle Valob25f32c2014-09-14 12:50:49 +0300970 ether_addr_copy(da, ieee80211_get_DA(hdr));
971 ether_addr_copy(sa, ieee80211_get_SA(hdr));
Michal Kazior784f69d2013-09-26 10:12:23 +0300972 skb_pull(skb, hdr_len);
973
974 /* push original 802.11 header */
975 hdr = (struct ieee80211_hdr *)hdr_buf;
976 hdr_len = ieee80211_hdrlen(hdr->frame_control);
977 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
978
979 /* original A-MSDU header has the bit set but we're
980 * not including A-MSDU subframe header */
981 hdr = (struct ieee80211_hdr *)skb->data;
982 qos = ieee80211_get_qos_ctl(hdr);
983 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
984
Michal Kazior72bdeb82014-07-28 23:59:42 +0300985 /* original 802.11 header has a different DA and in
986 * case of 4addr it may also have different SA
987 */
Kalle Valob25f32c2014-09-14 12:50:49 +0300988 ether_addr_copy(ieee80211_get_DA(hdr), da);
989 ether_addr_copy(ieee80211_get_SA(hdr), sa);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300990 break;
991 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300992 /* strip ethernet header and insert decapped 802.11
993 * header, amsdu subframe header and rfc1042 header */
994
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300995 len = 0;
996 len += sizeof(struct rfc1042_hdr);
997 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200998
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300999 skb_pull(skb, sizeof(struct ethhdr));
1000 memcpy(skb_push(skb, len), decap_hdr, len);
1001 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1002 break;
1003 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001004 /* insert decapped 802.11 header making a singly
1005 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001006 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1007 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001008 }
1009
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001010 skb_in = skb;
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001011 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
1012 false);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001013 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001014 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001015
Kalle Valo652de352013-11-13 15:23:30 +02001016 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001017 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001018 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001019 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +02001020
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001021 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001022 }
1023
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001024 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
1025 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001026}
1027
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001028static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
1029 struct ieee80211_rx_status *rx_status,
1030 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001031{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001032 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001033 struct htt_rx_desc *rxd;
1034 struct ieee80211_hdr *hdr;
1035 enum rx_msdu_decap_format fmt;
1036 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001037 int hdr_len;
1038 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001039
1040 /* This shouldn't happen. If it does than it may be a FW bug. */
1041 if (skb->next) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001042 ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001043 ath10k_htt_rx_free_msdu_chain(skb->next);
1044 skb->next = NULL;
1045 }
1046
1047 rxd = (void *)skb->data - sizeof(*rxd);
1048 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +03001049 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001050 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
Kalle Valo5b07e072014-09-14 12:50:06 +03001051 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001052 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1053 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001054
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001055 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
1056
Kalle Valo5e3dd152013-06-12 20:52:10 +03001057 switch (fmt) {
1058 case RX_MSDU_DECAP_RAW:
1059 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001060 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001061 break;
1062 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +03001063 /* Pull decapped header */
1064 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +02001065 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +03001066 skb_pull(skb, hdr_len);
1067
1068 /* Push original header */
1069 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1070 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1071 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001072 break;
1073 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001074 /* strip ethernet header and insert decapped 802.11 header and
1075 * rfc1042 header */
1076
1077 rfc1042 = hdr;
1078 rfc1042 += roundup(hdr_len, 4);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001079 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar,
1080 enctype), 4);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001081
1082 skb_pull(skb, sizeof(struct ethhdr));
1083 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1084 rfc1042, sizeof(struct rfc1042_hdr));
1085 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001086 break;
1087 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001088 /* remove A-MSDU subframe header and insert
1089 * decapped 802.11 header. rfc1042 header is already there */
1090
1091 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1092 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001093 break;
1094 }
1095
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001096 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001097
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001098 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001099}
1100
Michal Kazior605f81a2013-07-31 10:47:56 +02001101static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1102{
1103 struct htt_rx_desc *rxd;
1104 u32 flags, info;
1105 bool is_ip4, is_ip6;
1106 bool is_tcp, is_udp;
1107 bool ip_csum_ok, tcpudp_csum_ok;
1108
1109 rxd = (void *)skb->data - sizeof(*rxd);
1110 flags = __le32_to_cpu(rxd->attention.flags);
1111 info = __le32_to_cpu(rxd->msdu_start.info1);
1112
1113 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1114 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1115 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1116 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1117 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1118 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1119
1120 if (!is_ip4 && !is_ip6)
1121 return CHECKSUM_NONE;
1122 if (!is_tcp && !is_udp)
1123 return CHECKSUM_NONE;
1124 if (!ip_csum_ok)
1125 return CHECKSUM_NONE;
1126 if (!tcpudp_csum_ok)
1127 return CHECKSUM_NONE;
1128
1129 return CHECKSUM_UNNECESSARY;
1130}
1131
Ben Greearbfa35362014-03-03 14:07:09 -08001132static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1133{
1134 struct sk_buff *next = msdu_head->next;
1135 struct sk_buff *to_free = next;
1136 int space;
1137 int total_len = 0;
1138
1139 /* TODO: Might could optimize this by using
1140 * skb_try_coalesce or similar method to
1141 * decrease copying, or maybe get mac80211 to
1142 * provide a way to just receive a list of
1143 * skb?
1144 */
1145
1146 msdu_head->next = NULL;
1147
1148 /* Allocate total length all at once. */
1149 while (next) {
1150 total_len += next->len;
1151 next = next->next;
1152 }
1153
1154 space = total_len - skb_tailroom(msdu_head);
1155 if ((space > 0) &&
1156 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1157 /* TODO: bump some rx-oom error stat */
1158 /* put it back together so we can free the
1159 * whole list at once.
1160 */
1161 msdu_head->next = to_free;
1162 return -1;
1163 }
1164
1165 /* Walk list again, copying contents into
1166 * msdu_head
1167 */
1168 next = to_free;
1169 while (next) {
1170 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1171 next->len);
1172 next = next->next;
1173 }
1174
1175 /* If here, we have consolidated skb. Free the
1176 * fragments and pass the main skb on up the
1177 * stack.
1178 */
1179 ath10k_htt_rx_free_msdu_chain(to_free);
1180 return 0;
1181}
1182
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001183static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1184 struct sk_buff *head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001185 enum htt_rx_mpdu_status status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001186 bool channel_set,
1187 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001188{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001189 struct ath10k *ar = htt->ar;
1190
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001191 if (head->len == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001192 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001193 "htt rx dropping due to zero-len\n");
1194 return false;
1195 }
1196
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001197 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001198 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001199 "htt rx dropping due to decrypt-err\n");
1200 return false;
1201 }
1202
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001203 if (!channel_set) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001204 ath10k_warn(ar, "no channel configured; ignoring frame!\n");
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001205 return false;
1206 }
1207
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001208 /* Skip mgmt frames while we handle this in WMI */
Michal Kaziorf6b946e2014-10-23 17:04:22 +03001209 if (attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001210 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001211 return false;
1212 }
1213
1214 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1215 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1216 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
Michal Kazior1bbc0972014-04-08 09:45:47 +03001217 !htt->ar->monitor_started) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001218 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001219 "htt rx ignoring frame w/ status %d\n",
1220 status);
1221 return false;
1222 }
1223
1224 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001225 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001226 "htt rx CAC running\n");
1227 return false;
1228 }
1229
1230 return true;
1231}
1232
Kalle Valo5e3dd152013-06-12 20:52:10 +03001233static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1234 struct htt_rx_indication *rx)
1235{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001236 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001237 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001238 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001239 enum htt_rx_mpdu_status status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001240 struct ieee80211_hdr *hdr;
1241 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001242 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001243 int fw_desc_len;
1244 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001245 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001246 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001247 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001248
Michal Kazior45967082014-02-27 18:50:05 +02001249 lockdep_assert_held(&htt->rx_ring.lock);
1250
Kalle Valo5e3dd152013-06-12 20:52:10 +03001251 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1252 fw_desc = (u8 *)&rx->fw_desc;
1253
1254 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1255 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1256 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1257
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001258 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001259 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1260 memset(rx_status, 0, sizeof(*rx_status));
1261 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1262 rx->ppdu.combined_rssi;
1263 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001264
1265 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1266 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001267 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1268 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001269 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001270
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001271 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001272
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001273 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001274 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001275 rx->ppdu.info0,
1276 __le32_to_cpu(rx->ppdu.info1),
1277 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001278 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001279 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001280
Michal Kazior7aa7a722014-08-25 12:09:38 +02001281 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001282 rx, sizeof(*rx) +
1283 (sizeof(struct htt_rx_indication_mpdu_range) *
1284 num_mpdu_ranges));
1285
1286 for (i = 0; i < num_mpdu_ranges; i++) {
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001287 status = mpdu_ranges[i].mpdu_range_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001288
1289 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1290 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001291
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001292 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001293 msdu_head = NULL;
1294 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001295 ret = ath10k_htt_rx_amsdu_pop(htt,
1296 &fw_desc,
1297 &fw_desc_len,
1298 &msdu_head,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001299 &msdu_tail,
1300 &attention);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001301
1302 if (ret < 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001303 ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001304 ret);
1305 ath10k_htt_rx_free_msdu_chain(msdu_head);
1306 continue;
1307 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001308
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001309 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001310 status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001311 channel_set,
1312 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001313 ath10k_htt_rx_free_msdu_chain(msdu_head);
1314 continue;
1315 }
1316
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001317 if (ret > 0 &&
1318 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001319 ath10k_htt_rx_free_msdu_chain(msdu_head);
1320 continue;
1321 }
1322
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001323 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001324 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001325 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001326 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001327
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001328 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001329 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001330 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001331 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001332
Kalle Valo5e3dd152013-06-12 20:52:10 +03001333 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1334
1335 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001336 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001337 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001338 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001339 }
1340 }
1341
Michal Kazior6e712d42013-09-24 10:18:36 +02001342 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001343}
1344
1345static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001346 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001347{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001348 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001349 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001350 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001351 struct htt_rx_desc *rxd;
1352 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001353 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001354 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001355 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001356 bool tkip_mic_err;
1357 bool decrypt_err;
1358 u8 *fw_desc;
1359 int fw_desc_len, hdrlen, paramlen;
1360 int trim;
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001361 u32 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001362
1363 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1364 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1365
1366 msdu_head = NULL;
1367 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001368
1369 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001370 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001371 &msdu_head, &msdu_tail,
1372 &attention);
Michal Kazior45967082014-02-27 18:50:05 +02001373 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001374
Michal Kazior7aa7a722014-08-25 12:09:38 +02001375 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001376
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001377 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001378 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001379 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001380 ath10k_htt_rx_free_msdu_chain(msdu_head);
1381 return;
1382 }
1383
1384 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001385 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001386
1387 hdr = (struct ieee80211_hdr *)msdu_head->data;
1388 rxd = (void *)msdu_head->data - sizeof(*rxd);
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001389 tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1390 decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001391 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +03001392 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001393
1394 if (fmt != RX_MSDU_DECAP_RAW) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001395 ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001396 dev_kfree_skb_any(msdu_head);
1397 goto end;
1398 }
1399
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001400 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1401 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001402 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1403 true);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001404 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001405
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001406 if (tkip_mic_err)
Michal Kazior7aa7a722014-08-25 12:09:38 +02001407 ath10k_warn(ar, "tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001408
1409 if (decrypt_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001410 ath10k_warn(ar, "decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001411 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001412 goto end;
1413 }
1414
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001415 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001416 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001417 paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001418
1419 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001420 memmove((void *)msdu_head->data + paramlen,
1421 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001422 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001423 skb_pull(msdu_head, paramlen);
1424 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001425 }
1426
1427 /* remove trailing FCS */
1428 trim = 4;
1429
1430 /* remove crypto trailer */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001431 trim += ath10k_htt_rx_crypto_tail_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001432
1433 /* last fragment of TKIP frags has MIC */
1434 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001435 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Michal Kazior890d3b22014-10-23 17:04:22 +03001436 trim += MICHAEL_MIC_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001437
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001438 if (trim > msdu_head->len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001439 ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001440 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001441 goto end;
1442 }
1443
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001444 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001445
Michal Kazior7aa7a722014-08-25 12:09:38 +02001446 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001447 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001448 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001449
1450end:
1451 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001452 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001453 "expecting more fragmented rx in one indication %d\n",
1454 fw_desc_len);
1455 }
1456}
1457
Michal Kazior6c5151a2014-02-27 18:50:04 +02001458static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1459 struct sk_buff *skb)
1460{
1461 struct ath10k_htt *htt = &ar->htt;
1462 struct htt_resp *resp = (struct htt_resp *)skb->data;
1463 struct htt_tx_done tx_done = {};
1464 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1465 __le16 msdu_id;
1466 int i;
1467
Michal Kazior45967082014-02-27 18:50:05 +02001468 lockdep_assert_held(&htt->tx_lock);
1469
Michal Kazior6c5151a2014-02-27 18:50:04 +02001470 switch (status) {
1471 case HTT_DATA_TX_STATUS_NO_ACK:
1472 tx_done.no_ack = true;
1473 break;
1474 case HTT_DATA_TX_STATUS_OK:
1475 break;
1476 case HTT_DATA_TX_STATUS_DISCARD:
1477 case HTT_DATA_TX_STATUS_POSTPONE:
1478 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1479 tx_done.discard = true;
1480 break;
1481 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001482 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001483 tx_done.discard = true;
1484 break;
1485 }
1486
Michal Kazior7aa7a722014-08-25 12:09:38 +02001487 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001488 resp->data_tx_completion.num_msdus);
1489
1490 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1491 msdu_id = resp->data_tx_completion.msdus[i];
1492 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1493 ath10k_txrx_tx_unref(htt, &tx_done);
1494 }
1495}
1496
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001497static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1498{
1499 struct htt_rx_addba *ev = &resp->rx_addba;
1500 struct ath10k_peer *peer;
1501 struct ath10k_vif *arvif;
1502 u16 info0, tid, peer_id;
1503
1504 info0 = __le16_to_cpu(ev->info0);
1505 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1506 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1507
Michal Kazior7aa7a722014-08-25 12:09:38 +02001508 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001509 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1510 tid, peer_id, ev->window_size);
1511
1512 spin_lock_bh(&ar->data_lock);
1513 peer = ath10k_peer_find_by_id(ar, peer_id);
1514 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001515 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001516 peer_id);
1517 spin_unlock_bh(&ar->data_lock);
1518 return;
1519 }
1520
1521 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1522 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001523 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001524 peer->vdev_id);
1525 spin_unlock_bh(&ar->data_lock);
1526 return;
1527 }
1528
Michal Kazior7aa7a722014-08-25 12:09:38 +02001529 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001530 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1531 peer->addr, tid, ev->window_size);
1532
1533 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1534 spin_unlock_bh(&ar->data_lock);
1535}
1536
1537static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1538{
1539 struct htt_rx_delba *ev = &resp->rx_delba;
1540 struct ath10k_peer *peer;
1541 struct ath10k_vif *arvif;
1542 u16 info0, tid, peer_id;
1543
1544 info0 = __le16_to_cpu(ev->info0);
1545 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1546 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1547
Michal Kazior7aa7a722014-08-25 12:09:38 +02001548 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001549 "htt rx delba tid %hu peer_id %hu\n",
1550 tid, peer_id);
1551
1552 spin_lock_bh(&ar->data_lock);
1553 peer = ath10k_peer_find_by_id(ar, peer_id);
1554 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001555 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001556 peer_id);
1557 spin_unlock_bh(&ar->data_lock);
1558 return;
1559 }
1560
1561 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1562 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001563 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001564 peer->vdev_id);
1565 spin_unlock_bh(&ar->data_lock);
1566 return;
1567 }
1568
Michal Kazior7aa7a722014-08-25 12:09:38 +02001569 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001570 "htt rx stop rx ba session sta %pM tid %hu\n",
1571 peer->addr, tid);
1572
1573 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1574 spin_unlock_bh(&ar->data_lock);
1575}
1576
Kalle Valo5e3dd152013-06-12 20:52:10 +03001577void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1578{
Michal Kazioredb82362013-07-05 16:15:14 +03001579 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001580 struct htt_resp *resp = (struct htt_resp *)skb->data;
1581
1582 /* confirm alignment */
1583 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001584 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001585
Michal Kazior7aa7a722014-08-25 12:09:38 +02001586 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001587 resp->hdr.msg_type);
1588 switch (resp->hdr.msg_type) {
1589 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1590 htt->target_version_major = resp->ver_resp.major;
1591 htt->target_version_minor = resp->ver_resp.minor;
1592 complete(&htt->target_version_received);
1593 break;
1594 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001595 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001596 spin_lock_bh(&htt->rx_ring.lock);
1597 __skb_queue_tail(&htt->rx_compl_q, skb);
1598 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001599 tasklet_schedule(&htt->txrx_compl_task);
1600 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001601 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1602 struct htt_peer_map_event ev = {
1603 .vdev_id = resp->peer_map.vdev_id,
1604 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1605 };
1606 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1607 ath10k_peer_map_event(htt, &ev);
1608 break;
1609 }
1610 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1611 struct htt_peer_unmap_event ev = {
1612 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1613 };
1614 ath10k_peer_unmap_event(htt, &ev);
1615 break;
1616 }
1617 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1618 struct htt_tx_done tx_done = {};
1619 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1620
1621 tx_done.msdu_id =
1622 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1623
1624 switch (status) {
1625 case HTT_MGMT_TX_STATUS_OK:
1626 break;
1627 case HTT_MGMT_TX_STATUS_RETRY:
1628 tx_done.no_ack = true;
1629 break;
1630 case HTT_MGMT_TX_STATUS_DROP:
1631 tx_done.discard = true;
1632 break;
1633 }
1634
Michal Kazior6c5151a2014-02-27 18:50:04 +02001635 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001636 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001637 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001638 break;
1639 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001640 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1641 spin_lock_bh(&htt->tx_lock);
1642 __skb_queue_tail(&htt->tx_compl_q, skb);
1643 spin_unlock_bh(&htt->tx_lock);
1644 tasklet_schedule(&htt->txrx_compl_task);
1645 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001646 case HTT_T2H_MSG_TYPE_SEC_IND: {
1647 struct ath10k *ar = htt->ar;
1648 struct htt_security_indication *ev = &resp->security_indication;
1649
Michal Kazior7aa7a722014-08-25 12:09:38 +02001650 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001651 "sec ind peer_id %d unicast %d type %d\n",
1652 __le16_to_cpu(ev->peer_id),
1653 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1654 MS(ev->flags, HTT_SECURITY_TYPE));
1655 complete(&ar->install_key_done);
1656 break;
1657 }
1658 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001659 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001660 skb->data, skb->len);
1661 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1662 break;
1663 }
1664 case HTT_T2H_MSG_TYPE_TEST:
1665 /* FIX THIS */
1666 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001667 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03001668 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03001669 break;
1670 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001671 /* Firmware can return tx frames if it's unable to fully
1672 * process them and suspects host may be able to fix it. ath10k
1673 * sends all tx frames as already inspected so this shouldn't
1674 * happen unless fw has a bug.
1675 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001676 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03001677 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001678 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001679 ath10k_htt_rx_addba(ar, resp);
1680 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001681 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001682 ath10k_htt_rx_delba(ar, resp);
1683 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03001684 case HTT_T2H_MSG_TYPE_PKTLOG: {
1685 struct ath10k_pktlog_hdr *hdr =
1686 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
1687
1688 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
1689 sizeof(*hdr) +
1690 __le16_to_cpu(hdr->size));
1691 break;
1692 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001693 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1694 /* Ignore this event because mac80211 takes care of Rx
1695 * aggregation reordering.
1696 */
1697 break;
1698 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001699 default:
Michal Kazior2358a542014-10-02 13:32:55 +02001700 ath10k_warn(ar, "htt event (%d) not handled\n",
1701 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001702 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001703 skb->data, skb->len);
1704 break;
1705 };
1706
1707 /* Free the indication buffer */
1708 dev_kfree_skb_any(skb);
1709}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001710
1711static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1712{
1713 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1714 struct htt_resp *resp;
1715 struct sk_buff *skb;
1716
Michal Kazior45967082014-02-27 18:50:05 +02001717 spin_lock_bh(&htt->tx_lock);
1718 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001719 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1720 dev_kfree_skb_any(skb);
1721 }
Michal Kazior45967082014-02-27 18:50:05 +02001722 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001723
Michal Kazior45967082014-02-27 18:50:05 +02001724 spin_lock_bh(&htt->rx_ring.lock);
1725 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001726 resp = (struct htt_resp *)skb->data;
1727 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1728 dev_kfree_skb_any(skb);
1729 }
Michal Kazior45967082014-02-27 18:50:05 +02001730 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001731}