Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 1 | if ARCH_AT91 |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 2 | |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 3 | config HAVE_AT91_UTMI |
| 4 | bool |
| 5 | |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 6 | config HAVE_AT91_USB_CLK |
| 7 | bool |
| 8 | |
Boris BREZILLON | c8a8c63 | 2013-10-11 09:37:46 +0200 | [diff] [blame] | 9 | config COMMON_CLK_AT91 |
| 10 | bool |
Boris BREZILLON | c8a8c63 | 2013-10-11 09:37:46 +0200 | [diff] [blame] | 11 | select COMMON_CLK |
| 12 | |
Boris BREZILLON | a9c0688 | 2013-10-11 13:27:06 +0200 | [diff] [blame] | 13 | config HAVE_AT91_SMD |
| 14 | bool |
| 15 | |
Alexandre Belloni | bcc5fd4 | 2014-09-15 18:15:53 +0200 | [diff] [blame] | 16 | config HAVE_AT91_H32MX |
| 17 | bool |
| 18 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 19 | config SOC_SAMA5 |
| 20 | bool |
Boris BREZILLON | 3b26f39 | 2014-07-10 19:14:21 +0200 | [diff] [blame] | 21 | select ATMEL_AIC5_IRQ |
Nicolas Ferre | ef7eda2 | 2014-11-21 17:10:06 +0100 | [diff] [blame] | 22 | select COMMON_CLK_AT91 |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 23 | select CPU_V7 |
| 24 | select GENERIC_CLOCKEVENTS |
Alexandre Belloni | 63e6036 | 2014-07-08 18:21:13 +0200 | [diff] [blame] | 25 | select MEMORY |
| 26 | select ATMEL_SDRAMC |
Wenyou Yang | 896bc87 | 2015-03-09 11:44:50 +0800 | [diff] [blame^] | 27 | select SRAM if PM |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 28 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 29 | menu "Atmel AT91 System-on-Chip" |
| 30 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 31 | choice |
| 32 | |
| 33 | prompt "Core type" |
| 34 | |
Arnd Bergmann | fe138c2 | 2014-03-13 15:18:31 +0100 | [diff] [blame] | 35 | config SOC_SAM_V4_V5 |
| 36 | bool "ARM9 AT91SAM9/AT91RM9200" |
| 37 | help |
| 38 | Select this if you are using one of Atmel's AT91SAM9 or |
| 39 | AT91RM9200 SoC. |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 40 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 41 | config SOC_SAM_V7 |
| 42 | bool "Cortex A5" |
| 43 | help |
| 44 | Select this if you are using one of Atmel's SAMA5D3 SoC. |
| 45 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 46 | endchoice |
| 47 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 48 | comment "Atmel AT91 Processor" |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 49 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 50 | if SOC_SAM_V7 |
| 51 | config SOC_SAMA5D3 |
| 52 | bool "SAMA5D3 family" |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 53 | select SOC_SAMA5 |
| 54 | select HAVE_FB_ATMEL |
Boris BREZILLON | f090fb3 | 2013-10-11 12:22:06 +0200 | [diff] [blame] | 55 | select HAVE_AT91_UTMI |
Boris BREZILLON | a9c0688 | 2013-10-11 13:27:06 +0200 | [diff] [blame] | 56 | select HAVE_AT91_SMD |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 57 | select HAVE_AT91_USB_CLK |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 58 | help |
| 59 | Select this if you are using one of Atmel's SAMA5D3 family SoC. |
Josh Wu | 7f45716 | 2013-11-06 18:01:11 +0800 | [diff] [blame] | 60 | This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36. |
Nicolas Ferre | 2dc850b | 2014-09-15 18:15:54 +0200 | [diff] [blame] | 61 | |
| 62 | config SOC_SAMA5D4 |
| 63 | bool "SAMA5D4 family" |
| 64 | select SOC_SAMA5 |
Nicolas Ferre | 2dc850b | 2014-09-15 18:15:54 +0200 | [diff] [blame] | 65 | select CLKSRC_MMIO |
| 66 | select CACHE_L2X0 |
Nicolas Ferre | 2dc850b | 2014-09-15 18:15:54 +0200 | [diff] [blame] | 67 | select HAVE_FB_ATMEL |
| 68 | select HAVE_AT91_UTMI |
| 69 | select HAVE_AT91_SMD |
| 70 | select HAVE_AT91_USB_CLK |
| 71 | select HAVE_AT91_H32MX |
| 72 | help |
| 73 | Select this if you are using one of Atmel's SAMA5D4 family SoC. |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 74 | endif |
| 75 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 76 | if SOC_SAM_V4_V5 |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 77 | config SOC_AT91RM9200 |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 78 | bool "AT91RM9200" |
Nicolas Ferre | ef7eda2 | 2014-11-21 17:10:06 +0100 | [diff] [blame] | 79 | select ATMEL_AIC_IRQ |
| 80 | select COMMON_CLK_AT91 |
Russell King | c750815 | 2008-10-26 10:55:14 +0000 | [diff] [blame] | 81 | select CPU_ARM920T |
David Brownell | 5e802df | 2007-07-31 01:41:26 +0100 | [diff] [blame] | 82 | select GENERIC_CLOCKEVENTS |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 83 | select HAVE_AT91_USB_CLK |
Wenyou Yang | 896bc87 | 2015-03-09 11:44:50 +0800 | [diff] [blame^] | 84 | select SRAM if PM |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 85 | |
Alexandre Belloni | 2b019a4 | 2015-01-15 22:58:13 +0100 | [diff] [blame] | 86 | config SOC_AT91SAM9 |
| 87 | bool "AT91SAM9" |
| 88 | select ATMEL_AIC_IRQ |
| 89 | select ATMEL_SDRAMC |
| 90 | select COMMON_CLK_AT91 |
| 91 | select CPU_ARM926T |
| 92 | select GENERIC_CLOCKEVENTS |
Boris BREZILLON | a9c0688 | 2013-10-11 13:27:06 +0200 | [diff] [blame] | 93 | select HAVE_AT91_SMD |
Boris BREZILLON | c84a61d | 2013-10-17 18:55:41 +0200 | [diff] [blame] | 94 | select HAVE_AT91_USB_CLK |
Alexandre Belloni | 2b019a4 | 2015-01-15 22:58:13 +0100 | [diff] [blame] | 95 | select HAVE_AT91_UTMI |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 96 | select HAVE_FB_ATMEL |
Alexandre Belloni | 2b019a4 | 2015-01-15 22:58:13 +0100 | [diff] [blame] | 97 | select MEMORY |
Wenyou Yang | 896bc87 | 2015-03-09 11:44:50 +0800 | [diff] [blame^] | 98 | select SRAM if PM |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 99 | help |
Alexandre Belloni | 2b019a4 | 2015-01-15 22:58:13 +0100 | [diff] [blame] | 100 | Select this if you are using one of those Atmel SoC: |
| 101 | AT91SAM9260 |
| 102 | AT91SAM9261 |
| 103 | AT91SAM9263 |
| 104 | AT91SAM9G15 |
| 105 | AT91SAM9G20 |
| 106 | AT91SAM9G25 |
| 107 | AT91SAM9G35 |
| 108 | AT91SAM9G45 |
| 109 | AT91SAM9G46 |
| 110 | AT91SAM9M10 |
| 111 | AT91SAM9M11 |
| 112 | AT91SAM9N12 |
| 113 | AT91SAM9RL |
| 114 | AT91SAM9X25 |
| 115 | AT91SAM9X35 |
| 116 | AT91SAM9XE |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 117 | endif # SOC_SAM_V4_V5 |
Greg Ungerer | 9f1ccef | 2007-07-30 02:39:21 +0100 | [diff] [blame] | 118 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 119 | comment "AT91 Feature Selections" |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 120 | |
Andrew Victor | eaad2db | 2008-09-21 21:35:18 +0100 | [diff] [blame] | 121 | config AT91_SLOW_CLOCK |
| 122 | bool "Suspend-to-RAM disables main oscillator" |
| 123 | depends on SUSPEND |
| 124 | help |
| 125 | Select this if you want Suspend-to-RAM to save the most power |
| 126 | possible (without powering off the CPU) by disabling the PLLs |
| 127 | and main oscillator so that only the 32 KiHz clock is available. |
| 128 | |
| 129 | When only that slow-clock is available, some peripherals lose |
| 130 | functionality. Many can't issue wakeup events unless faster |
| 131 | clocks are available. Some lose their operating state and |
| 132 | need to be completely re-initialized. |
| 133 | |
David Brownell | 5248c65 | 2007-11-12 17:59:10 +0100 | [diff] [blame] | 134 | config AT91_TIMER_HZ |
| 135 | int "Kernel HZ (jiffies per second)" |
| 136 | range 32 1024 |
| 137 | depends on ARCH_AT91 |
Nicolas Ferre | e152015 | 2014-11-21 16:22:17 +0100 | [diff] [blame] | 138 | default "128" if SOC_AT91RM9200 |
David Brownell | 5248c65 | 2007-11-12 17:59:10 +0100 | [diff] [blame] | 139 | default "100" |
| 140 | help |
| 141 | On AT91rm9200 chips where you're using a system clock derived |
| 142 | from the 32768 Hz hardware clock, this tick rate should divide |
| 143 | it exactly: use a power-of-two value, such as 128 or 256, to |
| 144 | reduce timing errors caused by rounding. |
| 145 | |
| 146 | On AT91sam926x chips, or otherwise when using a higher precision |
| 147 | system clock (of at least several MHz), rounding is less of a |
| 148 | problem so it can be safer to use a decimal values like 100. |
| 149 | |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 150 | endmenu |
| 151 | |
| 152 | endif |