Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/pxa27x.c |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * Created: Nov 05, 2002 |
| 6 | * Copyright: MontaVista Software Inc. |
| 7 | * |
| 8 | * Code specific to PXA27x aka Bulverde. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/module.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/init.h> |
Rafael J. Wysocki | 95d9ffb | 2007-10-18 03:04:39 -0700 | [diff] [blame] | 17 | #include <linux/suspend.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 18 | #include <linux/platform_device.h> |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 19 | #include <linux/sysdev.h> |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 20 | #include <linux/io.h> |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 21 | #include <linux/irq.h> |
Sebastian Andrzej Siewior | b459396 | 2011-02-23 12:38:16 +0100 | [diff] [blame] | 22 | #include <linux/i2c/pxa-i2c.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Marek Vasut | 851982c | 2010-10-11 02:20:19 +0200 | [diff] [blame] | 24 | #include <asm/mach/map.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 25 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <asm/irq.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 27 | #include <mach/irqs.h> |
Eric Miao | a58fbcd | 2009-01-06 17:37:37 +0800 | [diff] [blame] | 28 | #include <mach/gpio.h> |
Eric Miao | 51c6298 | 2009-01-02 23:17:22 +0800 | [diff] [blame] | 29 | #include <mach/pxa27x.h> |
Russell King | afd2fc0 | 2008-08-07 11:05:25 +0100 | [diff] [blame] | 30 | #include <mach/reset.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 31 | #include <mach/ohci.h> |
| 32 | #include <mach/pm.h> |
| 33 | #include <mach/dma.h> |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 34 | #include <mach/smemc.h> |
| 35 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include "generic.h" |
Russell King | 46c41e6 | 2007-05-15 15:39:36 +0100 | [diff] [blame] | 37 | #include "devices.h" |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 38 | #include "clock.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | |
Eric Miao | 0cb0b0d | 2008-10-04 12:45:39 +0800 | [diff] [blame] | 40 | void pxa27x_clear_otgph(void) |
| 41 | { |
| 42 | if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) |
| 43 | PSSR |= PSSR_OTGPH; |
| 44 | } |
| 45 | EXPORT_SYMBOL(pxa27x_clear_otgph); |
| 46 | |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 47 | static unsigned long ac97_reset_config[] = { |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 48 | GPIO113_GPIO, |
Eric Miao | 5e16e3c | 2010-07-13 09:41:28 +0800 | [diff] [blame] | 49 | GPIO113_AC97_nRESET, |
| 50 | GPIO95_GPIO, |
| 51 | GPIO95_AC97_nRESET, |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 52 | }; |
| 53 | |
| 54 | void pxa27x_assert_ac97reset(int reset_gpio, int on) |
| 55 | { |
| 56 | if (reset_gpio == 113) |
| 57 | pxa2xx_mfp_config(on ? &ac97_reset_config[0] : |
| 58 | &ac97_reset_config[1], 1); |
| 59 | |
| 60 | if (reset_gpio == 95) |
| 61 | pxa2xx_mfp_config(on ? &ac97_reset_config[2] : |
| 62 | &ac97_reset_config[3], 1); |
| 63 | } |
| 64 | EXPORT_SYMBOL_GPL(pxa27x_assert_ac97reset); |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | /* Crystal clock: 13MHz */ |
| 67 | #define BASE_CLK 13000000 |
| 68 | |
| 69 | /* |
| 70 | * Get the clock frequency as reflected by CCSR and the turbo flag. |
| 71 | * We assume these values have been applied via a fcs. |
| 72 | * If info is not 0 we also display the current settings. |
| 73 | */ |
Russell King | 15a4033 | 2007-08-20 10:07:44 +0100 | [diff] [blame] | 74 | unsigned int pxa27x_get_clk_frequency_khz(int info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | { |
| 76 | unsigned long ccsr, clkcfg; |
| 77 | unsigned int l, L, m, M, n2, N, S; |
| 78 | int cccr_a, t, ht, b; |
| 79 | |
| 80 | ccsr = CCSR; |
| 81 | cccr_a = CCCR & (1 << 25); |
| 82 | |
| 83 | /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ |
| 84 | asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); |
Richard Purdie | afe5df2 | 2006-02-01 19:25:59 +0000 | [diff] [blame] | 85 | t = clkcfg & (1 << 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | ht = clkcfg & (1 << 2); |
| 87 | b = clkcfg & (1 << 3); |
| 88 | |
| 89 | l = ccsr & 0x1f; |
| 90 | n2 = (ccsr>>7) & 0xf; |
| 91 | m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4; |
| 92 | |
| 93 | L = l * BASE_CLK; |
| 94 | N = (L * n2) / 2; |
| 95 | M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); |
| 96 | S = (b) ? L : (L/2); |
| 97 | |
| 98 | if (info) { |
| 99 | printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n", |
| 100 | L / 1000000, (L % 1000000) / 10000, l ); |
| 101 | printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n", |
| 102 | N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5, |
| 103 | (t) ? "" : "in" ); |
| 104 | printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n", |
| 105 | M / 1000000, (M % 1000000) / 10000, m ); |
| 106 | printk( KERN_INFO "System bus clock: %d.%02dMHz \n", |
| 107 | S / 1000000, (S % 1000000) / 10000 ); |
| 108 | } |
| 109 | |
| 110 | return (t) ? (N/1000) : (L/1000); |
| 111 | } |
| 112 | |
| 113 | /* |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 114 | * Return the current mem clock frequency as reflected by CCCR[A], B, and L |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | */ |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 116 | static unsigned long clk_pxa27x_mem_getrate(struct clk *clk) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | { |
| 118 | unsigned long ccsr, clkcfg; |
| 119 | unsigned int l, L, m, M; |
| 120 | int cccr_a, b; |
| 121 | |
| 122 | ccsr = CCSR; |
| 123 | cccr_a = CCCR & (1 << 25); |
| 124 | |
| 125 | /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ |
| 126 | asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); |
| 127 | b = clkcfg & (1 << 3); |
| 128 | |
| 129 | l = ccsr & 0x1f; |
| 130 | m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4; |
| 131 | |
| 132 | L = l * BASE_CLK; |
| 133 | M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); |
| 134 | |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 135 | return M; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | } |
| 137 | |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 138 | static const struct clkops clk_pxa27x_mem_ops = { |
| 139 | .enable = clk_dummy_enable, |
| 140 | .disable = clk_dummy_disable, |
| 141 | .getrate = clk_pxa27x_mem_getrate, |
| 142 | }; |
| 143 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | /* |
| 145 | * Return the current LCD clock frequency in units of 10kHz as |
| 146 | */ |
Russell King | a88a447 | 2007-08-20 10:34:37 +0100 | [diff] [blame] | 147 | static unsigned int pxa27x_get_lcdclk_frequency_10khz(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | { |
| 149 | unsigned long ccsr; |
| 150 | unsigned int l, L, k, K; |
| 151 | |
| 152 | ccsr = CCSR; |
| 153 | |
| 154 | l = ccsr & 0x1f; |
| 155 | k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4; |
| 156 | |
| 157 | L = l * BASE_CLK; |
| 158 | K = L / k; |
| 159 | |
| 160 | return (K / 10000); |
| 161 | } |
| 162 | |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 163 | static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk) |
| 164 | { |
| 165 | return pxa27x_get_lcdclk_frequency_10khz() * 10000; |
| 166 | } |
| 167 | |
| 168 | static const struct clkops clk_pxa27x_lcd_ops = { |
Eric Miao | 4029813 | 2010-11-22 10:49:55 +0800 | [diff] [blame] | 169 | .enable = clk_pxa2xx_cken_enable, |
| 170 | .disable = clk_pxa2xx_cken_disable, |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 171 | .getrate = clk_pxa27x_lcd_getrate, |
| 172 | }; |
| 173 | |
Eric Miao | 4029813 | 2010-11-22 10:49:55 +0800 | [diff] [blame] | 174 | static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1); |
| 175 | static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1); |
| 176 | static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1); |
| 177 | static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0); |
| 178 | static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0); |
| 179 | static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5); |
| 180 | static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0); |
| 181 | static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0); |
| 182 | static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0); |
| 183 | static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0); |
| 184 | static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0); |
| 185 | static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0); |
| 186 | static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0); |
| 187 | static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0); |
| 188 | static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0); |
| 189 | static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0); |
| 190 | static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0); |
| 191 | static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0); |
| 192 | static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0); |
| 193 | static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0); |
| 194 | static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0); |
| 195 | static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0); |
| 196 | static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0); |
| 197 | |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 198 | static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops); |
| 199 | static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops); |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 200 | static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0); |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 201 | |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 202 | static struct clk_lookup pxa27x_clkregs[] = { |
| 203 | INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL), |
| 204 | INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL), |
| 205 | INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL), |
| 206 | INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL), |
| 207 | INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL), |
| 208 | INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL), |
| 209 | INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL), |
| 210 | INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL), |
| 211 | INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL), |
| 212 | INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"), |
| 213 | INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"), |
| 214 | INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL), |
| 215 | INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL), |
| 216 | INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL), |
| 217 | INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL), |
| 218 | INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL), |
| 219 | INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL), |
| 220 | INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL), |
| 221 | INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL), |
| 222 | INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"), |
| 223 | INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"), |
| 224 | INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"), |
| 225 | INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"), |
| 226 | INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"), |
| 227 | INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), |
| 228 | INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 229 | INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 230 | }; |
| 231 | |
Nicolas Pitre | a8fa3f0 | 2005-06-13 22:35:41 +0100 | [diff] [blame] | 232 | #ifdef CONFIG_PM |
| 233 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 234 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x |
| 235 | #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] |
| 236 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 237 | /* |
Mike Rapoport | d082d36 | 2009-05-26 09:10:18 +0300 | [diff] [blame] | 238 | * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM |
| 239 | */ |
| 240 | static unsigned int pwrmode = PWRMODE_SLEEP; |
| 241 | |
| 242 | int __init pxa27x_set_pwrmode(unsigned int mode) |
| 243 | { |
| 244 | switch (mode) { |
| 245 | case PWRMODE_SLEEP: |
| 246 | case PWRMODE_DEEPSLEEP: |
| 247 | pwrmode = mode; |
| 248 | return 0; |
| 249 | } |
| 250 | |
| 251 | return -EINVAL; |
| 252 | } |
| 253 | |
| 254 | /* |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 255 | * List of global PXA peripheral registers to preserve. |
| 256 | * More ones like CP and general purpose register values are preserved |
| 257 | * with the stack pointer in sleep.S. |
| 258 | */ |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 259 | enum { |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 260 | SLEEP_SAVE_PSTR, |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 261 | SLEEP_SAVE_MDREFR, |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 262 | SLEEP_SAVE_PCFR, |
Robert Jarzmik | 649de51 | 2008-05-02 21:17:06 +0100 | [diff] [blame] | 263 | SLEEP_SAVE_COUNT |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 264 | }; |
| 265 | |
| 266 | void pxa27x_cpu_pm_save(unsigned long *sleep_save) |
| 267 | { |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 268 | sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR); |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 269 | SAVE(PCFR); |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 270 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 271 | SAVE(PSTR); |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 272 | } |
| 273 | |
| 274 | void pxa27x_cpu_pm_restore(unsigned long *sleep_save) |
| 275 | { |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 276 | __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR); |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 277 | RESTORE(PCFR); |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 278 | |
| 279 | PSSR = PSSR_RDH | PSSR_PH; |
| 280 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 281 | RESTORE(PSTR); |
| 282 | } |
| 283 | |
| 284 | void pxa27x_cpu_pm_enter(suspend_state_t state) |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 285 | { |
| 286 | extern void pxa_cpu_standby(void); |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 287 | |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 288 | /* ensure voltage-change sequencer not initiated, which hangs */ |
| 289 | PCFR &= ~PCFR_FVC; |
| 290 | |
| 291 | /* Clear edge-detect status register. */ |
| 292 | PEDR = 0xDF12FE1B; |
| 293 | |
Russell King | dc38e2a | 2008-05-08 16:50:39 +0100 | [diff] [blame] | 294 | /* Clear reset status */ |
| 295 | RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; |
| 296 | |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 297 | switch (state) { |
Todd Poynor | 26705ca | 2005-07-01 11:27:05 +0100 | [diff] [blame] | 298 | case PM_SUSPEND_STANDBY: |
| 299 | pxa_cpu_standby(); |
| 300 | break; |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 301 | case PM_SUSPEND_MEM: |
Russell King | 4f5ad99 | 2011-02-06 17:41:26 +0000 | [diff] [blame] | 302 | pxa27x_cpu_suspend(pwrmode, PLAT_PHYS_OFFSET - PAGE_OFFSET); |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 303 | break; |
| 304 | } |
| 305 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 307 | static int pxa27x_cpu_pm_valid(suspend_state_t state) |
Russell King | 88dfe98 | 2007-05-15 11:22:48 +0100 | [diff] [blame] | 308 | { |
| 309 | return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; |
| 310 | } |
| 311 | |
Russell King | 4104980 | 2008-08-27 12:55:04 +0100 | [diff] [blame] | 312 | static int pxa27x_cpu_pm_prepare(void) |
| 313 | { |
| 314 | /* set resume return address */ |
Russell King | 4f5ad99 | 2011-02-06 17:41:26 +0000 | [diff] [blame] | 315 | PSPR = virt_to_phys(cpu_resume); |
Russell King | 4104980 | 2008-08-27 12:55:04 +0100 | [diff] [blame] | 316 | return 0; |
| 317 | } |
| 318 | |
| 319 | static void pxa27x_cpu_pm_finish(void) |
| 320 | { |
| 321 | /* ensure not to come back here if it wasn't intended */ |
| 322 | PSPR = 0; |
| 323 | } |
| 324 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 325 | static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { |
Robert Jarzmik | 649de51 | 2008-05-02 21:17:06 +0100 | [diff] [blame] | 326 | .save_count = SLEEP_SAVE_COUNT, |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 327 | .save = pxa27x_cpu_pm_save, |
| 328 | .restore = pxa27x_cpu_pm_restore, |
| 329 | .valid = pxa27x_cpu_pm_valid, |
| 330 | .enter = pxa27x_cpu_pm_enter, |
Russell King | 4104980 | 2008-08-27 12:55:04 +0100 | [diff] [blame] | 331 | .prepare = pxa27x_cpu_pm_prepare, |
| 332 | .finish = pxa27x_cpu_pm_finish, |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 333 | }; |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 334 | |
| 335 | static void __init pxa27x_init_pm(void) |
| 336 | { |
| 337 | pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns; |
| 338 | } |
eric miao | f79299c | 2008-01-02 08:24:49 +0800 | [diff] [blame] | 339 | #else |
| 340 | static inline void pxa27x_init_pm(void) {} |
Nicolas Pitre | a8fa3f0 | 2005-06-13 22:35:41 +0100 | [diff] [blame] | 341 | #endif |
| 342 | |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 343 | /* PXA27x: Various gpios can issue wakeup events. This logic only |
| 344 | * handles the simple cases, not the WEMUX2 and WEMUX3 options |
| 345 | */ |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 346 | static int pxa27x_set_wake(struct irq_data *d, unsigned int on) |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 347 | { |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 348 | int gpio = IRQ_TO_GPIO(d->irq); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 349 | uint32_t mask; |
| 350 | |
eric miao | c0a596d | 2008-03-11 09:46:28 +0800 | [diff] [blame] | 351 | if (gpio >= 0 && gpio < 128) |
| 352 | return gpio_set_wake(gpio, on); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 353 | |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 354 | if (d->irq == IRQ_KEYPAD) |
eric miao | c0a596d | 2008-03-11 09:46:28 +0800 | [diff] [blame] | 355 | return keypad_set_wake(on); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 356 | |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 357 | switch (d->irq) { |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 358 | case IRQ_RTCAlrm: |
| 359 | mask = PWER_RTC; |
| 360 | break; |
| 361 | case IRQ_USB: |
| 362 | mask = 1u << 26; |
| 363 | break; |
| 364 | default: |
| 365 | return -EINVAL; |
| 366 | } |
| 367 | |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 368 | if (on) |
| 369 | PWER |= mask; |
| 370 | else |
| 371 | PWER &=~mask; |
| 372 | |
| 373 | return 0; |
| 374 | } |
| 375 | |
| 376 | void __init pxa27x_init_irq(void) |
| 377 | { |
eric miao | b9e25ac | 2008-03-04 14:19:58 +0800 | [diff] [blame] | 378 | pxa_init_irq(34, pxa27x_set_wake); |
Eric Miao | a58fbcd | 2009-01-06 17:37:37 +0800 | [diff] [blame] | 379 | pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 380 | } |
| 381 | |
Marek Vasut | 851982c | 2010-10-11 02:20:19 +0200 | [diff] [blame] | 382 | static struct map_desc pxa27x_io_desc[] __initdata = { |
| 383 | { /* Mem Ctl */ |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 384 | .virtual = SMEMC_VIRT, |
| 385 | .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), |
Marek Vasut | 851982c | 2010-10-11 02:20:19 +0200 | [diff] [blame] | 386 | .length = 0x00200000, |
| 387 | .type = MT_DEVICE |
| 388 | }, { /* IMem ctl */ |
| 389 | .virtual = 0xfe000000, |
| 390 | .pfn = __phys_to_pfn(0x58000000), |
| 391 | .length = 0x00100000, |
| 392 | .type = MT_DEVICE |
| 393 | }, |
| 394 | }; |
| 395 | |
| 396 | void __init pxa27x_map_io(void) |
| 397 | { |
| 398 | pxa_map_io(); |
| 399 | iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc)); |
| 400 | pxa27x_get_clk_frequency_khz(1); |
| 401 | } |
| 402 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | /* |
| 404 | * device registration specific to PXA27x. |
| 405 | */ |
Mike Rapoport | 9ba63c4 | 2008-08-17 06:23:05 +0100 | [diff] [blame] | 406 | void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) |
Mike Rapoport | b7a3670 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 407 | { |
Philipp Zabel | bc3a595 | 2008-06-02 18:49:27 +0100 | [diff] [blame] | 408 | local_irq_disable(); |
| 409 | PCFR |= PCFR_PI2CEN; |
| 410 | local_irq_enable(); |
Eric Miao | 1475822 | 2008-11-28 15:24:12 +0800 | [diff] [blame] | 411 | pxa_register_device(&pxa27x_device_i2c_power, info); |
Mike Rapoport | b7a3670 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 412 | } |
| 413 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 414 | static struct platform_device *devices[] __initdata = { |
Philipp Zabel | 7a85762 | 2008-06-22 23:36:39 +0100 | [diff] [blame] | 415 | &pxa27x_device_udc, |
Eric Miao | 09a5358 | 2010-06-14 00:43:00 +0800 | [diff] [blame] | 416 | &pxa_device_pmu, |
Eric Miao | e09d02e | 2007-07-17 10:45:58 +0100 | [diff] [blame] | 417 | &pxa_device_i2s, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 418 | &pxa_device_asoc_ssp1, |
| 419 | &pxa_device_asoc_ssp2, |
| 420 | &pxa_device_asoc_ssp3, |
| 421 | &pxa_device_asoc_platform, |
Robert Jarzmik | 7249314 | 2008-11-13 23:50:56 +0100 | [diff] [blame] | 422 | &sa1100_device_rtc, |
Eric Miao | e09d02e | 2007-07-17 10:45:58 +0100 | [diff] [blame] | 423 | &pxa_device_rtc, |
eric miao | d8e0db1 | 2007-12-10 17:54:36 +0800 | [diff] [blame] | 424 | &pxa27x_device_ssp1, |
| 425 | &pxa27x_device_ssp2, |
| 426 | &pxa27x_device_ssp3, |
eric miao | 75540c1 | 2008-04-13 21:44:04 +0100 | [diff] [blame] | 427 | &pxa27x_device_pwm0, |
| 428 | &pxa27x_device_pwm1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | }; |
| 430 | |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 431 | static struct sys_device pxa27x_sysdev[] = { |
| 432 | { |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 433 | .cls = &pxa_irq_sysclass, |
eric miao | 16dfdbf | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 434 | }, { |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 435 | .cls = &pxa2xx_mfp_sysclass, |
| 436 | }, { |
eric miao | 16dfdbf | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 437 | .cls = &pxa_gpio_sysclass, |
Eric Miao | f113fe4 | 2010-11-23 17:00:03 +0800 | [diff] [blame] | 438 | }, { |
| 439 | .cls = &pxa2xx_clock_sysclass, |
| 440 | } |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 441 | }; |
| 442 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | static int __init pxa27x_init(void) |
| 444 | { |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 445 | int i, ret = 0; |
| 446 | |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 447 | if (cpu_is_pxa27x()) { |
Eric Miao | 04fef22 | 2008-07-29 14:26:00 +0800 | [diff] [blame] | 448 | |
| 449 | reset_status = RCSR; |
| 450 | |
Russell King | 0a0300d | 2010-01-12 12:28:00 +0000 | [diff] [blame] | 451 | clkdev_add_table(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs)); |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 452 | |
Eric Miao | fef1f99 | 2009-01-02 16:26:33 +0800 | [diff] [blame] | 453 | if ((ret = pxa_init_dma(IRQ_DMA, 32))) |
Eric Miao | f53f066 | 2007-06-22 05:40:17 +0100 | [diff] [blame] | 454 | return ret; |
eric miao | f79299c | 2008-01-02 08:24:49 +0800 | [diff] [blame] | 455 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 456 | pxa27x_init_pm(); |
eric miao | f79299c | 2008-01-02 08:24:49 +0800 | [diff] [blame] | 457 | |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 458 | for (i = 0; i < ARRAY_SIZE(pxa27x_sysdev); i++) { |
| 459 | ret = sysdev_register(&pxa27x_sysdev[i]); |
| 460 | if (ret) |
| 461 | pr_err("failed to register sysdev[%d]\n", i); |
| 462 | } |
| 463 | |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 464 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 465 | } |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 466 | |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 467 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | } |
| 469 | |
Russell King | 1c104e0 | 2008-04-19 10:59:24 +0100 | [diff] [blame] | 470 | postcore_initcall(pxa27x_init); |