Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* i915_dma.c -- DMA support for the I915 -*- linux-c -*- |
| 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 5 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 8 | * copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sub license, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial portions |
| 17 | * of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 27 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
| 29 | #include "drmP.h" |
| 30 | #include "drm.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 31 | #include "drm_crtc_helper.h" |
| 32 | #include "intel_drv.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include "i915_drm.h" |
| 34 | #include "i915_drv.h" |
| 35 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | /* Really want an OS-independent resettable timer. Would like to have |
| 37 | * this loop run for (eg) 3 sec, but have the timer reset every time |
| 38 | * the head pointer changes, so that EBUSY only happens if the ring |
| 39 | * actually stalls for (eg) 3 seconds. |
| 40 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 41 | int i915_wait_ring(struct drm_device * dev, int n, const char *caller) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | { |
| 43 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 44 | drm_i915_ring_buffer_t *ring = &(dev_priv->ring); |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 45 | u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD; |
| 46 | u32 last_acthd = I915_READ(acthd_reg); |
| 47 | u32 acthd; |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 48 | u32 last_head = I915_READ(PRB0_HEAD) & HEAD_ADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | int i; |
| 50 | |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 51 | for (i = 0; i < 100000; i++) { |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 52 | ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR; |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 53 | acthd = I915_READ(acthd_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | ring->space = ring->head - (ring->tail + 8); |
| 55 | if (ring->space < 0) |
| 56 | ring->space += ring->Size; |
| 57 | if (ring->space >= n) |
| 58 | return 0; |
| 59 | |
Chris Wilson | 98787c0 | 2009-03-06 23:27:52 +0000 | [diff] [blame] | 60 | if (dev->primary->master) { |
| 61 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
| 62 | if (master_priv->sarea_priv) |
| 63 | master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; |
| 64 | } |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | |
| 67 | if (ring->head != last_head) |
| 68 | i = 0; |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 69 | if (acthd != last_acthd) |
| 70 | i = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | |
| 72 | last_head = ring->head; |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 73 | last_acthd = acthd; |
| 74 | msleep_interruptible(10); |
| 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | } |
| 77 | |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 78 | return -EBUSY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | } |
| 80 | |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 81 | /** |
| 82 | * Sets up the hardware status page for devices that need a physical address |
| 83 | * in the register. |
| 84 | */ |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 85 | static int i915_init_phys_hws(struct drm_device *dev) |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 86 | { |
| 87 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 88 | /* Program Hardware Status Page */ |
| 89 | dev_priv->status_page_dmah = |
| 90 | drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff); |
| 91 | |
| 92 | if (!dev_priv->status_page_dmah) { |
| 93 | DRM_ERROR("Can not allocate hardware status page\n"); |
| 94 | return -ENOMEM; |
| 95 | } |
| 96 | dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr; |
| 97 | dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr; |
| 98 | |
| 99 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); |
| 100 | |
| 101 | I915_WRITE(HWS_PGA, dev_priv->dma_status_page); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 102 | DRM_DEBUG_DRIVER("Enabled hardware status page\n"); |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 103 | return 0; |
| 104 | } |
| 105 | |
| 106 | /** |
| 107 | * Frees the hardware status page, whether it's a physical address or a virtual |
| 108 | * address set up by the X Server. |
| 109 | */ |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 110 | static void i915_free_hws(struct drm_device *dev) |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 111 | { |
| 112 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 113 | if (dev_priv->status_page_dmah) { |
| 114 | drm_pci_free(dev, dev_priv->status_page_dmah); |
| 115 | dev_priv->status_page_dmah = NULL; |
| 116 | } |
| 117 | |
| 118 | if (dev_priv->status_gfx_addr) { |
| 119 | dev_priv->status_gfx_addr = 0; |
| 120 | drm_core_ioremapfree(&dev_priv->hws_map, dev); |
| 121 | } |
| 122 | |
| 123 | /* Need to rewrite hardware status page */ |
| 124 | I915_WRITE(HWS_PGA, 0x1ffff000); |
| 125 | } |
| 126 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 127 | void i915_kernel_lost_context(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | { |
| 129 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 130 | struct drm_i915_master_private *master_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | drm_i915_ring_buffer_t *ring = &(dev_priv->ring); |
| 132 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 133 | /* |
| 134 | * We should never lose context on the ring with modesetting |
| 135 | * as we don't expose it to userspace |
| 136 | */ |
| 137 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
| 138 | return; |
| 139 | |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 140 | ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR; |
| 141 | ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | ring->space = ring->head - (ring->tail + 8); |
| 143 | if (ring->space < 0) |
| 144 | ring->space += ring->Size; |
| 145 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 146 | if (!dev->primary->master) |
| 147 | return; |
| 148 | |
| 149 | master_priv = dev->primary->master->driver_priv; |
| 150 | if (ring->head == ring->tail && master_priv->sarea_priv) |
| 151 | master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | } |
| 153 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 154 | static int i915_dma_cleanup(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 156 | drm_i915_private_t *dev_priv = dev->dev_private; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | /* Make sure interrupts are disabled here because the uninstall ioctl |
| 158 | * may not have been called from userspace and after dev_private |
| 159 | * is freed, it's too late. |
| 160 | */ |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 161 | if (dev->irq_enabled) |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 162 | drm_irq_uninstall(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 164 | if (dev_priv->ring.virtual_start) { |
| 165 | drm_core_ioremapfree(&dev_priv->ring.map, dev); |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 166 | dev_priv->ring.virtual_start = NULL; |
| 167 | dev_priv->ring.map.handle = NULL; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 168 | dev_priv->ring.map.size = 0; |
| 169 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 171 | /* Clear the HWS virtual address at teardown */ |
| 172 | if (I915_NEED_GFX_HWS(dev)) |
| 173 | i915_free_hws(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | |
| 175 | return 0; |
| 176 | } |
| 177 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 178 | static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 180 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 181 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | |
Dave Airlie | 3a03ac1 | 2009-01-11 09:03:49 +1000 | [diff] [blame] | 183 | master_priv->sarea = drm_getsarea(dev); |
| 184 | if (master_priv->sarea) { |
| 185 | master_priv->sarea_priv = (drm_i915_sarea_t *) |
| 186 | ((u8 *)master_priv->sarea->handle + init->sarea_priv_offset); |
| 187 | } else { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 188 | DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n"); |
Dave Airlie | 3a03ac1 | 2009-01-11 09:03:49 +1000 | [diff] [blame] | 189 | } |
| 190 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 191 | if (init->ring_size != 0) { |
| 192 | if (dev_priv->ring.ring_obj != NULL) { |
| 193 | i915_dma_cleanup(dev); |
| 194 | DRM_ERROR("Client tried to initialize ringbuffer in " |
| 195 | "GEM mode\n"); |
| 196 | return -EINVAL; |
| 197 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 199 | dev_priv->ring.Size = init->ring_size; |
| 200 | dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 202 | dev_priv->ring.map.offset = init->ring_start; |
| 203 | dev_priv->ring.map.size = init->ring_size; |
| 204 | dev_priv->ring.map.type = 0; |
| 205 | dev_priv->ring.map.flags = 0; |
| 206 | dev_priv->ring.map.mtrr = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | |
Jesse Barnes | 6fb8858 | 2009-02-23 10:08:21 +1000 | [diff] [blame] | 208 | drm_core_ioremap_wc(&dev_priv->ring.map, dev); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 209 | |
| 210 | if (dev_priv->ring.map.handle == NULL) { |
| 211 | i915_dma_cleanup(dev); |
| 212 | DRM_ERROR("can not ioremap virtual address for" |
| 213 | " ring buffer\n"); |
| 214 | return -ENOMEM; |
| 215 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | dev_priv->ring.virtual_start = dev_priv->ring.map.handle; |
| 219 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 220 | dev_priv->cpp = init->cpp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | dev_priv->back_offset = init->back_offset; |
| 222 | dev_priv->front_offset = init->front_offset; |
| 223 | dev_priv->current_page = 0; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 224 | if (master_priv->sarea_priv) |
| 225 | master_priv->sarea_priv->pf_current_page = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | /* Allow hardware batchbuffers unless told otherwise. |
| 228 | */ |
| 229 | dev_priv->allow_batchbuffer = 1; |
| 230 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | return 0; |
| 232 | } |
| 233 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 234 | static int i915_dma_resume(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | { |
| 236 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 237 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 238 | DRM_DEBUG_DRIVER("%s\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | if (dev_priv->ring.map.handle == NULL) { |
| 241 | DRM_ERROR("can not ioremap virtual address for" |
| 242 | " ring buffer\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 243 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | } |
| 245 | |
| 246 | /* Program Hardware Status Page */ |
| 247 | if (!dev_priv->hw_status_page) { |
| 248 | DRM_ERROR("Can not find hardware status page\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 249 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | } |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 251 | DRM_DEBUG_DRIVER("hw status page @ %p\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 252 | dev_priv->hw_status_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 254 | if (dev_priv->status_gfx_addr != 0) |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 255 | I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 256 | else |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 257 | I915_WRITE(HWS_PGA, dev_priv->dma_status_page); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 258 | DRM_DEBUG_DRIVER("Enabled hardware status page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | |
| 260 | return 0; |
| 261 | } |
| 262 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 263 | static int i915_dma_init(struct drm_device *dev, void *data, |
| 264 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | { |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 266 | drm_i915_init_t *init = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | int retcode = 0; |
| 268 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 269 | switch (init->func) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | case I915_INIT_DMA: |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 271 | retcode = i915_initialize(dev, init); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | break; |
| 273 | case I915_CLEANUP_DMA: |
| 274 | retcode = i915_dma_cleanup(dev); |
| 275 | break; |
| 276 | case I915_RESUME_DMA: |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 277 | retcode = i915_dma_resume(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | break; |
| 279 | default: |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 280 | retcode = -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | break; |
| 282 | } |
| 283 | |
| 284 | return retcode; |
| 285 | } |
| 286 | |
| 287 | /* Implement basically the same security restrictions as hardware does |
| 288 | * for MI_BATCH_NON_SECURE. These can be made stricter at any time. |
| 289 | * |
| 290 | * Most of the calculations below involve calculating the size of a |
| 291 | * particular instruction. It's important to get the size right as |
| 292 | * that tells us where the next instruction to check is. Any illegal |
| 293 | * instruction detected will be given a size of zero, which is a |
| 294 | * signal to abort the rest of the buffer. |
| 295 | */ |
| 296 | static int do_validate_cmd(int cmd) |
| 297 | { |
| 298 | switch (((cmd >> 29) & 0x7)) { |
| 299 | case 0x0: |
| 300 | switch ((cmd >> 23) & 0x3f) { |
| 301 | case 0x0: |
| 302 | return 1; /* MI_NOOP */ |
| 303 | case 0x4: |
| 304 | return 1; /* MI_FLUSH */ |
| 305 | default: |
| 306 | return 0; /* disallow everything else */ |
| 307 | } |
| 308 | break; |
| 309 | case 0x1: |
| 310 | return 0; /* reserved */ |
| 311 | case 0x2: |
| 312 | return (cmd & 0xff) + 2; /* 2d commands */ |
| 313 | case 0x3: |
| 314 | if (((cmd >> 24) & 0x1f) <= 0x18) |
| 315 | return 1; |
| 316 | |
| 317 | switch ((cmd >> 24) & 0x1f) { |
| 318 | case 0x1c: |
| 319 | return 1; |
| 320 | case 0x1d: |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 321 | switch ((cmd >> 16) & 0xff) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | case 0x3: |
| 323 | return (cmd & 0x1f) + 2; |
| 324 | case 0x4: |
| 325 | return (cmd & 0xf) + 2; |
| 326 | default: |
| 327 | return (cmd & 0xffff) + 2; |
| 328 | } |
| 329 | case 0x1e: |
| 330 | if (cmd & (1 << 23)) |
| 331 | return (cmd & 0xffff) + 1; |
| 332 | else |
| 333 | return 1; |
| 334 | case 0x1f: |
| 335 | if ((cmd & (1 << 23)) == 0) /* inline vertices */ |
| 336 | return (cmd & 0x1ffff) + 2; |
| 337 | else if (cmd & (1 << 17)) /* indirect random */ |
| 338 | if ((cmd & 0xffff) == 0) |
| 339 | return 0; /* unknown length, too hard */ |
| 340 | else |
| 341 | return (((cmd & 0xffff) + 1) / 2) + 1; |
| 342 | else |
| 343 | return 2; /* indirect sequential */ |
| 344 | default: |
| 345 | return 0; |
| 346 | } |
| 347 | default: |
| 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | return 0; |
| 352 | } |
| 353 | |
| 354 | static int validate_cmd(int cmd) |
| 355 | { |
| 356 | int ret = do_validate_cmd(cmd); |
| 357 | |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 358 | /* printk("validate_cmd( %x ): %d\n", cmd, ret); */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 359 | |
| 360 | return ret; |
| 361 | } |
| 362 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 363 | static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 364 | { |
| 365 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 366 | int i; |
| 367 | RING_LOCALS; |
| 368 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 369 | if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8) |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 370 | return -EINVAL; |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 371 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 372 | BEGIN_LP_RING((dwords+1)&~1); |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 373 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | for (i = 0; i < dwords;) { |
| 375 | int cmd, sz; |
| 376 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 377 | cmd = buffer[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords) |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 380 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 382 | OUT_RING(cmd); |
| 383 | |
| 384 | while (++i, --sz) { |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 385 | OUT_RING(buffer[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | } |
| 388 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 389 | if (dwords & 1) |
| 390 | OUT_RING(0); |
| 391 | |
| 392 | ADVANCE_LP_RING(); |
| 393 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | return 0; |
| 395 | } |
| 396 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 397 | int |
| 398 | i915_emit_box(struct drm_device *dev, |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 399 | struct drm_clip_rect *boxes, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 400 | int i, int DR1, int DR4) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | { |
| 402 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 403 | struct drm_clip_rect box = boxes[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | RING_LOCALS; |
| 405 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) { |
| 407 | DRM_ERROR("Bad box %d,%d..%d,%d\n", |
| 408 | box.x1, box.y1, box.x2, box.y2); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 409 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | } |
| 411 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 412 | if (IS_I965G(dev)) { |
| 413 | BEGIN_LP_RING(4); |
| 414 | OUT_RING(GFX_OP_DRAWRECT_INFO_I965); |
| 415 | OUT_RING((box.x1 & 0xffff) | (box.y1 << 16)); |
Andrew Morton | 78eca43 | 2006-08-16 09:15:51 +1000 | [diff] [blame] | 416 | OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16)); |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 417 | OUT_RING(DR4); |
| 418 | ADVANCE_LP_RING(); |
| 419 | } else { |
| 420 | BEGIN_LP_RING(6); |
| 421 | OUT_RING(GFX_OP_DRAWRECT_INFO); |
| 422 | OUT_RING(DR1); |
| 423 | OUT_RING((box.x1 & 0xffff) | (box.y1 << 16)); |
| 424 | OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16)); |
| 425 | OUT_RING(DR4); |
| 426 | OUT_RING(0); |
| 427 | ADVANCE_LP_RING(); |
| 428 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | |
| 430 | return 0; |
| 431 | } |
| 432 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 433 | /* XXX: Emitting the counter should really be moved to part of the IRQ |
| 434 | * emit. For now, do it in both places: |
| 435 | */ |
| 436 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 437 | static void i915_emit_breadcrumb(struct drm_device *dev) |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 438 | { |
| 439 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 440 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 441 | RING_LOCALS; |
| 442 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 443 | dev_priv->counter++; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 444 | if (dev_priv->counter > 0x7FFFFFFFUL) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 445 | dev_priv->counter = 0; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 446 | if (master_priv->sarea_priv) |
| 447 | master_priv->sarea_priv->last_enqueue = dev_priv->counter; |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 448 | |
| 449 | BEGIN_LP_RING(4); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 450 | OUT_RING(MI_STORE_DWORD_INDEX); |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 451 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 452 | OUT_RING(dev_priv->counter); |
| 453 | OUT_RING(0); |
| 454 | ADVANCE_LP_RING(); |
| 455 | } |
| 456 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 457 | static int i915_dispatch_cmdbuffer(struct drm_device * dev, |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 458 | drm_i915_cmdbuffer_t *cmd, |
| 459 | struct drm_clip_rect *cliprects, |
| 460 | void *cmdbuf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | { |
| 462 | int nbox = cmd->num_cliprects; |
| 463 | int i = 0, count, ret; |
| 464 | |
| 465 | if (cmd->sz & 0x3) { |
| 466 | DRM_ERROR("alignment"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 467 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | } |
| 469 | |
| 470 | i915_kernel_lost_context(dev); |
| 471 | |
| 472 | count = nbox ? nbox : 1; |
| 473 | |
| 474 | for (i = 0; i < count; i++) { |
| 475 | if (i < nbox) { |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 476 | ret = i915_emit_box(dev, cliprects, i, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | cmd->DR1, cmd->DR4); |
| 478 | if (ret) |
| 479 | return ret; |
| 480 | } |
| 481 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 482 | ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 483 | if (ret) |
| 484 | return ret; |
| 485 | } |
| 486 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 487 | i915_emit_breadcrumb(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | return 0; |
| 489 | } |
| 490 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 491 | static int i915_dispatch_batchbuffer(struct drm_device * dev, |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 492 | drm_i915_batchbuffer_t * batch, |
| 493 | struct drm_clip_rect *cliprects) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | { |
| 495 | drm_i915_private_t *dev_priv = dev->dev_private; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | int nbox = batch->num_cliprects; |
| 497 | int i = 0, count; |
| 498 | RING_LOCALS; |
| 499 | |
| 500 | if ((batch->start | batch->used) & 0x7) { |
| 501 | DRM_ERROR("alignment"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 502 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | } |
| 504 | |
| 505 | i915_kernel_lost_context(dev); |
| 506 | |
| 507 | count = nbox ? nbox : 1; |
| 508 | |
| 509 | for (i = 0; i < count; i++) { |
| 510 | if (i < nbox) { |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 511 | int ret = i915_emit_box(dev, cliprects, i, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | batch->DR1, batch->DR4); |
| 513 | if (ret) |
| 514 | return ret; |
| 515 | } |
| 516 | |
Keith Packard | 0790d5e | 2008-07-30 12:28:47 -0700 | [diff] [blame] | 517 | if (!IS_I830(dev) && !IS_845G(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | BEGIN_LP_RING(2); |
Dave Airlie | 21f1628 | 2007-08-07 09:09:51 +1000 | [diff] [blame] | 519 | if (IS_I965G(dev)) { |
| 520 | OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965); |
| 521 | OUT_RING(batch->start); |
| 522 | } else { |
| 523 | OUT_RING(MI_BATCH_BUFFER_START | (2 << 6)); |
| 524 | OUT_RING(batch->start | MI_BATCH_NON_SECURE); |
| 525 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 526 | ADVANCE_LP_RING(); |
| 527 | } else { |
| 528 | BEGIN_LP_RING(4); |
| 529 | OUT_RING(MI_BATCH_BUFFER); |
| 530 | OUT_RING(batch->start | MI_BATCH_NON_SECURE); |
| 531 | OUT_RING(batch->start + batch->used - 4); |
| 532 | OUT_RING(0); |
| 533 | ADVANCE_LP_RING(); |
| 534 | } |
| 535 | } |
| 536 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 537 | i915_emit_breadcrumb(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | |
| 539 | return 0; |
| 540 | } |
| 541 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 542 | static int i915_dispatch_flip(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | { |
| 544 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 545 | struct drm_i915_master_private *master_priv = |
| 546 | dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 547 | RING_LOCALS; |
| 548 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 549 | if (!master_priv->sarea_priv) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 550 | return -EINVAL; |
| 551 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 552 | DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 553 | __func__, |
| 554 | dev_priv->current_page, |
| 555 | master_priv->sarea_priv->pf_current_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 556 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 557 | i915_kernel_lost_context(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 559 | BEGIN_LP_RING(2); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 560 | OUT_RING(MI_FLUSH | MI_READ_FLUSH); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 561 | OUT_RING(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | ADVANCE_LP_RING(); |
| 563 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 564 | BEGIN_LP_RING(6); |
| 565 | OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP); |
| 566 | OUT_RING(0); |
| 567 | if (dev_priv->current_page == 0) { |
| 568 | OUT_RING(dev_priv->back_offset); |
| 569 | dev_priv->current_page = 1; |
| 570 | } else { |
| 571 | OUT_RING(dev_priv->front_offset); |
| 572 | dev_priv->current_page = 0; |
| 573 | } |
| 574 | OUT_RING(0); |
| 575 | ADVANCE_LP_RING(); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 576 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 577 | BEGIN_LP_RING(2); |
| 578 | OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); |
| 579 | OUT_RING(0); |
| 580 | ADVANCE_LP_RING(); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 581 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 582 | master_priv->sarea_priv->last_enqueue = dev_priv->counter++; |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 583 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 584 | BEGIN_LP_RING(4); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 585 | OUT_RING(MI_STORE_DWORD_INDEX); |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 586 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 587 | OUT_RING(dev_priv->counter); |
| 588 | OUT_RING(0); |
| 589 | ADVANCE_LP_RING(); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 590 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 591 | master_priv->sarea_priv->pf_current_page = dev_priv->current_page; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 592 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | } |
| 594 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 595 | static int i915_quiescent(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | { |
| 597 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 598 | |
| 599 | i915_kernel_lost_context(dev); |
Harvey Harrison | bf9d892 | 2008-04-30 00:55:10 -0700 | [diff] [blame] | 600 | return i915_wait_ring(dev, dev_priv->ring.Size - 8, __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | } |
| 602 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 603 | static int i915_flush_ioctl(struct drm_device *dev, void *data, |
| 604 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | { |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 606 | int ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 608 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
| 609 | |
| 610 | mutex_lock(&dev->struct_mutex); |
| 611 | ret = i915_quiescent(dev); |
| 612 | mutex_unlock(&dev->struct_mutex); |
| 613 | |
| 614 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | } |
| 616 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 617 | static int i915_batchbuffer(struct drm_device *dev, void *data, |
| 618 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 619 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 621 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 622 | drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 623 | master_priv->sarea_priv; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 624 | drm_i915_batchbuffer_t *batch = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | int ret; |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 626 | struct drm_clip_rect *cliprects = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | |
| 628 | if (!dev_priv->allow_batchbuffer) { |
| 629 | DRM_ERROR("Batchbuffer ioctl disabled\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 630 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | } |
| 632 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 633 | DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 634 | batch->start, batch->used, batch->num_cliprects); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 636 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 638 | if (batch->num_cliprects < 0) |
| 639 | return -EINVAL; |
| 640 | |
| 641 | if (batch->num_cliprects) { |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 642 | cliprects = kcalloc(batch->num_cliprects, |
| 643 | sizeof(struct drm_clip_rect), |
| 644 | GFP_KERNEL); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 645 | if (cliprects == NULL) |
| 646 | return -ENOMEM; |
| 647 | |
| 648 | ret = copy_from_user(cliprects, batch->cliprects, |
| 649 | batch->num_cliprects * |
| 650 | sizeof(struct drm_clip_rect)); |
| 651 | if (ret != 0) |
| 652 | goto fail_free; |
| 653 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 655 | mutex_lock(&dev->struct_mutex); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 656 | ret = i915_dispatch_batchbuffer(dev, batch, cliprects); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 657 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 659 | if (sarea_priv) |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 660 | sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 661 | |
| 662 | fail_free: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 663 | kfree(cliprects); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 664 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 665 | return ret; |
| 666 | } |
| 667 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 668 | static int i915_cmdbuffer(struct drm_device *dev, void *data, |
| 669 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 672 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 674 | master_priv->sarea_priv; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 675 | drm_i915_cmdbuffer_t *cmdbuf = data; |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 676 | struct drm_clip_rect *cliprects = NULL; |
| 677 | void *batch_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | int ret; |
| 679 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 680 | DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 681 | cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 683 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 684 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 685 | if (cmdbuf->num_cliprects < 0) |
| 686 | return -EINVAL; |
| 687 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 688 | batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 689 | if (batch_data == NULL) |
| 690 | return -ENOMEM; |
| 691 | |
| 692 | ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz); |
| 693 | if (ret != 0) |
| 694 | goto fail_batch_free; |
| 695 | |
| 696 | if (cmdbuf->num_cliprects) { |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 697 | cliprects = kcalloc(cmdbuf->num_cliprects, |
| 698 | sizeof(struct drm_clip_rect), GFP_KERNEL); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 699 | if (cliprects == NULL) |
| 700 | goto fail_batch_free; |
| 701 | |
| 702 | ret = copy_from_user(cliprects, cmdbuf->cliprects, |
| 703 | cmdbuf->num_cliprects * |
| 704 | sizeof(struct drm_clip_rect)); |
| 705 | if (ret != 0) |
| 706 | goto fail_clip_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | } |
| 708 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 709 | mutex_lock(&dev->struct_mutex); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 710 | ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 711 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | if (ret) { |
| 713 | DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); |
Chris Wright | 355d7f3 | 2009-04-17 01:18:55 +0000 | [diff] [blame] | 714 | goto fail_clip_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | } |
| 716 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 717 | if (sarea_priv) |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 718 | sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 719 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 720 | fail_clip_free: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 721 | kfree(cliprects); |
Chris Wright | 355d7f3 | 2009-04-17 01:18:55 +0000 | [diff] [blame] | 722 | fail_batch_free: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 723 | kfree(batch_data); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 724 | |
| 725 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | } |
| 727 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 728 | static int i915_flip_bufs(struct drm_device *dev, void *data, |
| 729 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | { |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 731 | int ret; |
| 732 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 733 | DRM_DEBUG_DRIVER("%s\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 735 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 737 | mutex_lock(&dev->struct_mutex); |
| 738 | ret = i915_dispatch_flip(dev); |
| 739 | mutex_unlock(&dev->struct_mutex); |
| 740 | |
| 741 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | } |
| 743 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 744 | static int i915_getparam(struct drm_device *dev, void *data, |
| 745 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 748 | drm_i915_getparam_t *param = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | int value; |
| 750 | |
| 751 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 752 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 753 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | } |
| 755 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 756 | switch (param->param) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | case I915_PARAM_IRQ_ACTIVE: |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 758 | value = dev->pdev->irq ? 1 : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | break; |
| 760 | case I915_PARAM_ALLOW_BATCHBUFFER: |
| 761 | value = dev_priv->allow_batchbuffer ? 1 : 0; |
| 762 | break; |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 763 | case I915_PARAM_LAST_DISPATCH: |
| 764 | value = READ_BREADCRUMB(dev_priv); |
| 765 | break; |
Kristian Høgsberg | ed4c9c4 | 2008-08-20 11:08:52 -0400 | [diff] [blame] | 766 | case I915_PARAM_CHIPSET_ID: |
| 767 | value = dev->pci_device; |
| 768 | break; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 769 | case I915_PARAM_HAS_GEM: |
Dave Airlie | ac5c4e7 | 2008-12-19 15:38:34 +1000 | [diff] [blame] | 770 | value = dev_priv->has_gem; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 771 | break; |
Jesse Barnes | 0f973f2 | 2009-01-26 17:10:45 -0800 | [diff] [blame] | 772 | case I915_PARAM_NUM_FENCES_AVAIL: |
| 773 | value = dev_priv->num_fence_regs - dev_priv->fence_reg_start; |
| 774 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 775 | default: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 776 | DRM_DEBUG_DRIVER("Unknown parameter %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 777 | param->param); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 778 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | } |
| 780 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 781 | if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 782 | DRM_ERROR("DRM_COPY_TO_USER failed\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 783 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | } |
| 785 | |
| 786 | return 0; |
| 787 | } |
| 788 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 789 | static int i915_setparam(struct drm_device *dev, void *data, |
| 790 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 793 | drm_i915_setparam_t *param = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
| 795 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 796 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 797 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | } |
| 799 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 800 | switch (param->param) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | case I915_SETPARAM_USE_MI_BATCHBUFFER_START: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 802 | break; |
| 803 | case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 804 | dev_priv->tex_lru_log_granularity = param->value; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | break; |
| 806 | case I915_SETPARAM_ALLOW_BATCHBUFFER: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 807 | dev_priv->allow_batchbuffer = param->value; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | break; |
Jesse Barnes | 0f973f2 | 2009-01-26 17:10:45 -0800 | [diff] [blame] | 809 | case I915_SETPARAM_NUM_USED_FENCES: |
| 810 | if (param->value > dev_priv->num_fence_regs || |
| 811 | param->value < 0) |
| 812 | return -EINVAL; |
| 813 | /* Userspace can use first N regs */ |
| 814 | dev_priv->fence_reg_start = param->value; |
| 815 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 816 | default: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 817 | DRM_DEBUG_DRIVER("unknown parameter %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 818 | param->param); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 819 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | } |
| 821 | |
| 822 | return 0; |
| 823 | } |
| 824 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 825 | static int i915_set_status_page(struct drm_device *dev, void *data, |
| 826 | struct drm_file *file_priv) |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 827 | { |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 828 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 829 | drm_i915_hws_addr_t *hws = data; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 830 | |
Zhenyu Wang | b39d50e | 2008-02-19 20:59:09 +1000 | [diff] [blame] | 831 | if (!I915_NEED_GFX_HWS(dev)) |
| 832 | return -EINVAL; |
| 833 | |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 834 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 835 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 836 | return -EINVAL; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 837 | } |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 838 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 839 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 840 | WARN(1, "tried to set status page when mode setting active\n"); |
| 841 | return 0; |
| 842 | } |
| 843 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 844 | DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 845 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 846 | dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12); |
| 847 | |
Eric Anholt | 8b40958 | 2007-11-22 16:40:37 +1000 | [diff] [blame] | 848 | dev_priv->hws_map.offset = dev->agp->base + hws->addr; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 849 | dev_priv->hws_map.size = 4*1024; |
| 850 | dev_priv->hws_map.type = 0; |
| 851 | dev_priv->hws_map.flags = 0; |
| 852 | dev_priv->hws_map.mtrr = 0; |
| 853 | |
Dave Airlie | dd0910b | 2009-02-25 14:49:21 +1000 | [diff] [blame] | 854 | drm_core_ioremap_wc(&dev_priv->hws_map, dev); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 855 | if (dev_priv->hws_map.handle == NULL) { |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 856 | i915_dma_cleanup(dev); |
| 857 | dev_priv->status_gfx_addr = 0; |
| 858 | DRM_ERROR("can not ioremap virtual address for" |
| 859 | " G33 hw status page\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 860 | return -ENOMEM; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 861 | } |
| 862 | dev_priv->hw_status_page = dev_priv->hws_map.handle; |
| 863 | |
| 864 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 865 | I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 866 | DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 867 | dev_priv->status_gfx_addr); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 868 | DRM_DEBUG_DRIVER("load hws at %p\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 869 | dev_priv->hw_status_page); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 870 | return 0; |
| 871 | } |
| 872 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 873 | /** |
| 874 | * i915_probe_agp - get AGP bootup configuration |
| 875 | * @pdev: PCI device |
| 876 | * @aperture_size: returns AGP aperture configured size |
| 877 | * @preallocated_size: returns size of BIOS preallocated AGP space |
| 878 | * |
| 879 | * Since Intel integrated graphics are UMA, the BIOS has to set aside |
| 880 | * some RAM for the framebuffer at early boot. This code figures out |
| 881 | * how much was set aside so we can use it for our own purposes. |
| 882 | */ |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 883 | static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size, |
| 884 | uint32_t *preallocated_size) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 885 | { |
| 886 | struct pci_dev *bridge_dev; |
| 887 | u16 tmp = 0; |
| 888 | unsigned long overhead; |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 889 | unsigned long stolen; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 890 | |
| 891 | bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); |
| 892 | if (!bridge_dev) { |
| 893 | DRM_ERROR("bridge device not found\n"); |
| 894 | return -1; |
| 895 | } |
| 896 | |
| 897 | /* Get the fb aperture size and "stolen" memory amount. */ |
| 898 | pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp); |
| 899 | pci_dev_put(bridge_dev); |
| 900 | |
| 901 | *aperture_size = 1024 * 1024; |
| 902 | *preallocated_size = 1024 * 1024; |
| 903 | |
Eric Anholt | 60fd99e | 2008-12-03 22:50:02 -0800 | [diff] [blame] | 904 | switch (dev->pdev->device) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 905 | case PCI_DEVICE_ID_INTEL_82830_CGC: |
| 906 | case PCI_DEVICE_ID_INTEL_82845G_IG: |
| 907 | case PCI_DEVICE_ID_INTEL_82855GM_IG: |
| 908 | case PCI_DEVICE_ID_INTEL_82865_IG: |
| 909 | if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M) |
| 910 | *aperture_size *= 64; |
| 911 | else |
| 912 | *aperture_size *= 128; |
| 913 | break; |
| 914 | default: |
| 915 | /* 9xx supports large sizes, just look at the length */ |
Eric Anholt | 60fd99e | 2008-12-03 22:50:02 -0800 | [diff] [blame] | 916 | *aperture_size = pci_resource_len(dev->pdev, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 917 | break; |
| 918 | } |
| 919 | |
| 920 | /* |
| 921 | * Some of the preallocated space is taken by the GTT |
| 922 | * and popup. GTT is 1K per MB of aperture size, and popup is 4K. |
| 923 | */ |
Zhenyu Wang | 2c07245 | 2009-06-05 15:38:42 +0800 | [diff] [blame] | 924 | if (IS_G4X(dev) || IS_IGD(dev) || IS_IGDNG(dev)) |
Eric Anholt | 60fd99e | 2008-12-03 22:50:02 -0800 | [diff] [blame] | 925 | overhead = 4096; |
| 926 | else |
| 927 | overhead = (*aperture_size / 1024) + 4096; |
| 928 | |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 929 | switch (tmp & INTEL_GMCH_GMS_MASK) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 930 | case INTEL_855_GMCH_GMS_DISABLED: |
| 931 | DRM_ERROR("video memory is disabled\n"); |
| 932 | return -1; |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 933 | case INTEL_855_GMCH_GMS_STOLEN_1M: |
| 934 | stolen = 1 * 1024 * 1024; |
| 935 | break; |
| 936 | case INTEL_855_GMCH_GMS_STOLEN_4M: |
| 937 | stolen = 4 * 1024 * 1024; |
| 938 | break; |
| 939 | case INTEL_855_GMCH_GMS_STOLEN_8M: |
| 940 | stolen = 8 * 1024 * 1024; |
| 941 | break; |
| 942 | case INTEL_855_GMCH_GMS_STOLEN_16M: |
| 943 | stolen = 16 * 1024 * 1024; |
| 944 | break; |
| 945 | case INTEL_855_GMCH_GMS_STOLEN_32M: |
| 946 | stolen = 32 * 1024 * 1024; |
| 947 | break; |
| 948 | case INTEL_915G_GMCH_GMS_STOLEN_48M: |
| 949 | stolen = 48 * 1024 * 1024; |
| 950 | break; |
| 951 | case INTEL_915G_GMCH_GMS_STOLEN_64M: |
| 952 | stolen = 64 * 1024 * 1024; |
| 953 | break; |
| 954 | case INTEL_GMCH_GMS_STOLEN_128M: |
| 955 | stolen = 128 * 1024 * 1024; |
| 956 | break; |
| 957 | case INTEL_GMCH_GMS_STOLEN_256M: |
| 958 | stolen = 256 * 1024 * 1024; |
| 959 | break; |
| 960 | case INTEL_GMCH_GMS_STOLEN_96M: |
| 961 | stolen = 96 * 1024 * 1024; |
| 962 | break; |
| 963 | case INTEL_GMCH_GMS_STOLEN_160M: |
| 964 | stolen = 160 * 1024 * 1024; |
| 965 | break; |
| 966 | case INTEL_GMCH_GMS_STOLEN_224M: |
| 967 | stolen = 224 * 1024 * 1024; |
| 968 | break; |
| 969 | case INTEL_GMCH_GMS_STOLEN_352M: |
| 970 | stolen = 352 * 1024 * 1024; |
| 971 | break; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 972 | default: |
| 973 | DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n", |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 974 | tmp & INTEL_GMCH_GMS_MASK); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 975 | return -1; |
| 976 | } |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 977 | *preallocated_size = stolen - overhead; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 978 | |
| 979 | return 0; |
| 980 | } |
| 981 | |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 982 | static int i915_load_modeset_init(struct drm_device *dev, |
| 983 | unsigned long prealloc_size, |
| 984 | unsigned long agp_size) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 985 | { |
| 986 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 987 | int fb_bar = IS_I9XX(dev) ? 2 : 0; |
| 988 | int ret = 0; |
| 989 | |
| 990 | dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & |
| 991 | 0xff000000; |
| 992 | |
Jesse Barnes | 2906f02 | 2009-01-20 19:10:54 -0800 | [diff] [blame] | 993 | if (IS_MOBILE(dev) || IS_I9XX(dev)) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 994 | dev_priv->cursor_needs_physical = true; |
| 995 | else |
| 996 | dev_priv->cursor_needs_physical = false; |
| 997 | |
Jesse Barnes | 2906f02 | 2009-01-20 19:10:54 -0800 | [diff] [blame] | 998 | if (IS_I965G(dev) || IS_G33(dev)) |
| 999 | dev_priv->cursor_needs_physical = false; |
| 1000 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1001 | /* Basic memrange allocator for stolen space (aka vram) */ |
| 1002 | drm_mm_init(&dev_priv->vram, 0, prealloc_size); |
| 1003 | |
Eric Anholt | 13f4c43 | 2009-05-12 15:27:36 -0700 | [diff] [blame] | 1004 | /* Let GEM Manage from end of prealloc space to end of aperture. |
| 1005 | * |
| 1006 | * However, leave one page at the end still bound to the scratch page. |
| 1007 | * There are a number of places where the hardware apparently |
| 1008 | * prefetches past the end of the object, and we've seen multiple |
| 1009 | * hangs with the GPU head pointer stuck in a batchbuffer bound |
| 1010 | * at the last page of the aperture. One page should be enough to |
| 1011 | * keep any prefetching inside of the aperture. |
| 1012 | */ |
| 1013 | i915_gem_do_init(dev, prealloc_size, agp_size - 4096); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1014 | |
| 1015 | ret = i915_gem_init_ringbuffer(dev); |
| 1016 | if (ret) |
Dave Airlie | b8da7de | 2009-06-02 16:50:35 +1000 | [diff] [blame] | 1017 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1018 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1019 | /* Allow hardware batchbuffers unless told otherwise. |
| 1020 | */ |
| 1021 | dev_priv->allow_batchbuffer = 1; |
| 1022 | |
| 1023 | ret = intel_init_bios(dev); |
| 1024 | if (ret) |
| 1025 | DRM_INFO("failed to find VBIOS tables\n"); |
| 1026 | |
| 1027 | ret = drm_irq_install(dev); |
| 1028 | if (ret) |
| 1029 | goto destroy_ringbuffer; |
| 1030 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1031 | /* Always safe in the mode setting case. */ |
| 1032 | /* FIXME: do pre/post-mode set stuff in core KMS code */ |
| 1033 | dev->vblank_disable_allowed = 1; |
| 1034 | |
| 1035 | /* |
| 1036 | * Initialize the hardware status page IRQ location. |
| 1037 | */ |
| 1038 | |
| 1039 | I915_WRITE(INSTPM, (1 << 5) | (1 << 21)); |
| 1040 | |
| 1041 | intel_modeset_init(dev); |
| 1042 | |
Jesse Barnes | 7a1fb5d | 2009-03-27 13:05:19 -0700 | [diff] [blame] | 1043 | drm_helper_initial_config(dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1044 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1045 | return 0; |
| 1046 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1047 | destroy_ringbuffer: |
| 1048 | i915_gem_cleanup_ringbuffer(dev); |
| 1049 | out: |
| 1050 | return ret; |
| 1051 | } |
| 1052 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 1053 | int i915_master_create(struct drm_device *dev, struct drm_master *master) |
| 1054 | { |
| 1055 | struct drm_i915_master_private *master_priv; |
| 1056 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1057 | master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL); |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 1058 | if (!master_priv) |
| 1059 | return -ENOMEM; |
| 1060 | |
| 1061 | master->driver_priv = master_priv; |
| 1062 | return 0; |
| 1063 | } |
| 1064 | |
| 1065 | void i915_master_destroy(struct drm_device *dev, struct drm_master *master) |
| 1066 | { |
| 1067 | struct drm_i915_master_private *master_priv = master->driver_priv; |
| 1068 | |
| 1069 | if (!master_priv) |
| 1070 | return; |
| 1071 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1072 | kfree(master_priv); |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 1073 | |
| 1074 | master->driver_priv = NULL; |
| 1075 | } |
| 1076 | |
Shaohua Li | 7662c8b | 2009-06-26 11:23:55 +0800 | [diff] [blame] | 1077 | static void i915_get_mem_freq(struct drm_device *dev) |
| 1078 | { |
| 1079 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1080 | u32 tmp; |
| 1081 | |
| 1082 | if (!IS_IGD(dev)) |
| 1083 | return; |
| 1084 | |
| 1085 | tmp = I915_READ(CLKCFG); |
| 1086 | |
| 1087 | switch (tmp & CLKCFG_FSB_MASK) { |
| 1088 | case CLKCFG_FSB_533: |
| 1089 | dev_priv->fsb_freq = 533; /* 133*4 */ |
| 1090 | break; |
| 1091 | case CLKCFG_FSB_800: |
| 1092 | dev_priv->fsb_freq = 800; /* 200*4 */ |
| 1093 | break; |
| 1094 | case CLKCFG_FSB_667: |
| 1095 | dev_priv->fsb_freq = 667; /* 167*4 */ |
| 1096 | break; |
| 1097 | case CLKCFG_FSB_400: |
| 1098 | dev_priv->fsb_freq = 400; /* 100*4 */ |
| 1099 | break; |
| 1100 | } |
| 1101 | |
| 1102 | switch (tmp & CLKCFG_MEM_MASK) { |
| 1103 | case CLKCFG_MEM_533: |
| 1104 | dev_priv->mem_freq = 533; |
| 1105 | break; |
| 1106 | case CLKCFG_MEM_667: |
| 1107 | dev_priv->mem_freq = 667; |
| 1108 | break; |
| 1109 | case CLKCFG_MEM_800: |
| 1110 | dev_priv->mem_freq = 800; |
| 1111 | break; |
| 1112 | } |
| 1113 | } |
| 1114 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1115 | /** |
| 1116 | * i915_driver_load - setup chip and create an initial config |
| 1117 | * @dev: DRM device |
| 1118 | * @flags: startup flags |
| 1119 | * |
| 1120 | * The driver load routine has to do several things: |
| 1121 | * - drive output discovery via intel_modeset_init() |
| 1122 | * - initialize the memory manager |
| 1123 | * - allocate initial config memory |
| 1124 | * - setup the DRM framebuffer with the allocated memory |
| 1125 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 1126 | int i915_driver_load(struct drm_device *dev, unsigned long flags) |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 1127 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1128 | struct drm_i915_private *dev_priv = dev->dev_private; |
Benjamin Herrenschmidt | d883f7f | 2009-02-02 16:55:45 +1100 | [diff] [blame] | 1129 | resource_size_t base, size; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1130 | int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1; |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1131 | uint32_t agp_size, prealloc_size; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1132 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 1133 | /* i915 has 4 more counters */ |
| 1134 | dev->counters += 4; |
| 1135 | dev->types[6] = _DRM_STAT_IRQ; |
| 1136 | dev->types[7] = _DRM_STAT_PRIMARY; |
| 1137 | dev->types[8] = _DRM_STAT_SECONDARY; |
| 1138 | dev->types[9] = _DRM_STAT_DMA; |
| 1139 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1140 | dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1141 | if (dev_priv == NULL) |
| 1142 | return -ENOMEM; |
| 1143 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1144 | dev->dev_private = (void *)dev_priv; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1145 | dev_priv->dev = dev; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1146 | |
| 1147 | /* Add register map (needed for suspend/resume) */ |
| 1148 | base = drm_get_resource_start(dev, mmio_bar); |
| 1149 | size = drm_get_resource_len(dev, mmio_bar); |
| 1150 | |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 1151 | dev_priv->regs = ioremap(base, size); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1152 | if (!dev_priv->regs) { |
| 1153 | DRM_ERROR("failed to map registers\n"); |
| 1154 | ret = -EIO; |
| 1155 | goto free_priv; |
| 1156 | } |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1157 | |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1158 | dev_priv->mm.gtt_mapping = |
| 1159 | io_mapping_create_wc(dev->agp->base, |
| 1160 | dev->agp->agp_info.aper_size * 1024*1024); |
Venkatesh Pallipadi | 6644107 | 2009-02-24 17:35:11 -0800 | [diff] [blame] | 1161 | if (dev_priv->mm.gtt_mapping == NULL) { |
| 1162 | ret = -EIO; |
| 1163 | goto out_rmmap; |
| 1164 | } |
| 1165 | |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1166 | /* Set up a WC MTRR for non-PAT systems. This is more common than |
| 1167 | * one would think, because the kernel disables PAT on first |
| 1168 | * generation Core chips because WC PAT gets overridden by a UC |
| 1169 | * MTRR if present. Even if a UC MTRR isn't present. |
| 1170 | */ |
| 1171 | dev_priv->mm.gtt_mtrr = mtrr_add(dev->agp->base, |
| 1172 | dev->agp->agp_info.aper_size * |
| 1173 | 1024 * 1024, |
| 1174 | MTRR_TYPE_WRCOMB, 1); |
| 1175 | if (dev_priv->mm.gtt_mtrr < 0) { |
Eric Anholt | 040aefa | 2009-03-10 12:31:12 -0700 | [diff] [blame] | 1176 | DRM_INFO("MTRR allocation failed. Graphics " |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1177 | "performance may suffer.\n"); |
| 1178 | } |
| 1179 | |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1180 | ret = i915_probe_agp(dev, &agp_size, &prealloc_size); |
| 1181 | if (ret) |
| 1182 | goto out_iomapfree; |
| 1183 | |
Dave Airlie | ac5c4e7 | 2008-12-19 15:38:34 +1000 | [diff] [blame] | 1184 | /* enable GEM by default */ |
| 1185 | dev_priv->has_gem = 1; |
Dave Airlie | ac5c4e7 | 2008-12-19 15:38:34 +1000 | [diff] [blame] | 1186 | |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1187 | if (prealloc_size > agp_size * 3 / 4) { |
| 1188 | DRM_ERROR("Detected broken video BIOS with %d/%dkB of video " |
| 1189 | "memory stolen.\n", |
| 1190 | prealloc_size / 1024, agp_size / 1024); |
| 1191 | DRM_ERROR("Disabling GEM. (try reducing stolen memory or " |
| 1192 | "updating the BIOS to fix).\n"); |
| 1193 | dev_priv->has_gem = 0; |
| 1194 | } |
| 1195 | |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 1196 | dev->driver->get_vblank_counter = i915_get_vblank_counter; |
Jesse Barnes | 42c2798 | 2009-05-05 13:13:16 -0700 | [diff] [blame] | 1197 | dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ |
Zhenyu Wang | 036a4a7 | 2009-06-08 14:40:19 +0800 | [diff] [blame] | 1198 | if (IS_G4X(dev) || IS_IGDNG(dev)) { |
Jesse Barnes | 42c2798 | 2009-05-05 13:13:16 -0700 | [diff] [blame] | 1199 | dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */ |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 1200 | dev->driver->get_vblank_counter = gm45_get_vblank_counter; |
Jesse Barnes | 42c2798 | 2009-05-05 13:13:16 -0700 | [diff] [blame] | 1201 | } |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 1202 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1203 | i915_gem_load(dev); |
| 1204 | |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 1205 | /* Init HWS */ |
| 1206 | if (!I915_NEED_GFX_HWS(dev)) { |
| 1207 | ret = i915_init_phys_hws(dev); |
| 1208 | if (ret != 0) |
Venkatesh Pallipadi | 6644107 | 2009-02-24 17:35:11 -0800 | [diff] [blame] | 1209 | goto out_iomapfree; |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 1210 | } |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1211 | |
Shaohua Li | 7662c8b | 2009-06-26 11:23:55 +0800 | [diff] [blame] | 1212 | i915_get_mem_freq(dev); |
| 1213 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1214 | /* On the 945G/GM, the chipset reports the MSI capability on the |
| 1215 | * integrated graphics even though the support isn't actually there |
| 1216 | * according to the published specs. It doesn't appear to function |
| 1217 | * correctly in testing on 945G. |
| 1218 | * This may be a side effect of MSI having been made available for PEG |
| 1219 | * and the registers being closely associated. |
Keith Packard | d1ed629 | 2008-10-17 00:44:42 -0700 | [diff] [blame] | 1220 | * |
| 1221 | * According to chipset errata, on the 965GM, MSI interrupts may |
Keith Packard | b60678a | 2008-12-08 11:12:28 -0800 | [diff] [blame] | 1222 | * be lost or delayed, but we use them anyways to avoid |
| 1223 | * stuck interrupts on some machines. |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1224 | */ |
Keith Packard | b60678a | 2008-12-08 11:12:28 -0800 | [diff] [blame] | 1225 | if (!IS_I945G(dev) && !IS_I945GM(dev)) |
Eric Anholt | d3e74d0 | 2008-11-03 14:46:17 -0800 | [diff] [blame] | 1226 | pci_enable_msi(dev->pdev); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1227 | |
| 1228 | spin_lock_init(&dev_priv->user_irq_lock); |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 1229 | spin_lock_init(&dev_priv->error_lock); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1230 | dev_priv->user_irq_refcount = 0; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1231 | |
Keith Packard | 5244021 | 2008-11-18 09:30:25 -0800 | [diff] [blame] | 1232 | ret = drm_vblank_init(dev, I915_NUM_PIPE); |
| 1233 | |
| 1234 | if (ret) { |
| 1235 | (void) i915_driver_unload(dev); |
| 1236 | return ret; |
| 1237 | } |
| 1238 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1239 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1240 | ret = i915_load_modeset_init(dev, prealloc_size, agp_size); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1241 | if (ret < 0) { |
| 1242 | DRM_ERROR("failed to init modeset\n"); |
| 1243 | goto out_rmmap; |
| 1244 | } |
| 1245 | } |
| 1246 | |
Matthew Garrett | 74a365b | 2009-03-19 21:35:39 +0000 | [diff] [blame] | 1247 | /* Must be done after probing outputs */ |
Zhenyu Wang | e170b03 | 2009-06-05 15:38:40 +0800 | [diff] [blame] | 1248 | /* FIXME: verify on IGDNG */ |
| 1249 | if (!IS_IGDNG(dev)) |
| 1250 | intel_opregion_init(dev, 0); |
Matthew Garrett | 74a365b | 2009-03-19 21:35:39 +0000 | [diff] [blame] | 1251 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1252 | return 0; |
| 1253 | |
Venkatesh Pallipadi | 6644107 | 2009-02-24 17:35:11 -0800 | [diff] [blame] | 1254 | out_iomapfree: |
| 1255 | io_mapping_free(dev_priv->mm.gtt_mapping); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1256 | out_rmmap: |
| 1257 | iounmap(dev_priv->regs); |
| 1258 | free_priv: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1259 | kfree(dev_priv); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1260 | return ret; |
| 1261 | } |
| 1262 | |
| 1263 | int i915_driver_unload(struct drm_device *dev) |
| 1264 | { |
| 1265 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1266 | |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1267 | io_mapping_free(dev_priv->mm.gtt_mapping); |
| 1268 | if (dev_priv->mm.gtt_mtrr >= 0) { |
| 1269 | mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base, |
| 1270 | dev->agp->agp_info.aper_size * 1024 * 1024); |
| 1271 | dev_priv->mm.gtt_mtrr = -1; |
| 1272 | } |
| 1273 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1274 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1275 | drm_irq_uninstall(dev); |
| 1276 | } |
| 1277 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1278 | if (dev->pdev->msi_enabled) |
| 1279 | pci_disable_msi(dev->pdev); |
| 1280 | |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 1281 | if (dev_priv->regs != NULL) |
| 1282 | iounmap(dev_priv->regs); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1283 | |
Zhenyu Wang | e170b03 | 2009-06-05 15:38:40 +0800 | [diff] [blame] | 1284 | if (!IS_IGDNG(dev)) |
| 1285 | intel_opregion_free(dev, 0); |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 1286 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1287 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 1288 | intel_modeset_cleanup(dev); |
| 1289 | |
Dave Airlie | 71acb5e | 2008-12-30 20:31:46 +1000 | [diff] [blame] | 1290 | i915_gem_free_all_phys_object(dev); |
| 1291 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1292 | mutex_lock(&dev->struct_mutex); |
| 1293 | i915_gem_cleanup_ringbuffer(dev); |
| 1294 | mutex_unlock(&dev->struct_mutex); |
| 1295 | drm_mm_takedown(&dev_priv->vram); |
| 1296 | i915_gem_lastclose(dev); |
| 1297 | } |
| 1298 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1299 | kfree(dev->dev_private); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1300 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 1301 | return 0; |
| 1302 | } |
| 1303 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1304 | int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv) |
| 1305 | { |
| 1306 | struct drm_i915_file_private *i915_file_priv; |
| 1307 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame^] | 1308 | DRM_DEBUG_DRIVER("\n"); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1309 | i915_file_priv = (struct drm_i915_file_private *) |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1310 | kmalloc(sizeof(*i915_file_priv), GFP_KERNEL); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1311 | |
| 1312 | if (!i915_file_priv) |
| 1313 | return -ENOMEM; |
| 1314 | |
| 1315 | file_priv->driver_priv = i915_file_priv; |
| 1316 | |
Eric Anholt | b962442 | 2009-06-03 07:27:35 +0000 | [diff] [blame] | 1317 | INIT_LIST_HEAD(&i915_file_priv->mm.request_list); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1318 | |
| 1319 | return 0; |
| 1320 | } |
| 1321 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1322 | /** |
| 1323 | * i915_driver_lastclose - clean up after all DRM clients have exited |
| 1324 | * @dev: DRM device |
| 1325 | * |
| 1326 | * Take care of cleaning up after all DRM clients have exited. In the |
| 1327 | * mode setting case, we want to restore the kernel's initial mode (just |
| 1328 | * in case the last client left us in a bad state). |
| 1329 | * |
| 1330 | * Additionally, in the non-mode setting case, we'll tear down the AGP |
| 1331 | * and DMA structures, since the kernel won't be using them, and clea |
| 1332 | * up any GEM state. |
| 1333 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 1334 | void i915_driver_lastclose(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1336 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1337 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1338 | if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 1339 | intelfb_restore(); |
Dave Airlie | 144a75f | 2008-03-30 07:53:58 +1000 | [diff] [blame] | 1340 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1341 | } |
Dave Airlie | 144a75f | 2008-03-30 07:53:58 +1000 | [diff] [blame] | 1342 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1343 | i915_gem_lastclose(dev); |
| 1344 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1345 | if (dev_priv->agp_heap) |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 1346 | i915_mem_takedown(&(dev_priv->agp_heap)); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1347 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 1348 | i915_dma_cleanup(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1349 | } |
| 1350 | |
Eric Anholt | 6c340ea | 2007-08-25 20:23:09 +1000 | [diff] [blame] | 1351 | void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1352 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1353 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | b962442 | 2009-06-03 07:27:35 +0000 | [diff] [blame] | 1354 | i915_gem_release(dev, file_priv); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1355 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 1356 | i915_mem_release(dev, file_priv, dev_priv->agp_heap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1357 | } |
| 1358 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1359 | void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv) |
| 1360 | { |
| 1361 | struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv; |
| 1362 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1363 | kfree(i915_file_priv); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1364 | } |
| 1365 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1366 | struct drm_ioctl_desc i915_ioctls[] = { |
| 1367 | DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1368 | DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH), |
| 1369 | DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH), |
| 1370 | DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH), |
| 1371 | DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH), |
| 1372 | DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH), |
| 1373 | DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH), |
| 1374 | DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1375 | DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH), |
| 1376 | DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH), |
| 1377 | DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1378 | DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH), |
| 1379 | DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP, i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ), |
| 1380 | DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE, i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ), |
| 1381 | DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ), |
| 1382 | DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), |
Matthias Hopf | 4b40893 | 2008-10-18 07:18:05 +1000 | [diff] [blame] | 1383 | DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
Dave Airlie | 2bdf00b | 2008-10-07 13:40:10 +1000 | [diff] [blame] | 1384 | DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1385 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH), |
| 1386 | DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), |
| 1387 | DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), |
| 1388 | DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH), |
| 1389 | DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH), |
Dave Airlie | 2bdf00b | 2008-10-07 13:40:10 +1000 | [diff] [blame] | 1390 | DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1391 | DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1392 | DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, 0), |
| 1393 | DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, 0), |
| 1394 | DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, 0), |
| 1395 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, 0), |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 1396 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, 0), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1397 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, 0), |
| 1398 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0), |
| 1399 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), |
| 1400 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), |
Eric Anholt | 5a125c3 | 2008-10-22 21:40:13 -0700 | [diff] [blame] | 1401 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), |
Carl Worth | 08d7b3d | 2009-04-29 14:43:54 -0700 | [diff] [blame] | 1402 | DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0), |
Dave Airlie | c94f702 | 2005-07-07 21:03:38 +1000 | [diff] [blame] | 1403 | }; |
| 1404 | |
| 1405 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 1406 | |
| 1407 | /** |
| 1408 | * Determine if the device really is AGP or not. |
| 1409 | * |
| 1410 | * All Intel graphics chipsets are treated as AGP, even if they are really |
| 1411 | * PCI-e. |
| 1412 | * |
| 1413 | * \param dev The device to be tested. |
| 1414 | * |
| 1415 | * \returns |
| 1416 | * A value of 1 is always retured to indictate every i9x5 is AGP. |
| 1417 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 1418 | int i915_driver_device_is_agp(struct drm_device * dev) |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 1419 | { |
| 1420 | return 1; |
| 1421 | } |