Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 1 | /* |
| 2 | * drivers/irqchip/irq-crossbar.c |
| 3 | * |
| 4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com |
| 5 | * Author: Sricharan R <r.sricharan@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | */ |
| 12 | #include <linux/err.h> |
| 13 | #include <linux/io.h> |
| 14 | #include <linux/of_address.h> |
| 15 | #include <linux/of_irq.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/irqchip/arm-gic.h> |
Nishanth Menon | 4dbf45e | 2014-06-26 12:40:25 +0530 | [diff] [blame] | 18 | #include <linux/irqchip/irq-crossbar.h> |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 19 | |
| 20 | #define IRQ_FREE -1 |
Nishanth Menon | 1d50d2c | 2014-06-26 12:40:19 +0530 | [diff] [blame] | 21 | #define IRQ_RESERVED -2 |
Nishanth Menon | 64e0f8b | 2014-06-26 12:40:21 +0530 | [diff] [blame] | 22 | #define IRQ_SKIP -3 |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 23 | #define GIC_IRQ_START 32 |
| 24 | |
Nishanth Menon | e30ef8a | 2014-06-26 12:40:26 +0530 | [diff] [blame] | 25 | /** |
| 26 | * struct crossbar_device - crossbar device description |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 27 | * @int_max: maximum number of supported interrupts |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 28 | * @safe_map: safe default value to initialize the crossbar |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 29 | * @irq_map: array of interrupts to crossbar number mapping |
| 30 | * @crossbar_base: crossbar base address |
| 31 | * @register_offsets: offsets for each irq number |
Nishanth Menon | e30ef8a | 2014-06-26 12:40:26 +0530 | [diff] [blame] | 32 | * @write: register write function pointer |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 33 | */ |
| 34 | struct crossbar_device { |
| 35 | uint int_max; |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 36 | uint safe_map; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 37 | uint *irq_map; |
| 38 | void __iomem *crossbar_base; |
| 39 | int *register_offsets; |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 40 | void (*write)(int, int); |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 41 | }; |
| 42 | |
| 43 | static struct crossbar_device *cb; |
| 44 | |
| 45 | static inline void crossbar_writel(int irq_no, int cb_no) |
| 46 | { |
| 47 | writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]); |
| 48 | } |
| 49 | |
| 50 | static inline void crossbar_writew(int irq_no, int cb_no) |
| 51 | { |
| 52 | writew(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]); |
| 53 | } |
| 54 | |
| 55 | static inline void crossbar_writeb(int irq_no, int cb_no) |
| 56 | { |
| 57 | writeb(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]); |
| 58 | } |
| 59 | |
Nishanth Menon | 6f16fc8 | 2014-06-26 12:40:20 +0530 | [diff] [blame] | 60 | static inline int get_prev_map_irq(int cb_no) |
| 61 | { |
| 62 | int i; |
| 63 | |
Nishanth Menon | ddee0fb | 2014-06-26 12:40:23 +0530 | [diff] [blame] | 64 | for (i = cb->int_max - 1; i >= 0; i--) |
Nishanth Menon | 6f16fc8 | 2014-06-26 12:40:20 +0530 | [diff] [blame] | 65 | if (cb->irq_map[i] == cb_no) |
| 66 | return i; |
| 67 | |
| 68 | return -ENODEV; |
| 69 | } |
| 70 | |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 71 | static inline int allocate_free_irq(int cb_no) |
| 72 | { |
| 73 | int i; |
| 74 | |
Nishanth Menon | ddee0fb | 2014-06-26 12:40:23 +0530 | [diff] [blame] | 75 | for (i = cb->int_max - 1; i >= 0; i--) { |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 76 | if (cb->irq_map[i] == IRQ_FREE) { |
| 77 | cb->irq_map[i] = cb_no; |
| 78 | return i; |
| 79 | } |
| 80 | } |
| 81 | |
| 82 | return -ENODEV; |
| 83 | } |
| 84 | |
| 85 | static int crossbar_domain_map(struct irq_domain *d, unsigned int irq, |
| 86 | irq_hw_number_t hw) |
| 87 | { |
| 88 | cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]); |
| 89 | return 0; |
| 90 | } |
| 91 | |
Sricharan R | 8b09a45 | 2014-06-26 12:40:30 +0530 | [diff] [blame^] | 92 | /** |
| 93 | * crossbar_domain_unmap - unmap a crossbar<->irq connection |
| 94 | * @d: domain of irq to unmap |
| 95 | * @irq: virq number |
| 96 | * |
| 97 | * We do not maintain a use count of total number of map/unmap |
| 98 | * calls for a particular irq to find out if a irq can be really |
| 99 | * unmapped. This is because unmap is called during irq_dispose_mapping(irq), |
| 100 | * after which irq is anyways unusable. So an explicit map has to be called |
| 101 | * after that. |
| 102 | */ |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 103 | static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq) |
| 104 | { |
| 105 | irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq; |
| 106 | |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 107 | if (hw > GIC_IRQ_START) { |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 108 | cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE; |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 109 | cb->write(hw - GIC_IRQ_START, cb->safe_map); |
| 110 | } |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 111 | } |
| 112 | |
| 113 | static int crossbar_domain_xlate(struct irq_domain *d, |
| 114 | struct device_node *controller, |
| 115 | const u32 *intspec, unsigned int intsize, |
| 116 | unsigned long *out_hwirq, |
| 117 | unsigned int *out_type) |
| 118 | { |
Nishanth Menon | d4922a9 | 2014-06-26 12:40:24 +0530 | [diff] [blame] | 119 | int ret; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 120 | |
Nishanth Menon | 6f16fc8 | 2014-06-26 12:40:20 +0530 | [diff] [blame] | 121 | ret = get_prev_map_irq(intspec[1]); |
Nishanth Menon | d4922a9 | 2014-06-26 12:40:24 +0530 | [diff] [blame] | 122 | if (ret >= 0) |
Nishanth Menon | 6f16fc8 | 2014-06-26 12:40:20 +0530 | [diff] [blame] | 123 | goto found; |
| 124 | |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 125 | ret = allocate_free_irq(intspec[1]); |
| 126 | |
Nishanth Menon | d4922a9 | 2014-06-26 12:40:24 +0530 | [diff] [blame] | 127 | if (ret < 0) |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 128 | return ret; |
| 129 | |
Nishanth Menon | 6f16fc8 | 2014-06-26 12:40:20 +0530 | [diff] [blame] | 130 | found: |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 131 | *out_hwirq = ret + GIC_IRQ_START; |
| 132 | return 0; |
| 133 | } |
| 134 | |
Nishanth Menon | 4dbf45e | 2014-06-26 12:40:25 +0530 | [diff] [blame] | 135 | static const struct irq_domain_ops routable_irq_domain_ops = { |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 136 | .map = crossbar_domain_map, |
| 137 | .unmap = crossbar_domain_unmap, |
| 138 | .xlate = crossbar_domain_xlate |
| 139 | }; |
| 140 | |
| 141 | static int __init crossbar_of_init(struct device_node *node) |
| 142 | { |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 143 | int i, size, max = 0, reserved = 0, entry; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 144 | const __be32 *irqsr; |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 145 | int ret = -ENOMEM; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 146 | |
Dan Carpenter | 3894e9e | 2014-04-03 10:21:34 +0300 | [diff] [blame] | 147 | cb = kzalloc(sizeof(*cb), GFP_KERNEL); |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 148 | |
| 149 | if (!cb) |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 150 | return ret; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 151 | |
| 152 | cb->crossbar_base = of_iomap(node, 0); |
| 153 | if (!cb->crossbar_base) |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 154 | goto err_cb; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 155 | |
| 156 | of_property_read_u32(node, "ti,max-irqs", &max); |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 157 | if (!max) { |
| 158 | pr_err("missing 'ti,max-irqs' property\n"); |
| 159 | ret = -EINVAL; |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 160 | goto err_base; |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 161 | } |
Nishanth Menon | 4dbf45e | 2014-06-26 12:40:25 +0530 | [diff] [blame] | 162 | cb->irq_map = kcalloc(max, sizeof(int), GFP_KERNEL); |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 163 | if (!cb->irq_map) |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 164 | goto err_base; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 165 | |
| 166 | cb->int_max = max; |
| 167 | |
| 168 | for (i = 0; i < max; i++) |
| 169 | cb->irq_map[i] = IRQ_FREE; |
| 170 | |
| 171 | /* Get and mark reserved irqs */ |
| 172 | irqsr = of_get_property(node, "ti,irqs-reserved", &size); |
| 173 | if (irqsr) { |
| 174 | size /= sizeof(__be32); |
| 175 | |
| 176 | for (i = 0; i < size; i++) { |
| 177 | of_property_read_u32_index(node, |
| 178 | "ti,irqs-reserved", |
| 179 | i, &entry); |
| 180 | if (entry > max) { |
| 181 | pr_err("Invalid reserved entry\n"); |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 182 | ret = -EINVAL; |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 183 | goto err_irq_map; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 184 | } |
Nishanth Menon | 1d50d2c | 2014-06-26 12:40:19 +0530 | [diff] [blame] | 185 | cb->irq_map[entry] = IRQ_RESERVED; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 186 | } |
| 187 | } |
| 188 | |
Nishanth Menon | 64e0f8b | 2014-06-26 12:40:21 +0530 | [diff] [blame] | 189 | /* Skip irqs hardwired to bypass the crossbar */ |
| 190 | irqsr = of_get_property(node, "ti,irqs-skip", &size); |
| 191 | if (irqsr) { |
| 192 | size /= sizeof(__be32); |
| 193 | |
| 194 | for (i = 0; i < size; i++) { |
| 195 | of_property_read_u32_index(node, |
| 196 | "ti,irqs-skip", |
| 197 | i, &entry); |
| 198 | if (entry > max) { |
| 199 | pr_err("Invalid skip entry\n"); |
| 200 | ret = -EINVAL; |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 201 | goto err_irq_map; |
Nishanth Menon | 64e0f8b | 2014-06-26 12:40:21 +0530 | [diff] [blame] | 202 | } |
| 203 | cb->irq_map[entry] = IRQ_SKIP; |
| 204 | } |
| 205 | } |
| 206 | |
| 207 | |
Nishanth Menon | 4dbf45e | 2014-06-26 12:40:25 +0530 | [diff] [blame] | 208 | cb->register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL); |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 209 | if (!cb->register_offsets) |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 210 | goto err_irq_map; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 211 | |
| 212 | of_property_read_u32(node, "ti,reg-size", &size); |
| 213 | |
| 214 | switch (size) { |
| 215 | case 1: |
| 216 | cb->write = crossbar_writeb; |
| 217 | break; |
| 218 | case 2: |
| 219 | cb->write = crossbar_writew; |
| 220 | break; |
| 221 | case 4: |
| 222 | cb->write = crossbar_writel; |
| 223 | break; |
| 224 | default: |
| 225 | pr_err("Invalid reg-size property\n"); |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 226 | ret = -EINVAL; |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 227 | goto err_reg_offset; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 228 | break; |
| 229 | } |
| 230 | |
| 231 | /* |
| 232 | * Register offsets are not linear because of the |
| 233 | * reserved irqs. so find and store the offsets once. |
| 234 | */ |
| 235 | for (i = 0; i < max; i++) { |
Nishanth Menon | 1d50d2c | 2014-06-26 12:40:19 +0530 | [diff] [blame] | 236 | if (cb->irq_map[i] == IRQ_RESERVED) |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 237 | continue; |
| 238 | |
| 239 | cb->register_offsets[i] = reserved; |
| 240 | reserved += size; |
| 241 | } |
| 242 | |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 243 | of_property_read_u32(node, "ti,irqs-safe-map", &cb->safe_map); |
Nishanth Menon | a35057d | 2014-06-26 12:40:22 +0530 | [diff] [blame] | 244 | /* Initialize the crossbar with safe map to start with */ |
| 245 | for (i = 0; i < max; i++) { |
| 246 | if (cb->irq_map[i] == IRQ_RESERVED || |
| 247 | cb->irq_map[i] == IRQ_SKIP) |
| 248 | continue; |
| 249 | |
| 250 | cb->write(i, cb->safe_map); |
| 251 | } |
| 252 | |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 253 | register_routable_domain_ops(&routable_irq_domain_ops); |
| 254 | return 0; |
| 255 | |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 256 | err_reg_offset: |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 257 | kfree(cb->register_offsets); |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 258 | err_irq_map: |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 259 | kfree(cb->irq_map); |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 260 | err_base: |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 261 | iounmap(cb->crossbar_base); |
Nishanth Menon | 3c44d51 | 2014-06-26 12:40:28 +0530 | [diff] [blame] | 262 | err_cb: |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 263 | kfree(cb); |
Sricharan R | 99e37d0e | 2014-06-26 12:40:29 +0530 | [diff] [blame] | 264 | |
| 265 | cb = NULL; |
Nishanth Menon | edb442d | 2014-06-26 12:40:27 +0530 | [diff] [blame] | 266 | return ret; |
Sricharan R | 96ca848 | 2013-12-03 15:57:23 +0530 | [diff] [blame] | 267 | } |
| 268 | |
| 269 | static const struct of_device_id crossbar_match[] __initconst = { |
| 270 | { .compatible = "ti,irq-crossbar" }, |
| 271 | {} |
| 272 | }; |
| 273 | |
| 274 | int __init irqcrossbar_init(void) |
| 275 | { |
| 276 | struct device_node *np; |
| 277 | np = of_find_matching_node(NULL, crossbar_match); |
| 278 | if (!np) |
| 279 | return -ENODEV; |
| 280 | |
| 281 | crossbar_of_init(np); |
| 282 | return 0; |
| 283 | } |