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Mingkai Hub36ece82010-10-12 18:18:31 +08001/*
2 * Freescale SPI/eSPI controller driver library.
3 *
4 * Maintainer: Kumar Gala
5 *
6 * Copyright 2010 Freescale Semiconductor, Inc.
7 * Copyright (C) 2006 Polycom, Inc.
8 *
9 * CPM SPI and QE buffer descriptors mode support:
10 * Copyright (c) 2009 MontaVista Software, Inc.
11 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18#ifndef __SPI_FSL_LIB_H__
19#define __SPI_FSL_LIB_H__
20
21/* SPI/eSPI Controller driver's private data. */
22struct mpc8xxx_spi {
23 struct device *dev;
24 void *reg_base;
25
26 /* rx & tx bufs from the spi_transfer */
27 const void *tx;
28 void *rx;
Mingkai Hu8b60d6c2010-10-12 18:18:32 +080029#ifdef CONFIG_SPI_FSL_ESPI
30 int len;
31#endif
Mingkai Hub36ece82010-10-12 18:18:31 +080032
33 int subblock;
34 struct spi_pram __iomem *pram;
35 struct cpm_buf_desc __iomem *tx_bd;
36 struct cpm_buf_desc __iomem *rx_bd;
37
38 struct spi_transfer *xfer_in_progress;
39
40 /* dma addresses for CPM transfers */
41 dma_addr_t tx_dma;
42 dma_addr_t rx_dma;
43 bool map_tx_dma;
44 bool map_rx_dma;
45
46 dma_addr_t dma_dummy_tx;
47 dma_addr_t dma_dummy_rx;
48
49 /* functions to deal with different sized buffers */
50 void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
51 u32(*get_tx) (struct mpc8xxx_spi *);
52
53 /* hooks for different controller driver */
54 void (*spi_do_one_msg) (struct spi_message *m);
55 void (*spi_remove) (struct mpc8xxx_spi *mspi);
56
57 unsigned int count;
58 unsigned int irq;
59
60 unsigned nsecs; /* (clock cycle time)/2 */
61
62 u32 spibrg; /* SPIBRG input clock */
63 u32 rx_shift; /* RX data reg shift when in qe mode */
64 u32 tx_shift; /* TX data reg shift when in qe mode */
65
66 unsigned int flags;
67
68 struct workqueue_struct *workqueue;
69 struct work_struct work;
70
71 struct list_head queue;
72 spinlock_t lock;
73
74 struct completion done;
75};
76
77struct spi_mpc8xxx_cs {
78 /* functions to deal with different sized buffers */
79 void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
80 u32 (*get_tx) (struct mpc8xxx_spi *);
81 u32 rx_shift; /* RX data reg shift when in qe mode */
82 u32 tx_shift; /* TX data reg shift when in qe mode */
83 u32 hw_mode; /* Holds HW mode register settings */
84};
85
86static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
87{
88 out_be32(reg, val);
89}
90
91static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
92{
93 return in_be32(reg);
94}
95
96struct mpc8xxx_spi_probe_info {
97 struct fsl_spi_platform_data pdata;
98 int *gpios;
99 bool *alow_flags;
100};
101
102extern u32 mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi *mpc8xxx_spi);
103extern u32 mpc8xxx_spi_tx_buf_u16(struct mpc8xxx_spi *mpc8xxx_spi);
104extern u32 mpc8xxx_spi_tx_buf_u32(struct mpc8xxx_spi *mpc8xxx_spi);
105extern void mpc8xxx_spi_rx_buf_u8(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
106extern void mpc8xxx_spi_rx_buf_u16(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
107extern void mpc8xxx_spi_rx_buf_u32(u32 data, struct mpc8xxx_spi *mpc8xxx_spi);
108
109extern struct mpc8xxx_spi_probe_info *to_of_pinfo(
110 struct fsl_spi_platform_data *pdata);
111extern int mpc8xxx_spi_bufs(struct mpc8xxx_spi *mspi,
112 struct spi_transfer *t, unsigned int len);
113extern int mpc8xxx_spi_transfer(struct spi_device *spi, struct spi_message *m);
114extern void mpc8xxx_spi_cleanup(struct spi_device *spi);
115extern const char *mpc8xxx_spi_strmode(unsigned int flags);
116extern int mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
117 unsigned int irq);
118extern int mpc8xxx_spi_remove(struct device *dev);
119extern int of_mpc8xxx_spi_probe(struct platform_device *ofdev,
120 const struct of_device_id *ofid);
121
122#endif /* __SPI_FSL_LIB_H__ */