Roland Dreier | 3d155f8 | 2005-10-27 11:03:38 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2005 Cisco Systems. All rights reserved. |
| 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | * |
| 32 | * $Id$ |
| 33 | */ |
| 34 | |
Tim Schmielau | 8c65b4a | 2005-11-07 00:59:43 -0800 | [diff] [blame^] | 35 | #include <linux/jiffies.h> |
| 36 | #include <linux/timer.h> |
| 37 | |
Roland Dreier | 3d155f8 | 2005-10-27 11:03:38 -0700 | [diff] [blame] | 38 | #include "mthca_dev.h" |
| 39 | |
| 40 | enum { |
| 41 | MTHCA_CATAS_POLL_INTERVAL = 5 * HZ, |
| 42 | |
| 43 | MTHCA_CATAS_TYPE_INTERNAL = 0, |
| 44 | MTHCA_CATAS_TYPE_UPLINK = 3, |
| 45 | MTHCA_CATAS_TYPE_DDR = 4, |
| 46 | MTHCA_CATAS_TYPE_PARITY = 5, |
| 47 | }; |
| 48 | |
| 49 | static DEFINE_SPINLOCK(catas_lock); |
| 50 | |
| 51 | static void handle_catas(struct mthca_dev *dev) |
| 52 | { |
| 53 | struct ib_event event; |
| 54 | const char *type; |
| 55 | int i; |
| 56 | |
| 57 | event.device = &dev->ib_dev; |
| 58 | event.event = IB_EVENT_DEVICE_FATAL; |
| 59 | event.element.port_num = 0; |
| 60 | |
| 61 | ib_dispatch_event(&event); |
| 62 | |
| 63 | switch (swab32(readl(dev->catas_err.map)) >> 24) { |
| 64 | case MTHCA_CATAS_TYPE_INTERNAL: |
| 65 | type = "internal error"; |
| 66 | break; |
| 67 | case MTHCA_CATAS_TYPE_UPLINK: |
| 68 | type = "uplink bus error"; |
| 69 | break; |
| 70 | case MTHCA_CATAS_TYPE_DDR: |
| 71 | type = "DDR data error"; |
| 72 | break; |
| 73 | case MTHCA_CATAS_TYPE_PARITY: |
| 74 | type = "internal parity error"; |
| 75 | break; |
| 76 | default: |
| 77 | type = "unknown error"; |
| 78 | break; |
| 79 | } |
| 80 | |
| 81 | mthca_err(dev, "Catastrophic error detected: %s\n", type); |
| 82 | for (i = 0; i < dev->catas_err.size; ++i) |
| 83 | mthca_err(dev, " buf[%02x]: %08x\n", |
| 84 | i, swab32(readl(dev->catas_err.map + i))); |
| 85 | } |
| 86 | |
| 87 | static void poll_catas(unsigned long dev_ptr) |
| 88 | { |
| 89 | struct mthca_dev *dev = (struct mthca_dev *) dev_ptr; |
| 90 | unsigned long flags; |
| 91 | int i; |
| 92 | |
| 93 | for (i = 0; i < dev->catas_err.size; ++i) |
| 94 | if (readl(dev->catas_err.map + i)) { |
| 95 | handle_catas(dev); |
| 96 | return; |
| 97 | } |
| 98 | |
| 99 | spin_lock_irqsave(&catas_lock, flags); |
| 100 | if (dev->catas_err.stop) |
| 101 | mod_timer(&dev->catas_err.timer, |
| 102 | jiffies + MTHCA_CATAS_POLL_INTERVAL); |
| 103 | spin_unlock_irqrestore(&catas_lock, flags); |
| 104 | |
| 105 | return; |
| 106 | } |
| 107 | |
| 108 | void mthca_start_catas_poll(struct mthca_dev *dev) |
| 109 | { |
| 110 | unsigned long addr; |
| 111 | |
| 112 | init_timer(&dev->catas_err.timer); |
| 113 | dev->catas_err.stop = 0; |
| 114 | dev->catas_err.map = NULL; |
| 115 | |
| 116 | addr = pci_resource_start(dev->pdev, 0) + |
| 117 | ((pci_resource_len(dev->pdev, 0) - 1) & |
| 118 | dev->catas_err.addr); |
| 119 | |
| 120 | if (!request_mem_region(addr, dev->catas_err.size * 4, |
| 121 | DRV_NAME)) { |
| 122 | mthca_warn(dev, "couldn't request catastrophic error region " |
| 123 | "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4); |
| 124 | return; |
| 125 | } |
| 126 | |
| 127 | dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4); |
| 128 | if (!dev->catas_err.map) { |
| 129 | mthca_warn(dev, "couldn't map catastrophic error region " |
| 130 | "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4); |
| 131 | release_mem_region(addr, dev->catas_err.size * 4); |
| 132 | return; |
| 133 | } |
| 134 | |
| 135 | dev->catas_err.timer.data = (unsigned long) dev; |
| 136 | dev->catas_err.timer.function = poll_catas; |
| 137 | dev->catas_err.timer.expires = jiffies + MTHCA_CATAS_POLL_INTERVAL; |
| 138 | add_timer(&dev->catas_err.timer); |
| 139 | } |
| 140 | |
| 141 | void mthca_stop_catas_poll(struct mthca_dev *dev) |
| 142 | { |
| 143 | spin_lock_irq(&catas_lock); |
| 144 | dev->catas_err.stop = 1; |
| 145 | spin_unlock_irq(&catas_lock); |
| 146 | |
| 147 | del_timer_sync(&dev->catas_err.timer); |
| 148 | |
| 149 | if (dev->catas_err.map) { |
| 150 | iounmap(dev->catas_err.map); |
| 151 | release_mem_region(pci_resource_start(dev->pdev, 0) + |
| 152 | ((pci_resource_len(dev->pdev, 0) - 1) & |
| 153 | dev->catas_err.addr), |
| 154 | dev->catas_err.size * 4); |
| 155 | } |
| 156 | } |