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Misael Lopez Cruzf19b2822011-04-27 02:14:07 -05001/*
2 * MFD driver for twl6040
3 *
4 * Authors: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
5 * Misael Lopez Cruz <misael.lopez@ti.com>
6 *
7 * Copyright: (C) 2011 Texas Instruments, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __TWL6040_CODEC_H__
26#define __TWL6040_CODEC_H__
27
28#include <linux/interrupt.h>
29#include <linux/mfd/core.h>
Peter Ujfalusi5af7df62012-05-02 16:54:42 +030030#include <linux/regulator/consumer.h>
Peter Ujfalusi68bab862014-04-03 13:54:41 +030031#include <linux/clk.h>
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050032
33#define TWL6040_REG_ASICID 0x01
34#define TWL6040_REG_ASICREV 0x02
35#define TWL6040_REG_INTID 0x03
36#define TWL6040_REG_INTMR 0x04
37#define TWL6040_REG_NCPCTL 0x05
38#define TWL6040_REG_LDOCTL 0x06
39#define TWL6040_REG_HPPLLCTL 0x07
40#define TWL6040_REG_LPPLLCTL 0x08
41#define TWL6040_REG_LPPLLDIV 0x09
42#define TWL6040_REG_AMICBCTL 0x0A
43#define TWL6040_REG_DMICBCTL 0x0B
44#define TWL6040_REG_MICLCTL 0x0C
45#define TWL6040_REG_MICRCTL 0x0D
46#define TWL6040_REG_MICGAIN 0x0E
47#define TWL6040_REG_LINEGAIN 0x0F
48#define TWL6040_REG_HSLCTL 0x10
49#define TWL6040_REG_HSRCTL 0x11
50#define TWL6040_REG_HSGAIN 0x12
51#define TWL6040_REG_EARCTL 0x13
52#define TWL6040_REG_HFLCTL 0x14
53#define TWL6040_REG_HFLGAIN 0x15
54#define TWL6040_REG_HFRCTL 0x16
55#define TWL6040_REG_HFRGAIN 0x17
56#define TWL6040_REG_VIBCTLL 0x18
57#define TWL6040_REG_VIBDATL 0x19
58#define TWL6040_REG_VIBCTLR 0x1A
59#define TWL6040_REG_VIBDATR 0x1B
60#define TWL6040_REG_HKCTL1 0x1C
61#define TWL6040_REG_HKCTL2 0x1D
62#define TWL6040_REG_GPOCTL 0x1E
63#define TWL6040_REG_ALB 0x1F
64#define TWL6040_REG_DLB 0x20
65#define TWL6040_REG_TRIM1 0x28
66#define TWL6040_REG_TRIM2 0x29
67#define TWL6040_REG_TRIM3 0x2A
68#define TWL6040_REG_HSOTRIM 0x2B
69#define TWL6040_REG_HFOTRIM 0x2C
70#define TWL6040_REG_ACCCTL 0x2D
71#define TWL6040_REG_STATUS 0x2E
72
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -050073/* INTID (0x03) fields */
74
75#define TWL6040_THINT 0x01
76#define TWL6040_PLUGINT 0x02
77#define TWL6040_UNPLUGINT 0x04
78#define TWL6040_HOOKINT 0x08
79#define TWL6040_HFINT 0x10
80#define TWL6040_VIBINT 0x20
81#define TWL6040_READYINT 0x40
82
83/* INTMR (0x04) fields */
84
85#define TWL6040_THMSK 0x01
86#define TWL6040_PLUGMSK 0x02
87#define TWL6040_HOOKMSK 0x08
88#define TWL6040_HFMSK 0x10
89#define TWL6040_VIBMSK 0x20
90#define TWL6040_READYMSK 0x40
91#define TWL6040_ALLINT_MSK 0x7B
92
93/* NCPCTL (0x05) fields */
94
95#define TWL6040_NCPENA 0x01
96#define TWL6040_NCPOPEN 0x40
97
98/* LDOCTL (0x06) fields */
99
100#define TWL6040_LSLDOENA 0x01
101#define TWL6040_HSLDOENA 0x04
102#define TWL6040_REFENA 0x40
103#define TWL6040_OSCENA 0x80
104
105/* HPPLLCTL (0x07) fields */
106
107#define TWL6040_HPLLENA 0x01
108#define TWL6040_HPLLRST 0x02
109#define TWL6040_HPLLBP 0x04
110#define TWL6040_HPLLSQRENA 0x08
111#define TWL6040_MCLK_12000KHZ (0 << 5)
112#define TWL6040_MCLK_19200KHZ (1 << 5)
113#define TWL6040_MCLK_26000KHZ (2 << 5)
114#define TWL6040_MCLK_38400KHZ (3 << 5)
115#define TWL6040_MCLK_MSK 0x60
116
117/* LPPLLCTL (0x08) fields */
118
119#define TWL6040_LPLLENA 0x01
120#define TWL6040_LPLLRST 0x02
121#define TWL6040_LPLLSEL 0x04
122#define TWL6040_LPLLFIN 0x08
123#define TWL6040_HPLLSEL 0x10
124
Peter Ujfalusiab6cf132011-09-22 11:05:54 +0300125/* HSLCTL/R (0x10/0x11) fields */
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500126
Peter Ujfalusi33b68162011-10-12 14:46:02 +0300127#define TWL6040_HSDACENA (1 << 0)
Peter Ujfalusiab6cf132011-09-22 11:05:54 +0300128#define TWL6040_HSDACMODE (1 << 1)
Peter Ujfalusifa223ec2013-06-24 15:42:04 +0200129#define TWL6040_HSDRVENA (1 << 2)
Peter Ujfalusiab6cf132011-09-22 11:05:54 +0300130#define TWL6040_HSDRVMODE (1 << 3)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500131
Peter Ujfalusifa223ec2013-06-24 15:42:04 +0200132/* HFLCTL/R (0x14/0x16) fields */
133
134#define TWL6040_HFDACENA (1 << 0)
135#define TWL6040_HFPGAENA (1 << 1)
136#define TWL6040_HFDRVENA (1 << 4)
137
Peter Ujfalusi1e036f62011-10-12 11:57:53 +0300138/* VIBCTLL/R (0x18/0x1A) fields */
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500139
Peter Ujfalusi1e036f62011-10-12 11:57:53 +0300140#define TWL6040_VIBENA (1 << 0)
141#define TWL6040_VIBSEL (1 << 1)
142#define TWL6040_VIBCTRL (1 << 2)
143#define TWL6040_VIBCTRL_P (1 << 3)
144#define TWL6040_VIBCTRL_N (1 << 4)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500145
Peter Ujfalusi1e036f62011-10-12 11:57:53 +0300146/* VIBDATL/R (0x19/0x1B) fields */
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500147
148#define TWL6040_VIBDAT_MAX 0x64
149
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500150/* GPOCTL (0x1E) fields */
151
152#define TWL6040_GPO1 0x01
153#define TWL6040_GPO2 0x02
Peter Ujfalusi35736dc2012-08-16 15:13:13 +0300154#define TWL6040_GPO3 0x04
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500155
156/* ACCCTL (0x2D) fields */
157
158#define TWL6040_I2CSEL 0x01
159#define TWL6040_RESETSPLIT 0x04
160#define TWL6040_INTCLRMODE 0x08
Peter Ujfalusi11e38e12014-04-01 16:44:59 +0300161#define TWL6040_I2CMODE(x) ((x & 0x3) << 4)
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500162
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500163/* STATUS (0x2E) fields */
164
165#define TWL6040_PLUGCOMP 0x02
166#define TWL6040_VIBLOCDET 0x10
167#define TWL6040_VIBROCDET 0x20
168#define TWL6040_TSHUTDET 0x40
169
Peter Ujfalusi5cbe7862012-08-16 15:13:14 +0300170#define TWL6040_CELLS 3
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500171
172#define TWL6040_REV_ES1_0 0x00
Peter Ujfalusibe4ac002012-07-16 11:49:43 +0200173#define TWL6040_REV_ES1_1 0x01 /* Rev ES1.1 and ES1.2 */
174#define TWL6040_REV_ES1_3 0x02
Peter Ujfalusi1fc74ae2012-07-16 11:49:44 +0200175#define TWL6041_REV_ES2_0 0x10
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500176
177#define TWL6040_IRQ_TH 0
178#define TWL6040_IRQ_PLUG 1
179#define TWL6040_IRQ_HOOK 2
180#define TWL6040_IRQ_HF 3
181#define TWL6040_IRQ_VIB 4
182#define TWL6040_IRQ_READY 5
183
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300184/* PLL selection */
185#define TWL6040_SYSCLK_SEL_LPPLL 0
186#define TWL6040_SYSCLK_SEL_HPPLL 1
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500187
Peter Ujfalusi5cbe7862012-08-16 15:13:14 +0300188#define TWL6040_GPO_MAX 3
189
Peter Ujfalusidf04b622013-07-12 13:32:02 +0200190/* TODO: All platform data struct can be removed */
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300191struct twl6040_codec_data {
192 u16 hs_left_step;
193 u16 hs_right_step;
194 u16 hf_left_step;
195 u16 hf_right_step;
196};
197
198struct twl6040_vibra_data {
199 unsigned int vibldrv_res; /* left driver resistance */
200 unsigned int vibrdrv_res; /* right driver resistance */
201 unsigned int viblmotor_res; /* left motor resistance */
202 unsigned int vibrmotor_res; /* right motor resistance */
203 int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */
204 int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */
205};
206
Peter Ujfalusi5cbe7862012-08-16 15:13:14 +0300207struct twl6040_gpo_data {
208 int gpio_base;
209};
210
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300211struct twl6040_platform_data {
212 int audpwron_gpio; /* audio power-on gpio */
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300213
214 struct twl6040_codec_data *codec;
215 struct twl6040_vibra_data *vibra;
Peter Ujfalusi5cbe7862012-08-16 15:13:14 +0300216 struct twl6040_gpo_data *gpo;
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300217};
218
219struct regmap;
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200220struct regmap_irq_chips_data;
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300221
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500222struct twl6040 {
223 struct device *dev;
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300224 struct regmap *regmap;
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200225 struct regmap_irq_chip_data *irq_data;
Peter Ujfalusi5af7df62012-05-02 16:54:42 +0300226 struct regulator_bulk_data supplies[2]; /* supplies for vio, v2v1 */
Peter Ujfalusi68bab862014-04-03 13:54:41 +0300227 struct clk *clk32k;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500228 struct mutex mutex;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500229 struct mutex irq_mutex;
230 struct mfd_cell cells[TWL6040_CELLS];
231 struct completion ready;
232
233 int audpwron;
234 int power_count;
235 int rev;
236
Peter Ujfalusif8447d62012-01-14 20:58:43 +0100237 /* PLL configuration */
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300238 int pll;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500239 unsigned int sysclk;
Peter Ujfalusif8447d62012-01-14 20:58:43 +0100240 unsigned int mclk;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500241
242 unsigned int irq;
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200243 unsigned int irq_ready;
244 unsigned int irq_th;
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500245};
246
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500247int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
248int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg,
249 u8 val);
250int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg,
251 u8 mask);
252int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg,
253 u8 mask);
254int twl6040_power(struct twl6040 *twl6040, int on);
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300255int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500256 unsigned int freq_in, unsigned int freq_out);
Peter Ujfalusicfb7a332011-07-04 10:28:28 +0300257int twl6040_get_pll(struct twl6040 *twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500258unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);
Peter Ujfalusiab7edb12012-10-11 13:55:32 +0200259
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300260/* Get the combined status of the vibra control register */
261int twl6040_get_vibralr_status(struct twl6040 *twl6040);
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500262
Peter Ujfalusia69882a2011-09-15 15:39:24 +0300263static inline int twl6040_get_revid(struct twl6040 *twl6040)
264{
265 return twl6040->rev;
266}
267
Peter Ujfalusi70601ec2011-10-12 11:57:55 +0300268
Misael Lopez Cruzf19b2822011-04-27 02:14:07 -0500269#endif /* End of __TWL6040_CODEC_H__ */