Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 1 | /* |
| 2 | * audio.h -- Audio Driver for Wolfson WM8350 PMIC |
| 3 | * |
Mark Brown | 40aa4a3 | 2008-12-16 10:15:12 +0000 | [diff] [blame] | 4 | * Copyright 2007, 2008 Wolfson Microelectronics PLC |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | #ifndef __LINUX_MFD_WM8350_AUDIO_H_ |
| 14 | #define __LINUX_MFD_WM8350_AUDIO_H_ |
| 15 | |
Mark Brown | add41cb | 2008-10-13 15:45:22 +0100 | [diff] [blame] | 16 | #include <linux/platform_device.h> |
| 17 | |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 18 | #define WM8350_CLOCK_CONTROL_1 0x28 |
| 19 | #define WM8350_CLOCK_CONTROL_2 0x29 |
| 20 | #define WM8350_FLL_CONTROL_1 0x2A |
| 21 | #define WM8350_FLL_CONTROL_2 0x2B |
| 22 | #define WM8350_FLL_CONTROL_3 0x2C |
| 23 | #define WM8350_FLL_CONTROL_4 0x2D |
| 24 | #define WM8350_DAC_CONTROL 0x30 |
| 25 | #define WM8350_DAC_DIGITAL_VOLUME_L 0x32 |
| 26 | #define WM8350_DAC_DIGITAL_VOLUME_R 0x33 |
| 27 | #define WM8350_DAC_LR_RATE 0x35 |
| 28 | #define WM8350_DAC_CLOCK_CONTROL 0x36 |
| 29 | #define WM8350_DAC_MUTE 0x3A |
| 30 | #define WM8350_DAC_MUTE_VOLUME 0x3B |
| 31 | #define WM8350_DAC_SIDE 0x3C |
| 32 | #define WM8350_ADC_CONTROL 0x40 |
| 33 | #define WM8350_ADC_DIGITAL_VOLUME_L 0x42 |
| 34 | #define WM8350_ADC_DIGITAL_VOLUME_R 0x43 |
| 35 | #define WM8350_ADC_DIVIDER 0x44 |
| 36 | #define WM8350_ADC_LR_RATE 0x46 |
| 37 | #define WM8350_INPUT_CONTROL 0x48 |
| 38 | #define WM8350_IN3_INPUT_CONTROL 0x49 |
| 39 | #define WM8350_MIC_BIAS_CONTROL 0x4A |
| 40 | #define WM8350_OUTPUT_CONTROL 0x4C |
| 41 | #define WM8350_JACK_DETECT 0x4D |
| 42 | #define WM8350_ANTI_POP_CONTROL 0x4E |
| 43 | #define WM8350_LEFT_INPUT_VOLUME 0x50 |
| 44 | #define WM8350_RIGHT_INPUT_VOLUME 0x51 |
| 45 | #define WM8350_LEFT_MIXER_CONTROL 0x58 |
| 46 | #define WM8350_RIGHT_MIXER_CONTROL 0x59 |
| 47 | #define WM8350_OUT3_MIXER_CONTROL 0x5C |
| 48 | #define WM8350_OUT4_MIXER_CONTROL 0x5D |
| 49 | #define WM8350_OUTPUT_LEFT_MIXER_VOLUME 0x60 |
| 50 | #define WM8350_OUTPUT_RIGHT_MIXER_VOLUME 0x61 |
| 51 | #define WM8350_INPUT_MIXER_VOLUME_L 0x62 |
| 52 | #define WM8350_INPUT_MIXER_VOLUME_R 0x63 |
| 53 | #define WM8350_INPUT_MIXER_VOLUME 0x64 |
| 54 | #define WM8350_LOUT1_VOLUME 0x68 |
| 55 | #define WM8350_ROUT1_VOLUME 0x69 |
| 56 | #define WM8350_LOUT2_VOLUME 0x6A |
| 57 | #define WM8350_ROUT2_VOLUME 0x6B |
| 58 | #define WM8350_BEEP_VOLUME 0x6F |
| 59 | #define WM8350_AI_FORMATING 0x70 |
| 60 | #define WM8350_ADC_DAC_COMP 0x71 |
| 61 | #define WM8350_AI_ADC_CONTROL 0x72 |
| 62 | #define WM8350_AI_DAC_CONTROL 0x73 |
| 63 | #define WM8350_AIF_TEST 0x74 |
| 64 | #define WM8350_JACK_PIN_STATUS 0xE7 |
| 65 | |
| 66 | /* Bit values for R08 (0x08) */ |
| 67 | #define WM8350_CODEC_ISEL_1_5 0 /* x1.5 */ |
| 68 | #define WM8350_CODEC_ISEL_1_0 1 /* x1.0 */ |
| 69 | #define WM8350_CODEC_ISEL_0_75 2 /* x0.75 */ |
| 70 | #define WM8350_CODEC_ISEL_0_5 3 /* x0.5 */ |
| 71 | |
| 72 | #define WM8350_VMID_OFF 0 |
Mark Brown | 40aa4a3 | 2008-12-16 10:15:12 +0000 | [diff] [blame] | 73 | #define WM8350_VMID_300K 1 |
| 74 | #define WM8350_VMID_50K 2 |
| 75 | #define WM8350_VMID_5K 3 |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 76 | |
| 77 | /* |
| 78 | * R40 (0x28) - Clock Control 1 |
| 79 | */ |
| 80 | #define WM8350_TOCLK_RATE 0x4000 |
| 81 | #define WM8350_MCLK_SEL 0x0800 |
| 82 | #define WM8350_MCLK_DIV_MASK 0x0100 |
| 83 | #define WM8350_BCLK_DIV_MASK 0x00F0 |
| 84 | #define WM8350_OPCLK_DIV_MASK 0x0007 |
| 85 | |
| 86 | /* |
| 87 | * R41 (0x29) - Clock Control 2 |
| 88 | */ |
| 89 | #define WM8350_LRC_ADC_SEL 0x8000 |
| 90 | #define WM8350_MCLK_DIR 0x0001 |
| 91 | |
| 92 | /* |
| 93 | * R42 (0x2A) - FLL Control 1 |
| 94 | */ |
| 95 | #define WM8350_FLL_DITHER_WIDTH_MASK 0x3000 |
| 96 | #define WM8350_FLL_DITHER_HP 0x0800 |
| 97 | #define WM8350_FLL_OUTDIV_MASK 0x0700 |
| 98 | #define WM8350_FLL_RSP_RATE_MASK 0x00F0 |
| 99 | #define WM8350_FLL_RATE_MASK 0x0007 |
| 100 | |
| 101 | /* |
| 102 | * R43 (0x2B) - FLL Control 2 |
| 103 | */ |
| 104 | #define WM8350_FLL_RATIO_MASK 0xF800 |
| 105 | #define WM8350_FLL_N_MASK 0x03FF |
| 106 | |
| 107 | /* |
| 108 | * R44 (0x2C) - FLL Control 3 |
| 109 | */ |
| 110 | #define WM8350_FLL_K_MASK 0xFFFF |
| 111 | |
| 112 | /* |
| 113 | * R45 (0x2D) - FLL Control 4 |
| 114 | */ |
| 115 | #define WM8350_FLL_FRAC 0x0020 |
| 116 | #define WM8350_FLL_SLOW_LOCK_REF 0x0010 |
| 117 | #define WM8350_FLL_CLK_SRC_MASK 0x0003 |
| 118 | |
| 119 | /* |
| 120 | * R48 (0x30) - DAC Control |
| 121 | */ |
| 122 | #define WM8350_DAC_MONO 0x2000 |
| 123 | #define WM8350_AIF_LRCLKRATE 0x1000 |
| 124 | #define WM8350_DEEMP_MASK 0x0030 |
| 125 | #define WM8350_DACL_DATINV 0x0002 |
| 126 | #define WM8350_DACR_DATINV 0x0001 |
| 127 | |
| 128 | /* |
| 129 | * R50 (0x32) - DAC Digital Volume L |
| 130 | */ |
| 131 | #define WM8350_DAC_VU 0x0100 |
| 132 | #define WM8350_DACL_VOL_MASK 0x00FF |
| 133 | |
| 134 | /* |
| 135 | * R51 (0x33) - DAC Digital Volume R |
| 136 | */ |
| 137 | #define WM8350_DAC_VU 0x0100 |
| 138 | #define WM8350_DACR_VOL_MASK 0x00FF |
| 139 | |
| 140 | /* |
| 141 | * R53 (0x35) - DAC LR Rate |
| 142 | */ |
| 143 | #define WM8350_DACLRC_ENA 0x0800 |
| 144 | #define WM8350_DACLRC_RATE_MASK 0x07FF |
| 145 | |
| 146 | /* |
| 147 | * R54 (0x36) - DAC Clock Control |
| 148 | */ |
| 149 | #define WM8350_DACCLK_POL 0x0010 |
| 150 | #define WM8350_DAC_CLKDIV_MASK 0x0007 |
| 151 | |
| 152 | /* |
| 153 | * R58 (0x3A) - DAC Mute |
| 154 | */ |
| 155 | #define WM8350_DAC_MUTE_ENA 0x4000 |
| 156 | |
| 157 | /* |
| 158 | * R59 (0x3B) - DAC Mute Volume |
| 159 | */ |
| 160 | #define WM8350_DAC_MUTEMODE 0x4000 |
| 161 | #define WM8350_DAC_MUTERATE 0x2000 |
| 162 | #define WM8350_DAC_SB_FILT 0x1000 |
| 163 | |
| 164 | /* |
| 165 | * R60 (0x3C) - DAC Side |
| 166 | */ |
| 167 | #define WM8350_ADC_TO_DACL_MASK 0x3000 |
| 168 | #define WM8350_ADC_TO_DACR_MASK 0x0C00 |
| 169 | |
| 170 | /* |
| 171 | * R64 (0x40) - ADC Control |
| 172 | */ |
| 173 | #define WM8350_ADC_HPF_CUT_MASK 0x0300 |
| 174 | #define WM8350_ADCL_DATINV 0x0002 |
| 175 | #define WM8350_ADCR_DATINV 0x0001 |
| 176 | |
| 177 | /* |
| 178 | * R66 (0x42) - ADC Digital Volume L |
| 179 | */ |
| 180 | #define WM8350_ADC_VU 0x0100 |
| 181 | #define WM8350_ADCL_VOL_MASK 0x00FF |
| 182 | |
| 183 | /* |
| 184 | * R67 (0x43) - ADC Digital Volume R |
| 185 | */ |
| 186 | #define WM8350_ADC_VU 0x0100 |
| 187 | #define WM8350_ADCR_VOL_MASK 0x00FF |
| 188 | |
| 189 | /* |
| 190 | * R68 (0x44) - ADC Divider |
| 191 | */ |
| 192 | #define WM8350_ADCL_DAC_SVOL_MASK 0x0F00 |
| 193 | #define WM8350_ADCR_DAC_SVOL_MASK 0x00F0 |
| 194 | #define WM8350_ADCCLK_POL 0x0008 |
| 195 | #define WM8350_ADC_CLKDIV_MASK 0x0007 |
| 196 | |
| 197 | /* |
| 198 | * R70 (0x46) - ADC LR Rate |
| 199 | */ |
| 200 | #define WM8350_ADCLRC_ENA 0x0800 |
| 201 | #define WM8350_ADCLRC_RATE_MASK 0x07FF |
| 202 | |
| 203 | /* |
| 204 | * R72 (0x48) - Input Control |
| 205 | */ |
| 206 | #define WM8350_IN2R_ENA 0x0400 |
| 207 | #define WM8350_IN1RN_ENA 0x0200 |
| 208 | #define WM8350_IN1RP_ENA 0x0100 |
| 209 | #define WM8350_IN2L_ENA 0x0004 |
| 210 | #define WM8350_IN1LN_ENA 0x0002 |
| 211 | #define WM8350_IN1LP_ENA 0x0001 |
| 212 | |
| 213 | /* |
| 214 | * R73 (0x49) - IN3 Input Control |
| 215 | */ |
| 216 | #define WM8350_IN3R_SHORT 0x4000 |
| 217 | #define WM8350_IN3L_SHORT 0x0040 |
| 218 | |
| 219 | /* |
| 220 | * R74 (0x4A) - Mic Bias Control |
| 221 | */ |
| 222 | #define WM8350_MICBSEL 0x4000 |
| 223 | #define WM8350_MCDTHR_MASK 0x001C |
| 224 | #define WM8350_MCDSCTHR_MASK 0x0003 |
| 225 | |
| 226 | /* |
| 227 | * R76 (0x4C) - Output Control |
| 228 | */ |
| 229 | #define WM8350_OUT4_VROI 0x0800 |
| 230 | #define WM8350_OUT3_VROI 0x0400 |
| 231 | #define WM8350_OUT2_VROI 0x0200 |
| 232 | #define WM8350_OUT1_VROI 0x0100 |
| 233 | #define WM8350_OUT2_FB 0x0004 |
| 234 | #define WM8350_OUT1_FB 0x0001 |
| 235 | |
| 236 | /* |
| 237 | * R77 (0x4D) - Jack Detect |
| 238 | */ |
| 239 | #define WM8350_JDL_ENA 0x8000 |
| 240 | #define WM8350_JDR_ENA 0x4000 |
| 241 | |
| 242 | /* |
| 243 | * R78 (0x4E) - Anti Pop Control |
| 244 | */ |
| 245 | #define WM8350_ANTI_POP_MASK 0x0300 |
| 246 | #define WM8350_DIS_OP_LN4_MASK 0x00C0 |
| 247 | #define WM8350_DIS_OP_LN3_MASK 0x0030 |
| 248 | #define WM8350_DIS_OP_OUT2_MASK 0x000C |
| 249 | #define WM8350_DIS_OP_OUT1_MASK 0x0003 |
| 250 | |
| 251 | /* |
| 252 | * R80 (0x50) - Left Input Volume |
| 253 | */ |
| 254 | #define WM8350_INL_MUTE 0x4000 |
| 255 | #define WM8350_INL_ZC 0x2000 |
| 256 | #define WM8350_IN_VU 0x0100 |
| 257 | #define WM8350_INL_VOL_MASK 0x00FC |
| 258 | |
| 259 | /* |
| 260 | * R81 (0x51) - Right Input Volume |
| 261 | */ |
| 262 | #define WM8350_INR_MUTE 0x4000 |
| 263 | #define WM8350_INR_ZC 0x2000 |
| 264 | #define WM8350_IN_VU 0x0100 |
| 265 | #define WM8350_INR_VOL_MASK 0x00FC |
| 266 | |
| 267 | /* |
| 268 | * R88 (0x58) - Left Mixer Control |
| 269 | */ |
| 270 | #define WM8350_DACR_TO_MIXOUTL 0x1000 |
| 271 | #define WM8350_DACL_TO_MIXOUTL 0x0800 |
| 272 | #define WM8350_IN3L_TO_MIXOUTL 0x0004 |
| 273 | #define WM8350_INR_TO_MIXOUTL 0x0002 |
| 274 | #define WM8350_INL_TO_MIXOUTL 0x0001 |
| 275 | |
| 276 | /* |
| 277 | * R89 (0x59) - Right Mixer Control |
| 278 | */ |
| 279 | #define WM8350_DACR_TO_MIXOUTR 0x1000 |
| 280 | #define WM8350_DACL_TO_MIXOUTR 0x0800 |
| 281 | #define WM8350_IN3R_TO_MIXOUTR 0x0008 |
| 282 | #define WM8350_INR_TO_MIXOUTR 0x0002 |
| 283 | #define WM8350_INL_TO_MIXOUTR 0x0001 |
| 284 | |
| 285 | /* |
| 286 | * R92 (0x5C) - OUT3 Mixer Control |
| 287 | */ |
| 288 | #define WM8350_DACL_TO_OUT3 0x0800 |
| 289 | #define WM8350_MIXINL_TO_OUT3 0x0100 |
| 290 | #define WM8350_OUT4_TO_OUT3 0x0008 |
| 291 | #define WM8350_MIXOUTL_TO_OUT3 0x0001 |
| 292 | |
| 293 | /* |
| 294 | * R93 (0x5D) - OUT4 Mixer Control |
| 295 | */ |
| 296 | #define WM8350_DACR_TO_OUT4 0x1000 |
| 297 | #define WM8350_DACL_TO_OUT4 0x0800 |
| 298 | #define WM8350_OUT4_ATTN 0x0400 |
| 299 | #define WM8350_MIXINR_TO_OUT4 0x0200 |
| 300 | #define WM8350_OUT3_TO_OUT4 0x0004 |
| 301 | #define WM8350_MIXOUTR_TO_OUT4 0x0002 |
| 302 | #define WM8350_MIXOUTL_TO_OUT4 0x0001 |
| 303 | |
| 304 | /* |
| 305 | * R96 (0x60) - Output Left Mixer Volume |
| 306 | */ |
| 307 | #define WM8350_IN3L_MIXOUTL_VOL_MASK 0x0E00 |
| 308 | #define WM8350_IN3L_MIXOUTL_VOL_SHIFT 9 |
| 309 | #define WM8350_INR_MIXOUTL_VOL_MASK 0x00E0 |
| 310 | #define WM8350_INR_MIXOUTL_VOL_SHIFT 5 |
| 311 | #define WM8350_INL_MIXOUTL_VOL_MASK 0x000E |
| 312 | #define WM8350_INL_MIXOUTL_VOL_SHIFT 1 |
| 313 | |
| 314 | /* Bit values for R96 (0x60) */ |
| 315 | #define WM8350_IN3L_MIXOUTL_VOL_OFF 0 |
| 316 | #define WM8350_IN3L_MIXOUTL_VOL_M12DB 1 |
| 317 | #define WM8350_IN3L_MIXOUTL_VOL_M9DB 2 |
| 318 | #define WM8350_IN3L_MIXOUTL_VOL_M6DB 3 |
| 319 | #define WM8350_IN3L_MIXOUTL_VOL_M3DB 4 |
| 320 | #define WM8350_IN3L_MIXOUTL_VOL_0DB 5 |
| 321 | #define WM8350_IN3L_MIXOUTL_VOL_3DB 6 |
| 322 | #define WM8350_IN3L_MIXOUTL_VOL_6DB 7 |
| 323 | |
| 324 | #define WM8350_INR_MIXOUTL_VOL_OFF 0 |
| 325 | #define WM8350_INR_MIXOUTL_VOL_M12DB 1 |
| 326 | #define WM8350_INR_MIXOUTL_VOL_M9DB 2 |
| 327 | #define WM8350_INR_MIXOUTL_VOL_M6DB 3 |
| 328 | #define WM8350_INR_MIXOUTL_VOL_M3DB 4 |
| 329 | #define WM8350_INR_MIXOUTL_VOL_0DB 5 |
| 330 | #define WM8350_INR_MIXOUTL_VOL_3DB 6 |
| 331 | #define WM8350_INR_MIXOUTL_VOL_6DB 7 |
| 332 | |
| 333 | #define WM8350_INL_MIXOUTL_VOL_OFF 0 |
| 334 | #define WM8350_INL_MIXOUTL_VOL_M12DB 1 |
| 335 | #define WM8350_INL_MIXOUTL_VOL_M9DB 2 |
| 336 | #define WM8350_INL_MIXOUTL_VOL_M6DB 3 |
| 337 | #define WM8350_INL_MIXOUTL_VOL_M3DB 4 |
| 338 | #define WM8350_INL_MIXOUTL_VOL_0DB 5 |
| 339 | #define WM8350_INL_MIXOUTL_VOL_3DB 6 |
| 340 | #define WM8350_INL_MIXOUTL_VOL_6DB 7 |
| 341 | |
| 342 | /* |
| 343 | * R97 (0x61) - Output Right Mixer Volume |
| 344 | */ |
| 345 | #define WM8350_IN3R_MIXOUTR_VOL_MASK 0xE000 |
| 346 | #define WM8350_IN3R_MIXOUTR_VOL_SHIFT 13 |
| 347 | #define WM8350_INR_MIXOUTR_VOL_MASK 0x00E0 |
| 348 | #define WM8350_INR_MIXOUTR_VOL_SHIFT 5 |
| 349 | #define WM8350_INL_MIXOUTR_VOL_MASK 0x000E |
| 350 | #define WM8350_INL_MIXOUTR_VOL_SHIFT 1 |
| 351 | |
| 352 | /* Bit values for R96 (0x60) */ |
| 353 | #define WM8350_IN3R_MIXOUTR_VOL_OFF 0 |
| 354 | #define WM8350_IN3R_MIXOUTR_VOL_M12DB 1 |
| 355 | #define WM8350_IN3R_MIXOUTR_VOL_M9DB 2 |
| 356 | #define WM8350_IN3R_MIXOUTR_VOL_M6DB 3 |
| 357 | #define WM8350_IN3R_MIXOUTR_VOL_M3DB 4 |
| 358 | #define WM8350_IN3R_MIXOUTR_VOL_0DB 5 |
| 359 | #define WM8350_IN3R_MIXOUTR_VOL_3DB 6 |
| 360 | #define WM8350_IN3R_MIXOUTR_VOL_6DB 7 |
| 361 | |
| 362 | #define WM8350_INR_MIXOUTR_VOL_OFF 0 |
| 363 | #define WM8350_INR_MIXOUTR_VOL_M12DB 1 |
| 364 | #define WM8350_INR_MIXOUTR_VOL_M9DB 2 |
| 365 | #define WM8350_INR_MIXOUTR_VOL_M6DB 3 |
| 366 | #define WM8350_INR_MIXOUTR_VOL_M3DB 4 |
| 367 | #define WM8350_INR_MIXOUTR_VOL_0DB 5 |
| 368 | #define WM8350_INR_MIXOUTR_VOL_3DB 6 |
| 369 | #define WM8350_INR_MIXOUTR_VOL_6DB 7 |
| 370 | |
| 371 | #define WM8350_INL_MIXOUTR_VOL_OFF 0 |
| 372 | #define WM8350_INL_MIXOUTR_VOL_M12DB 1 |
| 373 | #define WM8350_INL_MIXOUTR_VOL_M9DB 2 |
| 374 | #define WM8350_INL_MIXOUTR_VOL_M6DB 3 |
| 375 | #define WM8350_INL_MIXOUTR_VOL_M3DB 4 |
| 376 | #define WM8350_INL_MIXOUTR_VOL_0DB 5 |
| 377 | #define WM8350_INL_MIXOUTR_VOL_3DB 6 |
| 378 | #define WM8350_INL_MIXOUTR_VOL_6DB 7 |
| 379 | |
| 380 | /* |
| 381 | * R98 (0x62) - Input Mixer Volume L |
| 382 | */ |
| 383 | #define WM8350_IN3L_MIXINL_VOL_MASK 0x0E00 |
| 384 | #define WM8350_IN2L_MIXINL_VOL_MASK 0x000E |
| 385 | #define WM8350_INL_MIXINL_VOL 0x0001 |
| 386 | |
| 387 | /* |
| 388 | * R99 (0x63) - Input Mixer Volume R |
| 389 | */ |
| 390 | #define WM8350_IN3R_MIXINR_VOL_MASK 0xE000 |
| 391 | #define WM8350_IN2R_MIXINR_VOL_MASK 0x00E0 |
| 392 | #define WM8350_INR_MIXINR_VOL 0x0001 |
| 393 | |
| 394 | /* |
| 395 | * R100 (0x64) - Input Mixer Volume |
| 396 | */ |
| 397 | #define WM8350_OUT4_MIXIN_DST 0x8000 |
| 398 | #define WM8350_OUT4_MIXIN_VOL_MASK 0x000E |
| 399 | |
| 400 | /* |
| 401 | * R104 (0x68) - LOUT1 Volume |
| 402 | */ |
| 403 | #define WM8350_OUT1L_MUTE 0x4000 |
| 404 | #define WM8350_OUT1L_ZC 0x2000 |
| 405 | #define WM8350_OUT1_VU 0x0100 |
| 406 | #define WM8350_OUT1L_VOL_MASK 0x00FC |
| 407 | #define WM8350_OUT1L_VOL_SHIFT 2 |
| 408 | |
| 409 | /* |
| 410 | * R105 (0x69) - ROUT1 Volume |
| 411 | */ |
| 412 | #define WM8350_OUT1R_MUTE 0x4000 |
| 413 | #define WM8350_OUT1R_ZC 0x2000 |
| 414 | #define WM8350_OUT1_VU 0x0100 |
| 415 | #define WM8350_OUT1R_VOL_MASK 0x00FC |
| 416 | #define WM8350_OUT1R_VOL_SHIFT 2 |
| 417 | |
| 418 | /* |
| 419 | * R106 (0x6A) - LOUT2 Volume |
| 420 | */ |
| 421 | #define WM8350_OUT2L_MUTE 0x4000 |
| 422 | #define WM8350_OUT2L_ZC 0x2000 |
| 423 | #define WM8350_OUT2_VU 0x0100 |
| 424 | #define WM8350_OUT2L_VOL_MASK 0x00FC |
| 425 | |
| 426 | /* |
| 427 | * R107 (0x6B) - ROUT2 Volume |
| 428 | */ |
| 429 | #define WM8350_OUT2R_MUTE 0x4000 |
| 430 | #define WM8350_OUT2R_ZC 0x2000 |
| 431 | #define WM8350_OUT2R_INV 0x0400 |
| 432 | #define WM8350_OUT2R_INV_MUTE 0x0200 |
| 433 | #define WM8350_OUT2_VU 0x0100 |
| 434 | #define WM8350_OUT2R_VOL_MASK 0x00FC |
| 435 | |
| 436 | /* |
| 437 | * R111 (0x6F) - BEEP Volume |
| 438 | */ |
| 439 | #define WM8350_IN3R_OUT2R_VOL_MASK 0x00E0 |
| 440 | |
| 441 | /* |
| 442 | * R112 (0x70) - AI Formating |
| 443 | */ |
| 444 | #define WM8350_AIF_BCLK_INV 0x8000 |
| 445 | #define WM8350_AIF_TRI 0x2000 |
| 446 | #define WM8350_AIF_LRCLK_INV 0x1000 |
| 447 | #define WM8350_AIF_WL_MASK 0x0C00 |
| 448 | #define WM8350_AIF_FMT_MASK 0x0300 |
| 449 | |
| 450 | /* |
| 451 | * R113 (0x71) - ADC DAC COMP |
| 452 | */ |
| 453 | #define WM8350_DAC_COMP 0x0080 |
| 454 | #define WM8350_DAC_COMPMODE 0x0040 |
| 455 | #define WM8350_ADC_COMP 0x0020 |
| 456 | #define WM8350_ADC_COMPMODE 0x0010 |
| 457 | #define WM8350_LOOPBACK 0x0001 |
| 458 | |
| 459 | /* |
| 460 | * R114 (0x72) - AI ADC Control |
| 461 | */ |
| 462 | #define WM8350_AIFADC_PD 0x0080 |
| 463 | #define WM8350_AIFADCL_SRC 0x0040 |
| 464 | #define WM8350_AIFADCR_SRC 0x0020 |
| 465 | #define WM8350_AIFADC_TDM_CHAN 0x0010 |
| 466 | #define WM8350_AIFADC_TDM 0x0008 |
| 467 | |
| 468 | /* |
| 469 | * R115 (0x73) - AI DAC Control |
| 470 | */ |
| 471 | #define WM8350_BCLK_MSTR 0x4000 |
| 472 | #define WM8350_AIFDAC_PD 0x0080 |
| 473 | #define WM8350_DACL_SRC 0x0040 |
| 474 | #define WM8350_DACR_SRC 0x0020 |
| 475 | #define WM8350_AIFDAC_TDM_CHAN 0x0010 |
| 476 | #define WM8350_AIFDAC_TDM 0x0008 |
| 477 | #define WM8350_DAC_BOOST_MASK 0x0003 |
| 478 | |
| 479 | /* |
| 480 | * R116 (0x74) - AIF Test |
| 481 | */ |
| 482 | #define WM8350_CODEC_BYP 0x4000 |
| 483 | #define WM8350_AIFADC_WR_TST 0x2000 |
| 484 | #define WM8350_AIFADC_RD_TST 0x1000 |
| 485 | #define WM8350_AIFDAC_WR_TST 0x0800 |
| 486 | #define WM8350_AIFDAC_RD_TST 0x0400 |
| 487 | #define WM8350_AIFADC_ASYN 0x0020 |
| 488 | #define WM8350_AIFDAC_ASYN 0x0010 |
| 489 | |
| 490 | /* |
| 491 | * R231 (0xE7) - Jack Status |
| 492 | */ |
Mark Brown | a6ba2b2 | 2009-01-08 15:16:16 +0000 | [diff] [blame] | 493 | #define WM8350_JACK_L_LVL 0x0800 |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 494 | #define WM8350_JACK_R_LVL 0x0400 |
Mark Brown | 2a0761a | 2010-03-16 15:54:12 +0000 | [diff] [blame] | 495 | #define WM8350_JACK_MICSCD_LVL 0x0200 |
| 496 | #define WM8350_JACK_MICSD_LVL 0x0100 |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 497 | |
| 498 | /* |
| 499 | * WM8350 Platform setup |
| 500 | */ |
| 501 | #define WM8350_S_CURVE_NONE 0x0 |
| 502 | #define WM8350_S_CURVE_FAST 0x1 |
| 503 | #define WM8350_S_CURVE_MEDIUM 0x2 |
| 504 | #define WM8350_S_CURVE_SLOW 0x3 |
| 505 | |
| 506 | #define WM8350_DISCHARGE_OFF 0x0 |
| 507 | #define WM8350_DISCHARGE_FAST 0x1 |
| 508 | #define WM8350_DISCHARGE_MEDIUM 0x2 |
| 509 | #define WM8350_DISCHARGE_SLOW 0x3 |
| 510 | |
| 511 | #define WM8350_TIE_OFF_500R 0x0 |
| 512 | #define WM8350_TIE_OFF_30K 0x1 |
| 513 | |
| 514 | /* |
| 515 | * Clock sources & directions |
| 516 | */ |
| 517 | #define WM8350_SYSCLK 0 |
| 518 | |
| 519 | #define WM8350_MCLK_SEL_PLL_MCLK 0 |
| 520 | #define WM8350_MCLK_SEL_PLL_DAC 1 |
| 521 | #define WM8350_MCLK_SEL_PLL_ADC 2 |
| 522 | #define WM8350_MCLK_SEL_PLL_32K 3 |
| 523 | #define WM8350_MCLK_SEL_MCLK 5 |
| 524 | |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 525 | /* clock divider id's */ |
| 526 | #define WM8350_ADC_CLKDIV 0 |
| 527 | #define WM8350_DAC_CLKDIV 1 |
| 528 | #define WM8350_BCLK_CLKDIV 2 |
| 529 | #define WM8350_OPCLK_CLKDIV 3 |
| 530 | #define WM8350_TO_CLKDIV 4 |
| 531 | #define WM8350_SYS_CLKDIV 5 |
| 532 | #define WM8350_DACLR_CLKDIV 6 |
| 533 | #define WM8350_ADCLR_CLKDIV 7 |
| 534 | |
| 535 | /* ADC clock dividers */ |
| 536 | #define WM8350_ADCDIV_1 0x0 |
| 537 | #define WM8350_ADCDIV_1_5 0x1 |
| 538 | #define WM8350_ADCDIV_2 0x2 |
| 539 | #define WM8350_ADCDIV_3 0x3 |
| 540 | #define WM8350_ADCDIV_4 0x4 |
| 541 | #define WM8350_ADCDIV_5_5 0x5 |
| 542 | #define WM8350_ADCDIV_6 0x6 |
| 543 | |
| 544 | /* ADC clock dividers */ |
| 545 | #define WM8350_DACDIV_1 0x0 |
| 546 | #define WM8350_DACDIV_1_5 0x1 |
| 547 | #define WM8350_DACDIV_2 0x2 |
| 548 | #define WM8350_DACDIV_3 0x3 |
| 549 | #define WM8350_DACDIV_4 0x4 |
| 550 | #define WM8350_DACDIV_5_5 0x5 |
| 551 | #define WM8350_DACDIV_6 0x6 |
| 552 | |
| 553 | /* BCLK clock dividers */ |
| 554 | #define WM8350_BCLK_DIV_1 (0x0 << 4) |
| 555 | #define WM8350_BCLK_DIV_1_5 (0x1 << 4) |
| 556 | #define WM8350_BCLK_DIV_2 (0x2 << 4) |
| 557 | #define WM8350_BCLK_DIV_3 (0x3 << 4) |
| 558 | #define WM8350_BCLK_DIV_4 (0x4 << 4) |
| 559 | #define WM8350_BCLK_DIV_5_5 (0x5 << 4) |
| 560 | #define WM8350_BCLK_DIV_6 (0x6 << 4) |
| 561 | #define WM8350_BCLK_DIV_8 (0x7 << 4) |
| 562 | #define WM8350_BCLK_DIV_11 (0x8 << 4) |
| 563 | #define WM8350_BCLK_DIV_12 (0x9 << 4) |
| 564 | #define WM8350_BCLK_DIV_16 (0xa << 4) |
| 565 | #define WM8350_BCLK_DIV_22 (0xb << 4) |
| 566 | #define WM8350_BCLK_DIV_24 (0xc << 4) |
| 567 | #define WM8350_BCLK_DIV_32 (0xd << 4) |
| 568 | #define WM8350_BCLK_DIV_44 (0xe << 4) |
| 569 | #define WM8350_BCLK_DIV_48 (0xf << 4) |
| 570 | |
| 571 | /* Sys (MCLK) clock dividers */ |
| 572 | #define WM8350_MCLK_DIV_1 (0x0 << 8) |
| 573 | #define WM8350_MCLK_DIV_2 (0x1 << 8) |
| 574 | |
| 575 | /* OP clock dividers */ |
| 576 | #define WM8350_OPCLK_DIV_1 0x0 |
| 577 | #define WM8350_OPCLK_DIV_2 0x1 |
| 578 | #define WM8350_OPCLK_DIV_3 0x2 |
| 579 | #define WM8350_OPCLK_DIV_4 0x3 |
| 580 | #define WM8350_OPCLK_DIV_5_5 0x4 |
| 581 | #define WM8350_OPCLK_DIV_6 0x5 |
| 582 | |
| 583 | /* DAI ID */ |
| 584 | #define WM8350_HIFI_DAI 0 |
| 585 | |
| 586 | /* |
| 587 | * Audio interrupts. |
| 588 | */ |
| 589 | #define WM8350_IRQ_CODEC_JCK_DET_L 39 |
| 590 | #define WM8350_IRQ_CODEC_JCK_DET_R 40 |
| 591 | #define WM8350_IRQ_CODEC_MICSCD 41 |
| 592 | #define WM8350_IRQ_CODEC_MICD 42 |
| 593 | |
Mark Brown | 40aa4a3 | 2008-12-16 10:15:12 +0000 | [diff] [blame] | 594 | /* |
| 595 | * WM8350 Platform data. |
| 596 | * |
| 597 | * This must be initialised per platform for best audio performance. |
| 598 | * Please see WM8350 datasheet for information. |
| 599 | */ |
| 600 | struct wm8350_audio_platform_data { |
| 601 | int vmid_discharge_msecs; /* VMID --> OFF discharge time */ |
| 602 | int drain_msecs; /* OFF drain time */ |
| 603 | int cap_discharge_msecs; /* Cap ON (from OFF) discharge time */ |
| 604 | int vmid_charge_msecs; /* vmid power up time */ |
| 605 | u32 vmid_s_curve:2; /* vmid enable s curve speed */ |
| 606 | u32 dis_out4:2; /* out4 discharge speed */ |
| 607 | u32 dis_out3:2; /* out3 discharge speed */ |
| 608 | u32 dis_out2:2; /* out2 discharge speed */ |
| 609 | u32 dis_out1:2; /* out1 discharge speed */ |
| 610 | u32 vroi_out4:1; /* out4 tie off */ |
| 611 | u32 vroi_out3:1; /* out3 tie off */ |
| 612 | u32 vroi_out2:1; /* out2 tie off */ |
| 613 | u32 vroi_out1:1; /* out1 tie off */ |
| 614 | u32 vroi_enable:1; /* enable tie off */ |
| 615 | u32 codec_current_on:2; /* current level ON */ |
| 616 | u32 codec_current_standby:2; /* current level STANDBY */ |
| 617 | u32 codec_current_charge:2; /* codec current @ vmid charge */ |
| 618 | }; |
| 619 | |
| 620 | struct snd_soc_codec; |
| 621 | |
Mark Brown | add41cb | 2008-10-13 15:45:22 +0100 | [diff] [blame] | 622 | struct wm8350_codec { |
| 623 | struct platform_device *pdev; |
Mark Brown | 40aa4a3 | 2008-12-16 10:15:12 +0000 | [diff] [blame] | 624 | struct snd_soc_codec *codec; |
| 625 | struct wm8350_audio_platform_data *platform_data; |
Mark Brown | add41cb | 2008-10-13 15:45:22 +0100 | [diff] [blame] | 626 | }; |
| 627 | |
Mark Brown | 06532c4 | 2008-10-10 15:58:03 +0100 | [diff] [blame] | 628 | #endif |