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Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08001# Put here option for CPU selection and depending optimization
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08002choice
3 prompt "Processor family"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +01004 default M686 if X86_32
5 default GENERIC_CPU if X86_64
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08006 ---help---
H. Peter Anvineb068e72012-11-28 11:50:23 -08007 This is the processor type of your CPU. This information is
8 used for optimizing purposes. In order to compile a kernel
9 that can run on all supported x86 CPU types (albeit not
10 optimally fast), you can specify "486" here.
11
12 Note that the 386 is no longer supported, this includes
13 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
H. Peter Anvin11af32b2012-11-29 13:28:39 -080014 UMC 486SX-S and the NexGen Nx586.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080015
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080021 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
Borislav Petkov221836e2015-10-19 10:41:17 +020022 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080023 - "586" for generic Pentium CPUs lacking the TSC
Borislav Petkov221836e2015-10-19 10:41:17 +020024 (time stamp counter) register.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080025 - "Pentium-Classic" for the Intel Pentium.
26 - "Pentium-MMX" for the Intel Pentium MMX.
27 - "Pentium-Pro" for the Intel Pentium Pro.
28 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
29 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
30 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
31 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
32 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
Borislav Petkov221836e2015-10-19 10:41:17 +020033 - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080034 - "Crusoe" for the Transmeta Crusoe series.
35 - "Efficeon" for the Transmeta Efficeon series.
36 - "Winchip-C6" for original IDT Winchip.
Krzysztof Helt69d45dd2008-09-28 21:28:15 +020037 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
Borislav Petkov221836e2015-10-19 10:41:17 +020038 - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080039 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
Jordan Crousef90b8112006-01-06 00:12:14 -080040 - "Geode GX/LX" For AMD Geode GX and LX processors.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080041 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
Egry Gabor48a12042006-06-26 18:47:15 +020042 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
Simon Arlott0949be32007-05-02 19:27:05 +020043 - "VIA C7" for VIA C7.
Borislav Petkov221836e2015-10-19 10:41:17 +020044 - "Intel P4" for the Pentium 4/Netburst microarchitecture.
45 - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
46 - "Intel Atom" for the Atom-microarchitecture CPUs.
47 - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080048
Borislav Petkov221836e2015-10-19 10:41:17 +020049 See each option's help text for additional details. If you don't know
50 what to do, choose "486".
51
52config M486
53 bool "486"
54 depends on X86_32
55 ---help---
56 Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
57 486DX/DX2/DX4 or SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080058
59config M586
60 bool "586/K5/5x86/6x86/6x86MX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010061 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010062 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080063 Select this for an 586 or 686 series processor such as the AMD K5,
64 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
65 assume the RDTSC (Read Time Stamp Counter) instruction.
66
67config M586TSC
68 bool "Pentium-Classic"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010069 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010070 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080071 Select this for a Pentium Classic processor with the RDTSC (Read
72 Time Stamp Counter) instruction for benchmarking.
73
74config M586MMX
75 bool "Pentium-MMX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010076 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010077 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080078 Select this for a Pentium with the MMX graphics/multimedia
79 extended instructions.
80
81config M686
82 bool "Pentium-Pro"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010083 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010084 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080085 Select this for Intel Pentium Pro chips. This enables the use of
86 Pentium Pro extended instructions, and disables the init-time guard
87 against the f00f bug found in earlier Pentiums.
88
89config MPENTIUMII
90 bool "Pentium-II/Celeron(pre-Coppermine)"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010091 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010092 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080093 Select this for Intel chips based on the Pentium-II and
94 pre-Coppermine Celeron core. This option enables an unaligned
95 copy optimization, compiles the kernel with optimization flags
96 tailored for the chip, and applies any applicable Pentium Pro
97 optimizations.
98
99config MPENTIUMIII
100 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100101 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100102 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800103 Select this for Intel chips based on the Pentium-III and
104 Celeron-Coppermine core. This option enables use of some
105 extended prefetch instructions in addition to the Pentium II
106 extensions.
107
108config MPENTIUMM
109 bool "Pentium M"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100110 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100111 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800112 Select this for Intel Pentium M (not Pentium-4 M)
113 notebook chips.
114
115config MPENTIUM4
Andi Kleenc55d92d2006-12-07 02:14:09 +0100116 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100117 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100118 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800119 Select this for Intel Pentium 4 chips. This includes the
Oliver Pinter75e38082007-10-17 18:04:36 +0200120 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
121 Pentium-4 M (not Pentium M) chips. This option enables compile
122 flags optimized for the chip, uses the correct cache line size, and
123 applies any applicable optimizations.
124
125 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
126
127 Select this for:
128 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
129 -Willamette
130 -Northwood
131 -Mobile Pentium 4
132 -Mobile Pentium 4 M
133 -Extreme Edition (Gallatin)
134 -Prescott
135 -Prescott 2M
136 -Cedar Mill
137 -Presler
138 -Smithfiled
139 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
140 -Foster
141 -Prestonia
142 -Gallatin
143 -Nocona
144 -Irwindale
145 -Cranford
146 -Potomac
147 -Paxville
148 -Dempsey
149
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800150
151config MK6
152 bool "K6/K6-II/K6-III"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100153 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100154 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800155 Select this for an AMD K6-family processor. Enables use of
156 some extended instructions, and passes appropriate optimization
157 flags to GCC.
158
159config MK7
160 bool "Athlon/Duron/K7"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100161 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100162 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800163 Select this for an AMD Athlon K7-family processor. Enables use of
164 some extended instructions, and passes appropriate optimization
165 flags to GCC.
166
167config MK8
168 bool "Opteron/Athlon64/Hammer/K8"
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100169 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100170 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
171 Enables use of some extended instructions, and passes appropriate
172 optimization flags to GCC.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800173
174config MCRUSOE
175 bool "Crusoe"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100176 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100177 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800178 Select this for a Transmeta Crusoe processor. Treats the processor
179 like a 586 with TSC, and sets some GCC optimization flags (like a
180 Pentium Pro with no alignment requirements).
181
182config MEFFICEON
183 bool "Efficeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100184 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100185 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800186 Select this for a Transmeta Efficeon processor.
187
188config MWINCHIPC6
189 bool "Winchip-C6"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100190 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100191 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800192 Select this for an IDT Winchip C6 chip. Linux and GCC
193 treat this chip as a 586TSC with some extended instructions
194 and alignment requirements.
195
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800196config MWINCHIP3D
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200197 bool "Winchip-2/Winchip-2A/Winchip-3"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100198 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100199 ---help---
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200200 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800201 treat this chip as a 586TSC with some extended instructions
David Sterba3dde6ad2007-05-09 07:12:20 +0200202 and alignment requirements. Also enable out of order memory
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800203 stores for this CPU, which can increase performance of some
204 operations.
205
Ian Campbellce9c99a2011-04-08 07:42:29 +0100206config MELAN
207 bool "AMD Elan"
208 depends on X86_32
209 ---help---
210 Select this for an AMD Elan processor.
211
212 Do not use this option for K6/Athlon/Opteron processors!
213
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800214config MGEODEGX1
215 bool "GeodeGX1"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100216 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100217 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800218 Select this for a Geode GX1 (Cyrix MediaGX) chip.
219
Jordan Crousef90b8112006-01-06 00:12:14 -0800220config MGEODE_LX
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100221 bool "Geode GX/LX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100222 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100223 ---help---
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100224 Select this for AMD Geode GX and LX processors.
Jordan Crousef90b8112006-01-06 00:12:14 -0800225
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800226config MCYRIXIII
227 bool "CyrixIII/VIA-C3"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100228 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100229 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800230 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
231 treat this chip as a generic 586. Whilst the CPU is 686 class,
232 it lacks the cmov extension which gcc assumes is present when
233 generating 686 code.
234 Note that Nehemiah (Model 9) and above will not boot with this
235 kernel due to them lacking the 3DNow! instructions used in earlier
236 incarnations of the CPU.
237
238config MVIAC3_2
239 bool "VIA C3-2 (Nehemiah)"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100240 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100241 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800242 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
243 of SSE and tells gcc to treat the CPU as a 686.
244 Note, this kernel will not boot on older (pre model 9) C3s.
245
Simon Arlott0949be32007-05-02 19:27:05 +0200246config MVIAC7
247 bool "VIA C7"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100248 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100249 ---help---
Simon Arlott0949be32007-05-02 19:27:05 +0200250 Select this for a VIA C7. Selecting this uses the correct cache
251 shift and tells gcc to treat the CPU as a 686.
252
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100253config MPSC
254 bool "Intel P4 / older Netburst based Xeon"
255 depends on X86_64
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100256 ---help---
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100257 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
258 Xeon CPUs with Intel 64bit which is compatible with x86-64.
259 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100260 Netburst core and shouldn't use this option. You can distinguish them
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100261 using the cpu family field
262 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
263
264config MCORE2
265 bool "Core 2/newer Xeon"
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100266 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100267
268 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
269 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
270 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
271 (not a typo)
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100272
Tobias Doerffel366d19e2009-08-21 23:06:23 +0200273config MATOM
274 bool "Intel Atom"
275 ---help---
276
277 Select this for the Intel Atom platform. Intel Atom CPUs have an
278 in-order pipelining architecture and thus can benefit from
279 accordingly optimized code. Use a recent GCC with specific Atom
280 support in order to fully benefit from selecting this option.
281
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100282config GENERIC_CPU
283 bool "Generic-x86-64"
284 depends on X86_64
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100285 ---help---
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100286 Generic x86-64 CPU.
287 Run equally well on all x86-64 CPUs.
288
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800289endchoice
290
291config X86_GENERIC
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100292 bool "Generic x86 support"
293 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100294 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800295 Instead of just including optimizations for the selected
296 x86 variant (e.g. PII, Crusoe or Athlon), include some more
297 generic optimizations as well. This will make the kernel
298 perform better on x86 CPUs other than that selected.
299
300 This is really intended for distributors who need more
301 generic optimizations.
302
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800303#
304# Define implied options from the CPU selection here
Jan Beulich350f8f52009-11-13 11:54:40 +0000305config X86_INTERNODE_CACHE_SHIFT
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100306 int
Jan Beulich350f8f52009-11-13 11:54:40 +0000307 default "12" if X86_VSMP
Jan Beulich350f8f52009-11-13 11:54:40 +0000308 default X86_L1_CACHE_SHIFT
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100309
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800310config X86_L1_CACHE_SHIFT
311 int
Ingo Molnar0a2a18b72009-01-12 23:37:16 +0100312 default "7" if MPENTIUM4 || MPSC
Jan Beulich350f8f52009-11-13 11:54:40 +0000313 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
H. Peter Anvineb068e72012-11-28 11:50:23 -0800314 default "4" if MELAN || M486 || MGEODEGX1
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200315 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800316
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800317config X86_PPRO_FENCE
Nick Pigginfb0328e2008-01-30 13:32:31 +0100318 bool "PentiumPro memory ordering errata workaround"
H. Peter Anvineb068e72012-11-28 11:50:23 -0800319 depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100320 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100321 Old PentiumPro multiprocessor systems had errata that could cause
322 memory operations to violate the x86 ordering standard in rare cases.
323 Enabling this option will attempt to work around some (but not all)
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300324 occurrences of this problem, at the cost of much heavier spinlock and
Borislav Petkov36723bf2009-02-04 21:44:04 +0100325 memory barrier operations.
Nick Pigginfb0328e2008-01-30 13:32:31 +0100326
Borislav Petkov36723bf2009-02-04 21:44:04 +0100327 If unsure, say n here. Even distro kernels should think twice before
328 enabling this: there are few systems, and an unlikely bug.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800329
330config X86_F00F_BUG
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100331 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800332 depends on M586MMX || M586TSC || M586 || M486
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800333
Brian Gerst40d2e762010-03-21 09:00:43 -0400334config X86_INVD_BUG
335 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800336 depends on M486
Brian Gerst40d2e762010-03-21 09:00:43 -0400337
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800338config X86_ALIGNMENT_16
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100339 def_bool y
Ian Campbellce9c99a2011-04-08 07:42:29 +0100340 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800341
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800342config X86_INTEL_USERCOPY
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100343 def_bool y
Andi Kleenc55d92d2006-12-07 02:14:09 +0100344 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800345
346config X86_USE_PPRO_CHECKSUM
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100347 def_bool y
Jon Nettleton1eda75c2011-03-16 15:32:47 +0000348 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800349
350config X86_USE_3DNOW
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100351 def_bool y
Paolo 'Blaisorblade' Giarrusso1b4ad242006-10-11 01:21:35 -0700352 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800353
H. Peter Anvin959b3be2008-02-14 14:56:45 -0800354#
355# P6_NOPs are a relatively minor optimization that require a family >=
356# 6 processor, except that it is broken on certain VIA chips.
357# Furthermore, AMD chips prefer a totally different sequence of NOPs
Linus Torvalds14469a82008-09-05 09:30:14 -0700358# (which work on all CPUs). In addition, it looks like Virtual PC
359# does not understand them.
360#
361# As a result, disallow these if we're not compiling for X86_64 (these
362# NOPs do work on all x86-64 capable chips); the list of processors in
363# the right-hand clause are the cores that benefit from this optimization.
H. Peter Anvin959b3be2008-02-14 14:56:45 -0800364#
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800365config X86_P6_NOP
366 def_bool y
Linus Torvalds14469a82008-09-05 09:30:14 -0700367 depends on X86_64
368 depends on (MCORE2 || MPENTIUM4 || MPSC)
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800369
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800370config X86_TSC
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100371 def_bool y
H. Peter Anvinb5660ba2014-02-25 12:14:06 -0800372 depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
Andi Kleenc7f81c92007-05-02 19:27:20 +0200373
Jan Beulichf8096f92008-04-22 16:27:29 +0100374config X86_CMPXCHG64
375 def_bool y
Rusty Russelldb677ff2010-01-05 12:48:49 +1030376 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
Jan Beulichf8096f92008-04-22 16:27:29 +0100377
Andi Kleenc7f81c92007-05-02 19:27:20 +0200378# this should be set for all -march=.. options where the compiler
379# generates cmov.
380config X86_CMOV
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100381 def_bool y
Matteo Croce98059e32009-10-01 17:11:10 +0200382 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
Andi Kleenc7f81c92007-05-02 19:27:20 +0200383
H. Peter Anvinde32e042007-07-11 12:18:30 -0700384config X86_MINIMUM_CPU_FAMILY
Andi Kleenc7f81c92007-05-02 19:27:20 +0200385 int
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100386 default "64" if X86_64
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800387 default "6" if X86_32 && X86_P6_NOP
Linus Torvalds982d0072009-09-30 17:57:27 -0700388 default "5" if X86_32 && X86_CMPXCHG64
H. Peter Anvineb068e72012-11-28 11:50:23 -0800389 default "4"
Andi Kleenc7f81c92007-05-02 19:27:20 +0200390
Roland McGrath0a049bb2008-01-30 13:30:54 +0100391config X86_DEBUGCTLMSR
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100392 def_bool y
H. Peter Anvineb068e72012-11-28 11:50:23 -0800393 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486) && !UML
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200394
395menuconfig PROCESSOR_SELECT
David Rientjes6a108a12011-01-20 14:44:16 -0800396 bool "Supported processor vendors" if EXPERT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100397 ---help---
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200398 This lets you choose what x86 vendor support code your kernel
399 will include.
400
Yinghai Lu879d7922008-09-09 16:40:37 -0700401config CPU_SUP_INTEL
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200402 default y
403 bool "Support Intel processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100404 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200405 This enables detection, tunings and quirks for Intel processors
406
407 You need this enabled if you want your kernel to run on an
408 Intel CPU. Disabling this option on other types of CPUs
409 makes the kernel a tiny bit smaller. Disabling it on an Intel
410 CPU might render the kernel unbootable.
411
412 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200413
414config CPU_SUP_CYRIX_32
415 default y
416 bool "Support Cyrix processors" if PROCESSOR_SELECT
H. Peter Anvineb068e72012-11-28 11:50:23 -0800417 depends on M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100418 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200419 This enables detection, tunings and quirks for Cyrix processors
420
421 You need this enabled if you want your kernel to run on a
422 Cyrix CPU. Disabling this option on other types of CPUs
423 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
424 CPU might render the kernel unbootable.
425
426 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200427
Yinghai Luff731522008-09-07 17:58:56 -0700428config CPU_SUP_AMD
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200429 default y
430 bool "Support AMD processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100431 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200432 This enables detection, tunings and quirks for AMD processors
433
434 You need this enabled if you want your kernel to run on an
435 AMD CPU. Disabling this option on other types of CPUs
436 makes the kernel a tiny bit smaller. Disabling it on an AMD
437 CPU might render the kernel unbootable.
438
439 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200440
Sebastian Andrzej Siewior48f4c482009-03-14 12:24:02 +0100441config CPU_SUP_CENTAUR
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200442 default y
443 bool "Support Centaur processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100444 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200445 This enables detection, tunings and quirks for Centaur processors
446
447 You need this enabled if you want your kernel to run on a
448 Centaur CPU. Disabling this option on other types of CPUs
449 makes the kernel a tiny bit smaller. Disabling it on a Centaur
450 CPU might render the kernel unbootable.
451
452 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200453
454config CPU_SUP_TRANSMETA_32
455 default y
456 bool "Support Transmeta processors" if PROCESSOR_SELECT
457 depends on !64BIT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100458 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200459 This enables detection, tunings and quirks for Transmeta processors
460
461 You need this enabled if you want your kernel to run on a
462 Transmeta CPU. Disabling this option on other types of CPUs
463 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
464 CPU might render the kernel unbootable.
465
466 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200467
468config CPU_SUP_UMC_32
469 default y
470 bool "Support UMC processors" if PROCESSOR_SELECT
H. Peter Anvineb068e72012-11-28 11:50:23 -0800471 depends on M486 || (EXPERT && !64BIT)
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100472 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200473 This enables detection, tunings and quirks for UMC processors
474
475 You need this enabled if you want your kernel to run on a
476 UMC CPU. Disabling this option on other types of CPUs
477 makes the kernel a tiny bit smaller. Disabling it on a UMC
478 CPU might render the kernel unbootable.
479
480 If unsure, say N.