Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 1 | /* |
| 2 | * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de> |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de |
| 4 | * |
| 5 | * Based on code from Freescale, |
| 6 | * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * as published by the Free Software Foundation; either version 2 |
| 11 | * of the License, or (at your option) any later version. |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 20 | * MA 02110-1301, USA. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/io.h> |
| 26 | #include <linux/irq.h> |
| 27 | #include <linux/gpio.h> |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 28 | #include <linux/platform_device.h> |
| 29 | #include <linux/slab.h> |
| 30 | #include <mach/mxs.h> |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 31 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 32 | #define MXS_SET 0x4 |
| 33 | #define MXS_CLR 0x8 |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 34 | |
| 35 | #define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10) |
| 36 | #define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10) |
| 37 | #define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10) |
| 38 | #define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10) |
| 39 | #define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10) |
| 40 | #define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10) |
| 41 | #define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10) |
| 42 | #define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10) |
| 43 | |
| 44 | #define GPIO_INT_FALL_EDGE 0x0 |
| 45 | #define GPIO_INT_LOW_LEV 0x1 |
| 46 | #define GPIO_INT_RISE_EDGE 0x2 |
| 47 | #define GPIO_INT_HIGH_LEV 0x3 |
| 48 | #define GPIO_INT_LEV_MASK (1 << 0) |
| 49 | #define GPIO_INT_POL_MASK (1 << 1) |
| 50 | |
Grant Likely | 7b2fa57 | 2011-06-06 09:37:58 -0600 | [diff] [blame] | 51 | struct mxs_gpio_port { |
| 52 | void __iomem *base; |
| 53 | int id; |
| 54 | int irq; |
| 55 | int irq_high; |
| 56 | int virtual_irq_start; |
| 57 | struct gpio_chip chip; |
| 58 | }; |
| 59 | |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 60 | /* Note: This driver assumes 32 GPIOs are handled in one register */ |
| 61 | |
| 62 | static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index) |
| 63 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 64 | writel(1 << index, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index, |
| 68 | int enable) |
| 69 | { |
| 70 | if (enable) { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 71 | writel(1 << index, |
| 72 | port->base + PINCTRL_IRQEN(port->id) + MXS_SET); |
| 73 | writel(1 << index, |
| 74 | port->base + PINCTRL_PIN2IRQ(port->id) + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 75 | } else { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 76 | writel(1 << index, |
| 77 | port->base + PINCTRL_IRQEN(port->id) + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 78 | } |
| 79 | } |
| 80 | |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 81 | static void mxs_gpio_ack_irq(struct irq_data *d) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 82 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 83 | struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 84 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 85 | clear_gpio_irqstatus(port, gpio & 0x1f); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 86 | } |
| 87 | |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 88 | static void mxs_gpio_mask_irq(struct irq_data *d) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 89 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 90 | struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 91 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 92 | set_gpio_irqenable(port, gpio & 0x1f, 0); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 93 | } |
| 94 | |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 95 | static void mxs_gpio_unmask_irq(struct irq_data *d) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 96 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 97 | struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 98 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 99 | set_gpio_irqenable(port, gpio & 0x1f, 1); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 100 | } |
| 101 | |
| 102 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); |
| 103 | |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 104 | static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 105 | { |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 106 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 107 | u32 pin_mask = 1 << (gpio & 31); |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 108 | struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 109 | void __iomem *pin_addr; |
| 110 | int edge; |
| 111 | |
| 112 | switch (type) { |
| 113 | case IRQ_TYPE_EDGE_RISING: |
| 114 | edge = GPIO_INT_RISE_EDGE; |
| 115 | break; |
| 116 | case IRQ_TYPE_EDGE_FALLING: |
| 117 | edge = GPIO_INT_FALL_EDGE; |
| 118 | break; |
| 119 | case IRQ_TYPE_LEVEL_LOW: |
| 120 | edge = GPIO_INT_LOW_LEV; |
| 121 | break; |
| 122 | case IRQ_TYPE_LEVEL_HIGH: |
| 123 | edge = GPIO_INT_HIGH_LEV; |
| 124 | break; |
| 125 | default: |
| 126 | return -EINVAL; |
| 127 | } |
| 128 | |
| 129 | /* set level or edge */ |
| 130 | pin_addr = port->base + PINCTRL_IRQLEV(port->id); |
| 131 | if (edge & GPIO_INT_LEV_MASK) |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 132 | writel(pin_mask, pin_addr + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 133 | else |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 134 | writel(pin_mask, pin_addr + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 135 | |
| 136 | /* set polarity */ |
| 137 | pin_addr = port->base + PINCTRL_IRQPOL(port->id); |
| 138 | if (edge & GPIO_INT_POL_MASK) |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 139 | writel(pin_mask, pin_addr + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 140 | else |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 141 | writel(pin_mask, pin_addr + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 142 | |
| 143 | clear_gpio_irqstatus(port, gpio & 0x1f); |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
| 148 | /* MXS has one interrupt *per* gpio port */ |
| 149 | static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) |
| 150 | { |
| 151 | u32 irq_stat; |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 152 | struct mxs_gpio_port *port = irq_get_handler_data(irq); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 153 | u32 gpio_irq_no_base = port->virtual_irq_start; |
| 154 | |
Uwe Kleine-König | 1f6b5dd | 2011-01-25 16:54:22 +0100 | [diff] [blame] | 155 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
| 156 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 157 | irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) & |
| 158 | readl(port->base + PINCTRL_IRQEN(port->id)); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 159 | |
| 160 | while (irq_stat != 0) { |
| 161 | int irqoffset = fls(irq_stat) - 1; |
| 162 | generic_handle_irq(gpio_irq_no_base + irqoffset); |
| 163 | irq_stat &= ~(1 << irqoffset); |
| 164 | } |
| 165 | } |
| 166 | |
| 167 | /* |
| 168 | * Set interrupt number "irq" in the GPIO as a wake-up source. |
| 169 | * While system is running, all registered GPIO interrupts need to have |
| 170 | * wake-up enabled. When system is suspended, only selected GPIO interrupts |
| 171 | * need to have wake-up enabled. |
| 172 | * @param irq interrupt source number |
| 173 | * @param enable enable as wake-up if equal to non-zero |
| 174 | * @return This function returns 0 on success. |
| 175 | */ |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 176 | static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 177 | { |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 178 | u32 gpio = irq_to_gpio(d->irq); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 179 | u32 gpio_idx = gpio & 0x1f; |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 180 | struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 181 | |
| 182 | if (enable) { |
| 183 | if (port->irq_high && (gpio_idx >= 16)) |
| 184 | enable_irq_wake(port->irq_high); |
| 185 | else |
| 186 | enable_irq_wake(port->irq); |
| 187 | } else { |
| 188 | if (port->irq_high && (gpio_idx >= 16)) |
| 189 | disable_irq_wake(port->irq_high); |
| 190 | else |
| 191 | disable_irq_wake(port->irq); |
| 192 | } |
| 193 | |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | static struct irq_chip gpio_irq_chip = { |
Wolfram Sang | 761b6d1 | 2011-03-01 10:21:51 +0100 | [diff] [blame] | 198 | .name = "mxs gpio", |
Uwe Kleine-König | bf0c1118 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 199 | .irq_ack = mxs_gpio_ack_irq, |
| 200 | .irq_mask = mxs_gpio_mask_irq, |
| 201 | .irq_unmask = mxs_gpio_unmask_irq, |
| 202 | .irq_set_type = mxs_gpio_set_irq_type, |
| 203 | .irq_set_wake = mxs_gpio_set_wake_irq, |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 204 | }; |
| 205 | |
| 206 | static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, |
| 207 | int dir) |
| 208 | { |
| 209 | struct mxs_gpio_port *port = |
| 210 | container_of(chip, struct mxs_gpio_port, chip); |
| 211 | void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id); |
| 212 | |
| 213 | if (dir) |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 214 | writel(1 << offset, pin_addr + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 215 | else |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 216 | writel(1 << offset, pin_addr + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 220 | { |
| 221 | struct mxs_gpio_port *port = |
| 222 | container_of(chip, struct mxs_gpio_port, chip); |
| 223 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 224 | return (readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 225 | } |
| 226 | |
| 227 | static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 228 | { |
| 229 | struct mxs_gpio_port *port = |
| 230 | container_of(chip, struct mxs_gpio_port, chip); |
| 231 | void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id); |
| 232 | |
| 233 | if (value) |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 234 | writel(1 << offset, pin_addr + MXS_SET); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 235 | else |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 236 | writel(1 << offset, pin_addr + MXS_CLR); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 237 | } |
| 238 | |
| 239 | static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
| 240 | { |
| 241 | struct mxs_gpio_port *port = |
| 242 | container_of(chip, struct mxs_gpio_port, chip); |
| 243 | |
| 244 | return port->virtual_irq_start + offset; |
| 245 | } |
| 246 | |
| 247 | static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
| 248 | { |
| 249 | mxs_set_gpio_direction(chip, offset, 0); |
| 250 | return 0; |
| 251 | } |
| 252 | |
| 253 | static int mxs_gpio_direction_output(struct gpio_chip *chip, |
| 254 | unsigned offset, int value) |
| 255 | { |
| 256 | mxs_gpio_set(chip, offset, value); |
| 257 | mxs_set_gpio_direction(chip, offset, 1); |
| 258 | return 0; |
| 259 | } |
| 260 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 261 | static int __devinit mxs_gpio_probe(struct platform_device *pdev) |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 262 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 263 | static void __iomem *base; |
| 264 | struct mxs_gpio_port *port; |
| 265 | struct resource *iores = NULL; |
| 266 | int err, i; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 267 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 268 | port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL); |
| 269 | if (!port) |
| 270 | return -ENOMEM; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 271 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 272 | port->id = pdev->id; |
| 273 | port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 274 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 275 | /* |
| 276 | * map memory region only once, as all the gpio ports |
| 277 | * share the same one |
| 278 | */ |
| 279 | if (!base) { |
| 280 | iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 281 | if (!iores) { |
| 282 | err = -ENODEV; |
| 283 | goto out_kfree; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 284 | } |
| 285 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 286 | if (!request_mem_region(iores->start, resource_size(iores), |
| 287 | pdev->name)) { |
| 288 | err = -EBUSY; |
| 289 | goto out_kfree; |
| 290 | } |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 291 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 292 | base = ioremap(iores->start, resource_size(iores)); |
| 293 | if (!base) { |
| 294 | err = -ENOMEM; |
| 295 | goto out_release_mem; |
| 296 | } |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 297 | } |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 298 | port->base = base; |
| 299 | |
| 300 | port->irq = platform_get_irq(pdev, 0); |
| 301 | if (port->irq < 0) { |
| 302 | err = -EINVAL; |
| 303 | goto out_iounmap; |
| 304 | } |
| 305 | |
| 306 | /* disable the interrupt and clear the status */ |
| 307 | writel(0, port->base + PINCTRL_PIN2IRQ(port->id)); |
| 308 | writel(0, port->base + PINCTRL_IRQEN(port->id)); |
| 309 | |
| 310 | /* clear address has to be used to clear IRQSTAT bits */ |
| 311 | writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); |
| 312 | |
| 313 | for (i = port->virtual_irq_start; |
| 314 | i < port->virtual_irq_start + 32; i++) { |
| 315 | irq_set_chip_and_handler(i, &gpio_irq_chip, |
| 316 | handle_level_irq); |
| 317 | set_irq_flags(i, IRQF_VALID); |
| 318 | irq_set_chip_data(i, port); |
| 319 | } |
| 320 | |
| 321 | /* setup one handler for each entry */ |
| 322 | irq_set_chained_handler(port->irq, mxs_gpio_irq_handler); |
| 323 | irq_set_handler_data(port->irq, port); |
| 324 | |
| 325 | /* register gpio chip */ |
| 326 | port->chip.direction_input = mxs_gpio_direction_input; |
| 327 | port->chip.direction_output = mxs_gpio_direction_output; |
| 328 | port->chip.get = mxs_gpio_get; |
| 329 | port->chip.set = mxs_gpio_set; |
| 330 | port->chip.to_irq = mxs_gpio_to_irq; |
| 331 | port->chip.base = port->id * 32; |
| 332 | port->chip.ngpio = 32; |
| 333 | |
| 334 | err = gpiochip_add(&port->chip); |
| 335 | if (err) |
| 336 | goto out_iounmap; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 337 | |
| 338 | return 0; |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 339 | |
| 340 | out_iounmap: |
| 341 | if (iores) |
| 342 | iounmap(port->base); |
| 343 | out_release_mem: |
| 344 | if (iores) |
| 345 | release_mem_region(iores->start, resource_size(iores)); |
| 346 | out_kfree: |
| 347 | kfree(port); |
| 348 | dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err); |
| 349 | return err; |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 350 | } |
| 351 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 352 | static struct platform_driver mxs_gpio_driver = { |
| 353 | .driver = { |
| 354 | .name = "gpio-mxs", |
| 355 | .owner = THIS_MODULE, |
| 356 | }, |
| 357 | .probe = mxs_gpio_probe, |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 358 | }; |
Sascha Hauer | ef19660 | 2011-01-24 12:57:46 +0100 | [diff] [blame] | 359 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 360 | static int __init mxs_gpio_init(void) |
Sascha Hauer | ef19660 | 2011-01-24 12:57:46 +0100 | [diff] [blame] | 361 | { |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 362 | return platform_driver_register(&mxs_gpio_driver); |
Sascha Hauer | ef19660 | 2011-01-24 12:57:46 +0100 | [diff] [blame] | 363 | } |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 364 | postcore_initcall(mxs_gpio_init); |
Shawn Guo | fba311f | 2010-12-18 21:39:31 +0800 | [diff] [blame] | 365 | |
Shawn Guo | 8d7cf83 | 2011-06-06 09:37:58 -0600 | [diff] [blame^] | 366 | MODULE_AUTHOR("Freescale Semiconductor, " |
| 367 | "Daniel Mack <danielncaiaq.de>, " |
| 368 | "Juergen Beisert <kernel@pengutronix.de>"); |
| 369 | MODULE_DESCRIPTION("Freescale MXS GPIO"); |
| 370 | MODULE_LICENSE("GPL"); |