blob: 924971b6ded54f52ef56de0c84910258531bf1b9 [file] [log] [blame]
Kenneth Westfieldcd59f132015-03-03 16:21:53 -08001/*
2 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * lpass.h - Definitions for the QTi LPASS
14 */
15
16#ifndef __LPASS_H__
17#define __LPASS_H__
18
19#include <linux/clk.h>
20#include <linux/compiler.h>
21#include <linux/platform_device.h>
22#include <linux/regmap.h>
23
24#define LPASS_AHBIX_CLOCK_FREQUENCY 131072000
Srinivas Kandagatla9a127cf2015-05-21 22:52:49 +010025#define LPASS_MAX_MI2S_PORTS (8)
Srinivas Kandagatla4f629e42015-05-21 22:53:14 +010026#define LPASS_MAX_DMA_CHANNELS (8)
Kenneth Westfieldcd59f132015-03-03 16:21:53 -080027
28/* Both the CPU DAI and platform drivers will access this data */
29struct lpass_data {
30
31 /* AHB-I/X bus clocks inside the low-power audio subsystem (LPASS) */
32 struct clk *ahbix_clk;
33
34 /* MI2S system clock */
Srinivas Kandagatla9a127cf2015-05-21 22:52:49 +010035 struct clk *mi2s_osr_clk[LPASS_MAX_MI2S_PORTS];
Kenneth Westfieldcd59f132015-03-03 16:21:53 -080036
37 /* MI2S bit clock (derived from system clock by a divider */
Srinivas Kandagatla9a127cf2015-05-21 22:52:49 +010038 struct clk *mi2s_bit_clk[LPASS_MAX_MI2S_PORTS];
Kenneth Westfieldcd59f132015-03-03 16:21:53 -080039
40 /* low-power audio interface (LPAIF) registers */
41 void __iomem *lpaif;
42
43 /* regmap backed by the low-power audio interface (LPAIF) registers */
44 struct regmap *lpaif_map;
45
46 /* interrupts from the low-power audio interface (LPAIF) */
47 int lpaif_irq;
Srinivas Kandagatla9bae4882015-05-16 13:32:17 +010048
49 /* SOC specific variations in the LPASS IP integration */
50 struct lpass_variant *variant;
Srinivas Kandagatla4f629e42015-05-21 22:53:14 +010051
Srinivas Kandagatla89cdfa02015-05-21 22:53:21 +010052 /* bit map to keep track of static channel allocations */
Srinivas Kandagatla4d809fb2016-02-11 12:17:51 +000053 unsigned long dma_ch_bit_map;
Srinivas Kandagatla89cdfa02015-05-21 22:53:21 +010054
Srinivas Kandagatla4f629e42015-05-21 22:53:14 +010055 /* used it for handling interrupt per dma channel */
56 struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
Srinivas Kandagatladc1ebd12015-05-22 16:53:52 +010057
58 /* 8016 specific */
59 struct clk *pcnoc_mport_clk;
60 struct clk *pcnoc_sway_clk;
Kuninori Morimoto6adcbdc2016-08-01 06:10:54 +000061
Srinivas Kandagatla9bae4882015-05-16 13:32:17 +010062};
63
64/* Vairant data per each SOC */
65struct lpass_variant {
66 u32 i2sctrl_reg_base;
67 u32 i2sctrl_reg_stride;
68 u32 i2s_ports;
69 u32 irq_reg_base;
70 u32 irq_reg_stride;
71 u32 irq_ports;
72 u32 rdma_reg_base;
73 u32 rdma_reg_stride;
74 u32 rdma_channels;
Srinivas Kandagatlaffc13252016-02-11 12:17:23 +000075 u32 wrdma_reg_base;
76 u32 wrdma_reg_stride;
77 u32 wrdma_channels;
Srinivas Kandagatla9bae4882015-05-16 13:32:17 +010078
Srinivas Kandagatla00540552015-05-21 22:53:05 +010079 /**
80 * on SOCs like APQ8016 the channel control bits start
81 * at different offset to ipq806x
82 **/
Srinivas Kandagatlaec5b8282016-02-11 12:17:30 +000083 u32 dmactl_audif_start;
Srinivas Kandagatlaffc13252016-02-11 12:17:23 +000084 u32 wrdma_channel_start;
Srinivas Kandagatla9bae4882015-05-16 13:32:17 +010085 /* SOC specific intialization like clocks */
86 int (*init)(struct platform_device *pdev);
87 int (*exit)(struct platform_device *pdev);
Srinivas Kandagatla73c847b2016-02-11 12:17:37 +000088 int (*alloc_dma_channel)(struct lpass_data *data, int direction);
Srinivas Kandagatla6db1c6ba2015-05-16 13:32:34 +010089 int (*free_dma_channel)(struct lpass_data *data, int ch);
Srinivas Kandagatla9bae4882015-05-16 13:32:17 +010090
91 /* SOC specific dais */
92 struct snd_soc_dai_driver *dai_driver;
93 int num_dai;
Kenneth Westfieldcd59f132015-03-03 16:21:53 -080094};
95
96/* register the platform driver from the CPU DAI driver */
97int asoc_qcom_lpass_platform_register(struct platform_device *);
Srinivas Kandagatla9bae4882015-05-16 13:32:17 +010098int asoc_qcom_lpass_cpu_platform_remove(struct platform_device *pdev);
99int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
100int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
Axel Lin618718d2015-08-28 10:53:31 +0800101extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
Kenneth Westfieldcd59f132015-03-03 16:21:53 -0800102
103#endif /* __LPASS_H__ */