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keita kobayashi5f6108b2014-05-30 14:18:48 +09001/*
2 * r8a7791 Power management support
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 * Copyright (C) 2011 Renesas Solutions Corp.
6 * Copyright (C) 2011 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
keita kobayashi5f6108b2014-05-30 14:18:48 +090013#include <linux/kernel.h>
Magnus Damm8e261182014-06-06 16:21:11 +090014#include <linux/smp.h>
Geert Uytterhoeven5201b5a2014-06-20 18:53:07 +020015#include <asm/io.h>
Magnus Damm8e261182014-06-06 16:21:11 +090016#include "common.h"
keita kobayashi5f6108b2014-05-30 14:18:48 +090017#include "pm-rcar.h"
Geert Uytterhoeven5201b5a2014-06-20 18:53:07 +020018#include "r8a7791.h"
keita kobayashi5f6108b2014-05-30 14:18:48 +090019
Magnus Damm8e261182014-06-06 16:21:11 +090020#define RST 0xe6160000
21#define CA15BAR 0x0020
22#define CA15RESCNT 0x0040
23#define RAM 0xe6300000
24
keita kobayashi5f6108b2014-05-30 14:18:48 +090025/* SYSC */
26#define SYSCIER 0x0c
27#define SYSCIMR 0x10
28
29#if defined(CONFIG_SMP)
30
31static void __init r8a7791_sysc_init(void)
32{
33 void __iomem *base = rcar_sysc_init(0xe6180000);
34
35 /* enable all interrupt sources, but do not use interrupt handler */
36 iowrite32(0x0131000e, base + SYSCIER);
37 iowrite32(0, base + SYSCIMR);
38}
39
40#else /* CONFIG_SMP */
41
42static inline void r8a7791_sysc_init(void) {}
43
44#endif /* CONFIG_SMP */
45
46void __init r8a7791_pm_init(void)
47{
Magnus Damm8e261182014-06-06 16:21:11 +090048 void __iomem *p;
49 u32 bar;
keita kobayashi5f6108b2014-05-30 14:18:48 +090050 static int once;
51
52 if (once++)
53 return;
54
Magnus Damm8e261182014-06-06 16:21:11 +090055 /* RAM for jump stub, because BAR requires 256KB aligned address */
56 p = ioremap_nocache(RAM, shmobile_boot_size);
57 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
58 iounmap(p);
59
60 /* setup reset vectors */
61 p = ioremap_nocache(RST, 0x63);
62 bar = (RAM >> 8) & 0xfffffc00;
63 writel_relaxed(bar, p + CA15BAR);
64 writel_relaxed(bar | 0x10, p + CA15BAR);
65
66 /* enable clocks to all CPUs */
67 writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
68 p + CA15RESCNT);
69 iounmap(p);
70
keita kobayashi5f6108b2014-05-30 14:18:48 +090071 r8a7791_sysc_init();
72}