Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1 | /* |
| 2 | * rt5651.c -- RT5651 ALSA SoC audio codec driver |
| 3 | * |
| 4 | * Copyright 2014 Realtek Semiconductor Corp. |
| 5 | * Author: Bard Liao <bardliao@realtek.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/moduleparam.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/pm.h> |
| 17 | #include <linux/i2c.h> |
| 18 | #include <linux/regmap.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/spi/spi.h> |
| 21 | #include <sound/core.h> |
| 22 | #include <sound/pcm.h> |
| 23 | #include <sound/pcm_params.h> |
| 24 | #include <sound/soc.h> |
| 25 | #include <sound/soc-dapm.h> |
| 26 | #include <sound/initval.h> |
| 27 | #include <sound/tlv.h> |
| 28 | |
Oder Chiou | 49ef792 | 2014-05-20 15:01:53 +0800 | [diff] [blame] | 29 | #include "rl6231.h" |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 30 | #include "rt5651.h" |
| 31 | |
| 32 | #define RT5651_DEVICE_ID_VALUE 0x6281 |
| 33 | |
| 34 | #define RT5651_PR_RANGE_BASE (0xff + 1) |
| 35 | #define RT5651_PR_SPACING 0x100 |
| 36 | |
| 37 | #define RT5651_PR_BASE (RT5651_PR_RANGE_BASE + (0 * RT5651_PR_SPACING)) |
| 38 | |
| 39 | static const struct regmap_range_cfg rt5651_ranges[] = { |
| 40 | { .name = "PR", .range_min = RT5651_PR_BASE, |
| 41 | .range_max = RT5651_PR_BASE + 0xb4, |
| 42 | .selector_reg = RT5651_PRIV_INDEX, |
| 43 | .selector_mask = 0xff, |
| 44 | .selector_shift = 0x0, |
| 45 | .window_start = RT5651_PRIV_DATA, |
| 46 | .window_len = 0x1, }, |
| 47 | }; |
| 48 | |
| 49 | static struct reg_default init_list[] = { |
| 50 | {RT5651_PR_BASE + 0x3d, 0x3e00}, |
| 51 | }; |
| 52 | |
| 53 | static const struct reg_default rt5651_reg[] = { |
| 54 | { 0x00, 0x0000 }, |
| 55 | { 0x02, 0xc8c8 }, |
| 56 | { 0x03, 0xc8c8 }, |
| 57 | { 0x05, 0x0000 }, |
| 58 | { 0x0d, 0x0000 }, |
| 59 | { 0x0e, 0x0000 }, |
| 60 | { 0x0f, 0x0808 }, |
| 61 | { 0x10, 0x0808 }, |
| 62 | { 0x19, 0xafaf }, |
| 63 | { 0x1a, 0xafaf }, |
| 64 | { 0x1b, 0x0c00 }, |
| 65 | { 0x1c, 0x2f2f }, |
| 66 | { 0x1d, 0x2f2f }, |
| 67 | { 0x1e, 0x0000 }, |
| 68 | { 0x27, 0x7860 }, |
| 69 | { 0x28, 0x7070 }, |
| 70 | { 0x29, 0x8080 }, |
| 71 | { 0x2a, 0x5252 }, |
| 72 | { 0x2b, 0x5454 }, |
| 73 | { 0x2f, 0x0000 }, |
| 74 | { 0x30, 0x5000 }, |
| 75 | { 0x3b, 0x0000 }, |
| 76 | { 0x3c, 0x006f }, |
| 77 | { 0x3d, 0x0000 }, |
| 78 | { 0x3e, 0x006f }, |
| 79 | { 0x45, 0x6000 }, |
| 80 | { 0x4d, 0x0000 }, |
| 81 | { 0x4e, 0x0000 }, |
| 82 | { 0x4f, 0x0279 }, |
| 83 | { 0x50, 0x0000 }, |
| 84 | { 0x51, 0x0000 }, |
| 85 | { 0x52, 0x0279 }, |
| 86 | { 0x53, 0xf000 }, |
| 87 | { 0x61, 0x0000 }, |
| 88 | { 0x62, 0x0000 }, |
| 89 | { 0x63, 0x00c0 }, |
| 90 | { 0x64, 0x0000 }, |
| 91 | { 0x65, 0x0000 }, |
| 92 | { 0x66, 0x0000 }, |
| 93 | { 0x70, 0x8000 }, |
| 94 | { 0x71, 0x8000 }, |
| 95 | { 0x73, 0x1104 }, |
| 96 | { 0x74, 0x0c00 }, |
| 97 | { 0x75, 0x1400 }, |
| 98 | { 0x77, 0x0c00 }, |
| 99 | { 0x78, 0x4000 }, |
| 100 | { 0x79, 0x0123 }, |
| 101 | { 0x80, 0x0000 }, |
| 102 | { 0x81, 0x0000 }, |
| 103 | { 0x82, 0x0000 }, |
| 104 | { 0x83, 0x0800 }, |
| 105 | { 0x84, 0x0000 }, |
| 106 | { 0x85, 0x0008 }, |
| 107 | { 0x89, 0x0000 }, |
| 108 | { 0x8e, 0x0004 }, |
| 109 | { 0x8f, 0x1100 }, |
| 110 | { 0x90, 0x0000 }, |
| 111 | { 0x93, 0x2000 }, |
| 112 | { 0x94, 0x0200 }, |
| 113 | { 0xb0, 0x2080 }, |
| 114 | { 0xb1, 0x0000 }, |
| 115 | { 0xb4, 0x2206 }, |
| 116 | { 0xb5, 0x1f00 }, |
| 117 | { 0xb6, 0x0000 }, |
| 118 | { 0xbb, 0x0000 }, |
| 119 | { 0xbc, 0x0000 }, |
| 120 | { 0xbd, 0x0000 }, |
| 121 | { 0xbe, 0x0000 }, |
| 122 | { 0xbf, 0x0000 }, |
| 123 | { 0xc0, 0x0400 }, |
| 124 | { 0xc1, 0x0000 }, |
| 125 | { 0xc2, 0x0000 }, |
| 126 | { 0xcf, 0x0013 }, |
| 127 | { 0xd0, 0x0680 }, |
| 128 | { 0xd1, 0x1c17 }, |
| 129 | { 0xd3, 0xb320 }, |
| 130 | { 0xd9, 0x0809 }, |
| 131 | { 0xfa, 0x0010 }, |
| 132 | { 0xfe, 0x10ec }, |
| 133 | { 0xff, 0x6281 }, |
| 134 | }; |
| 135 | |
| 136 | static bool rt5651_volatile_register(struct device *dev, unsigned int reg) |
| 137 | { |
| 138 | int i; |
| 139 | |
| 140 | for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { |
| 141 | if ((reg >= rt5651_ranges[i].window_start && |
| 142 | reg <= rt5651_ranges[i].window_start + |
| 143 | rt5651_ranges[i].window_len) || |
| 144 | (reg >= rt5651_ranges[i].range_min && |
| 145 | reg <= rt5651_ranges[i].range_max)) { |
| 146 | return true; |
| 147 | } |
| 148 | } |
| 149 | |
| 150 | switch (reg) { |
| 151 | case RT5651_RESET: |
| 152 | case RT5651_PRIV_DATA: |
| 153 | case RT5651_EQ_CTRL1: |
| 154 | case RT5651_ALC_1: |
| 155 | case RT5651_IRQ_CTRL2: |
| 156 | case RT5651_INT_IRQ_ST: |
| 157 | case RT5651_PGM_REG_ARR1: |
| 158 | case RT5651_PGM_REG_ARR3: |
| 159 | case RT5651_VENDOR_ID: |
| 160 | case RT5651_DEVICE_ID: |
| 161 | return true; |
| 162 | default: |
| 163 | return false; |
| 164 | } |
| 165 | } |
| 166 | |
| 167 | static bool rt5651_readable_register(struct device *dev, unsigned int reg) |
| 168 | { |
| 169 | int i; |
| 170 | |
| 171 | for (i = 0; i < ARRAY_SIZE(rt5651_ranges); i++) { |
| 172 | if ((reg >= rt5651_ranges[i].window_start && |
| 173 | reg <= rt5651_ranges[i].window_start + |
| 174 | rt5651_ranges[i].window_len) || |
| 175 | (reg >= rt5651_ranges[i].range_min && |
| 176 | reg <= rt5651_ranges[i].range_max)) { |
| 177 | return true; |
| 178 | } |
| 179 | } |
| 180 | |
| 181 | switch (reg) { |
| 182 | case RT5651_RESET: |
| 183 | case RT5651_VERSION_ID: |
| 184 | case RT5651_VENDOR_ID: |
| 185 | case RT5651_DEVICE_ID: |
| 186 | case RT5651_HP_VOL: |
| 187 | case RT5651_LOUT_CTRL1: |
| 188 | case RT5651_LOUT_CTRL2: |
| 189 | case RT5651_IN1_IN2: |
| 190 | case RT5651_IN3: |
| 191 | case RT5651_INL1_INR1_VOL: |
| 192 | case RT5651_INL2_INR2_VOL: |
| 193 | case RT5651_DAC1_DIG_VOL: |
| 194 | case RT5651_DAC2_DIG_VOL: |
| 195 | case RT5651_DAC2_CTRL: |
| 196 | case RT5651_ADC_DIG_VOL: |
| 197 | case RT5651_ADC_DATA: |
| 198 | case RT5651_ADC_BST_VOL: |
| 199 | case RT5651_STO1_ADC_MIXER: |
| 200 | case RT5651_STO2_ADC_MIXER: |
| 201 | case RT5651_AD_DA_MIXER: |
| 202 | case RT5651_STO_DAC_MIXER: |
| 203 | case RT5651_DD_MIXER: |
| 204 | case RT5651_DIG_INF_DATA: |
| 205 | case RT5651_PDM_CTL: |
| 206 | case RT5651_REC_L1_MIXER: |
| 207 | case RT5651_REC_L2_MIXER: |
| 208 | case RT5651_REC_R1_MIXER: |
| 209 | case RT5651_REC_R2_MIXER: |
| 210 | case RT5651_HPO_MIXER: |
| 211 | case RT5651_OUT_L1_MIXER: |
| 212 | case RT5651_OUT_L2_MIXER: |
| 213 | case RT5651_OUT_L3_MIXER: |
| 214 | case RT5651_OUT_R1_MIXER: |
| 215 | case RT5651_OUT_R2_MIXER: |
| 216 | case RT5651_OUT_R3_MIXER: |
| 217 | case RT5651_LOUT_MIXER: |
| 218 | case RT5651_PWR_DIG1: |
| 219 | case RT5651_PWR_DIG2: |
| 220 | case RT5651_PWR_ANLG1: |
| 221 | case RT5651_PWR_ANLG2: |
| 222 | case RT5651_PWR_MIXER: |
| 223 | case RT5651_PWR_VOL: |
| 224 | case RT5651_PRIV_INDEX: |
| 225 | case RT5651_PRIV_DATA: |
| 226 | case RT5651_I2S1_SDP: |
| 227 | case RT5651_I2S2_SDP: |
| 228 | case RT5651_ADDA_CLK1: |
| 229 | case RT5651_ADDA_CLK2: |
| 230 | case RT5651_DMIC: |
| 231 | case RT5651_TDM_CTL_1: |
| 232 | case RT5651_TDM_CTL_2: |
| 233 | case RT5651_TDM_CTL_3: |
| 234 | case RT5651_GLB_CLK: |
| 235 | case RT5651_PLL_CTRL1: |
| 236 | case RT5651_PLL_CTRL2: |
| 237 | case RT5651_PLL_MODE_1: |
| 238 | case RT5651_PLL_MODE_2: |
| 239 | case RT5651_PLL_MODE_3: |
| 240 | case RT5651_PLL_MODE_4: |
| 241 | case RT5651_PLL_MODE_5: |
| 242 | case RT5651_PLL_MODE_6: |
| 243 | case RT5651_PLL_MODE_7: |
| 244 | case RT5651_DEPOP_M1: |
| 245 | case RT5651_DEPOP_M2: |
| 246 | case RT5651_DEPOP_M3: |
| 247 | case RT5651_CHARGE_PUMP: |
| 248 | case RT5651_MICBIAS: |
| 249 | case RT5651_A_JD_CTL1: |
| 250 | case RT5651_EQ_CTRL1: |
| 251 | case RT5651_EQ_CTRL2: |
| 252 | case RT5651_ALC_1: |
| 253 | case RT5651_ALC_2: |
| 254 | case RT5651_ALC_3: |
| 255 | case RT5651_JD_CTRL1: |
| 256 | case RT5651_JD_CTRL2: |
| 257 | case RT5651_IRQ_CTRL1: |
| 258 | case RT5651_IRQ_CTRL2: |
| 259 | case RT5651_INT_IRQ_ST: |
| 260 | case RT5651_GPIO_CTRL1: |
| 261 | case RT5651_GPIO_CTRL2: |
| 262 | case RT5651_GPIO_CTRL3: |
| 263 | case RT5651_PGM_REG_ARR1: |
| 264 | case RT5651_PGM_REG_ARR2: |
| 265 | case RT5651_PGM_REG_ARR3: |
| 266 | case RT5651_PGM_REG_ARR4: |
| 267 | case RT5651_PGM_REG_ARR5: |
| 268 | case RT5651_SCB_FUNC: |
| 269 | case RT5651_SCB_CTRL: |
| 270 | case RT5651_BASE_BACK: |
| 271 | case RT5651_MP3_PLUS1: |
| 272 | case RT5651_MP3_PLUS2: |
| 273 | case RT5651_ADJ_HPF_CTRL1: |
| 274 | case RT5651_ADJ_HPF_CTRL2: |
| 275 | case RT5651_HP_CALIB_AMP_DET: |
| 276 | case RT5651_HP_CALIB2: |
| 277 | case RT5651_SV_ZCD1: |
| 278 | case RT5651_SV_ZCD2: |
| 279 | case RT5651_D_MISC: |
| 280 | case RT5651_DUMMY2: |
| 281 | case RT5651_DUMMY3: |
| 282 | return true; |
| 283 | default: |
| 284 | return false; |
| 285 | } |
| 286 | } |
| 287 | |
| 288 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0); |
| 289 | static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0); |
| 290 | static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0); |
| 291 | static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); |
| 292 | static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0); |
| 293 | |
| 294 | /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */ |
Lars-Peter Clausen | 8e3648e | 2015-08-02 17:19:50 +0200 | [diff] [blame^] | 295 | static const DECLARE_TLV_DB_RANGE(bst_tlv, |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 296 | 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0), |
| 297 | 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0), |
| 298 | 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0), |
| 299 | 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0), |
| 300 | 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0), |
| 301 | 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0), |
Lars-Peter Clausen | 8e3648e | 2015-08-02 17:19:50 +0200 | [diff] [blame^] | 302 | 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0) |
| 303 | ); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 304 | |
| 305 | /* Interface data select */ |
| 306 | static const char * const rt5651_data_select[] = { |
| 307 | "Normal", "Swap", "left copy to right", "right copy to left"}; |
| 308 | |
| 309 | static SOC_ENUM_SINGLE_DECL(rt5651_if2_dac_enum, RT5651_DIG_INF_DATA, |
| 310 | RT5651_IF2_DAC_SEL_SFT, rt5651_data_select); |
| 311 | |
| 312 | static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_enum, RT5651_DIG_INF_DATA, |
| 313 | RT5651_IF2_ADC_SEL_SFT, rt5651_data_select); |
| 314 | |
| 315 | static const struct snd_kcontrol_new rt5651_snd_controls[] = { |
| 316 | /* Headphone Output Volume */ |
| 317 | SOC_DOUBLE_TLV("HP Playback Volume", RT5651_HP_VOL, |
| 318 | RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), |
| 319 | /* OUTPUT Control */ |
| 320 | SOC_DOUBLE_TLV("OUT Playback Volume", RT5651_LOUT_CTRL1, |
| 321 | RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, 39, 1, out_vol_tlv), |
| 322 | |
| 323 | /* DAC Digital Volume */ |
| 324 | SOC_DOUBLE("DAC2 Playback Switch", RT5651_DAC2_CTRL, |
| 325 | RT5651_M_DAC_L2_VOL_SFT, RT5651_M_DAC_R2_VOL_SFT, 1, 1), |
| 326 | SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5651_DAC1_DIG_VOL, |
| 327 | RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, |
| 328 | 175, 0, dac_vol_tlv), |
| 329 | SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5651_DAC2_DIG_VOL, |
| 330 | RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, |
| 331 | 175, 0, dac_vol_tlv), |
| 332 | /* IN1/IN2 Control */ |
| 333 | SOC_SINGLE_TLV("IN1 Boost", RT5651_IN1_IN2, |
| 334 | RT5651_BST_SFT1, 8, 0, bst_tlv), |
| 335 | SOC_SINGLE_TLV("IN2 Boost", RT5651_IN1_IN2, |
| 336 | RT5651_BST_SFT2, 8, 0, bst_tlv), |
| 337 | /* INL/INR Volume Control */ |
| 338 | SOC_DOUBLE_TLV("IN Capture Volume", RT5651_INL1_INR1_VOL, |
| 339 | RT5651_INL_VOL_SFT, RT5651_INR_VOL_SFT, |
| 340 | 31, 1, in_vol_tlv), |
| 341 | /* ADC Digital Volume Control */ |
| 342 | SOC_DOUBLE("ADC Capture Switch", RT5651_ADC_DIG_VOL, |
| 343 | RT5651_L_MUTE_SFT, RT5651_R_MUTE_SFT, 1, 1), |
| 344 | SOC_DOUBLE_TLV("ADC Capture Volume", RT5651_ADC_DIG_VOL, |
| 345 | RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, |
| 346 | 127, 0, adc_vol_tlv), |
| 347 | SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5651_ADC_DATA, |
| 348 | RT5651_L_VOL_SFT, RT5651_R_VOL_SFT, |
| 349 | 127, 0, adc_vol_tlv), |
| 350 | /* ADC Boost Volume Control */ |
| 351 | SOC_DOUBLE_TLV("ADC Boost Gain", RT5651_ADC_BST_VOL, |
| 352 | RT5651_ADC_L_BST_SFT, RT5651_ADC_R_BST_SFT, |
| 353 | 3, 0, adc_bst_tlv), |
| 354 | |
| 355 | /* ASRC */ |
| 356 | SOC_SINGLE("IF1 ASRC Switch", RT5651_PLL_MODE_1, |
| 357 | RT5651_STO1_T_SFT, 1, 0), |
| 358 | SOC_SINGLE("IF2 ASRC Switch", RT5651_PLL_MODE_1, |
| 359 | RT5651_STO2_T_SFT, 1, 0), |
| 360 | SOC_SINGLE("DMIC ASRC Switch", RT5651_PLL_MODE_1, |
| 361 | RT5651_DMIC_1_M_SFT, 1, 0), |
| 362 | |
| 363 | SOC_ENUM("ADC IF2 Data Switch", rt5651_if2_adc_enum), |
| 364 | SOC_ENUM("DAC IF2 Data Switch", rt5651_if2_dac_enum), |
| 365 | }; |
| 366 | |
| 367 | /** |
| 368 | * set_dmic_clk - Set parameter of dmic. |
| 369 | * |
| 370 | * @w: DAPM widget. |
| 371 | * @kcontrol: The kcontrol of this widget. |
| 372 | * @event: Event id. |
| 373 | * |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 374 | */ |
| 375 | static int set_dmic_clk(struct snd_soc_dapm_widget *w, |
| 376 | struct snd_kcontrol *kcontrol, int event) |
| 377 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 378 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 379 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
Oder Chiou | 49ef792 | 2014-05-20 15:01:53 +0800 | [diff] [blame] | 380 | int idx = -EINVAL; |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 381 | |
Oder Chiou | 49ef792 | 2014-05-20 15:01:53 +0800 | [diff] [blame] | 382 | idx = rl6231_calc_dmic_clk(rt5651->sysclk); |
| 383 | |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 384 | if (idx < 0) |
| 385 | dev_err(codec->dev, "Failed to set DMIC clock\n"); |
| 386 | else |
| 387 | snd_soc_update_bits(codec, RT5651_DMIC, RT5651_DMIC_CLK_MASK, |
| 388 | idx << RT5651_DMIC_CLK_SFT); |
| 389 | |
| 390 | return idx; |
| 391 | } |
| 392 | |
| 393 | static int is_sysclk_from_pll(struct snd_soc_dapm_widget *source, |
| 394 | struct snd_soc_dapm_widget *sink) |
| 395 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 396 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 397 | unsigned int val; |
| 398 | |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 399 | val = snd_soc_read(codec, RT5651_GLB_CLK); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 400 | val &= RT5651_SCLK_SRC_MASK; |
| 401 | if (val == RT5651_SCLK_SRC_PLL1) |
| 402 | return 1; |
| 403 | else |
| 404 | return 0; |
| 405 | } |
| 406 | |
| 407 | /* Digital Mixer */ |
| 408 | static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = { |
| 409 | SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, |
| 410 | RT5651_M_STO1_ADC_L1_SFT, 1, 1), |
| 411 | SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, |
| 412 | RT5651_M_STO1_ADC_L2_SFT, 1, 1), |
| 413 | }; |
| 414 | |
| 415 | static const struct snd_kcontrol_new rt5651_sto1_adc_r_mix[] = { |
| 416 | SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, |
| 417 | RT5651_M_STO1_ADC_R1_SFT, 1, 1), |
| 418 | SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO1_ADC_MIXER, |
| 419 | RT5651_M_STO1_ADC_R2_SFT, 1, 1), |
| 420 | }; |
| 421 | |
| 422 | static const struct snd_kcontrol_new rt5651_sto2_adc_l_mix[] = { |
| 423 | SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, |
| 424 | RT5651_M_STO2_ADC_L1_SFT, 1, 1), |
| 425 | SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, |
| 426 | RT5651_M_STO2_ADC_L2_SFT, 1, 1), |
| 427 | }; |
| 428 | |
| 429 | static const struct snd_kcontrol_new rt5651_sto2_adc_r_mix[] = { |
| 430 | SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO2_ADC_MIXER, |
| 431 | RT5651_M_STO2_ADC_R1_SFT, 1, 1), |
| 432 | SOC_DAPM_SINGLE("ADC2 Switch", RT5651_STO2_ADC_MIXER, |
| 433 | RT5651_M_STO2_ADC_R2_SFT, 1, 1), |
| 434 | }; |
| 435 | |
| 436 | static const struct snd_kcontrol_new rt5651_dac_l_mix[] = { |
| 437 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, |
| 438 | RT5651_M_ADCMIX_L_SFT, 1, 1), |
| 439 | SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, |
| 440 | RT5651_M_IF1_DAC_L_SFT, 1, 1), |
| 441 | }; |
| 442 | |
| 443 | static const struct snd_kcontrol_new rt5651_dac_r_mix[] = { |
| 444 | SOC_DAPM_SINGLE("Stereo ADC Switch", RT5651_AD_DA_MIXER, |
| 445 | RT5651_M_ADCMIX_R_SFT, 1, 1), |
| 446 | SOC_DAPM_SINGLE("INF1 Switch", RT5651_AD_DA_MIXER, |
| 447 | RT5651_M_IF1_DAC_R_SFT, 1, 1), |
| 448 | }; |
| 449 | |
| 450 | static const struct snd_kcontrol_new rt5651_sto_dac_l_mix[] = { |
| 451 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, |
| 452 | RT5651_M_DAC_L1_MIXL_SFT, 1, 1), |
| 453 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_STO_DAC_MIXER, |
| 454 | RT5651_M_DAC_L2_MIXL_SFT, 1, 1), |
| 455 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, |
| 456 | RT5651_M_DAC_R1_MIXL_SFT, 1, 1), |
| 457 | }; |
| 458 | |
| 459 | static const struct snd_kcontrol_new rt5651_sto_dac_r_mix[] = { |
| 460 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_STO_DAC_MIXER, |
| 461 | RT5651_M_DAC_R1_MIXR_SFT, 1, 1), |
| 462 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_STO_DAC_MIXER, |
| 463 | RT5651_M_DAC_R2_MIXR_SFT, 1, 1), |
| 464 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_STO_DAC_MIXER, |
| 465 | RT5651_M_DAC_L1_MIXR_SFT, 1, 1), |
| 466 | }; |
| 467 | |
| 468 | static const struct snd_kcontrol_new rt5651_dd_dac_l_mix[] = { |
| 469 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_DD_MIXER, |
| 470 | RT5651_M_STO_DD_L1_SFT, 1, 1), |
| 471 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, |
| 472 | RT5651_M_STO_DD_L2_SFT, 1, 1), |
| 473 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, |
| 474 | RT5651_M_STO_DD_R2_L_SFT, 1, 1), |
| 475 | }; |
| 476 | |
| 477 | static const struct snd_kcontrol_new rt5651_dd_dac_r_mix[] = { |
| 478 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_DD_MIXER, |
| 479 | RT5651_M_STO_DD_R1_SFT, 1, 1), |
| 480 | SOC_DAPM_SINGLE("DAC R2 Switch", RT5651_DD_MIXER, |
| 481 | RT5651_M_STO_DD_R2_SFT, 1, 1), |
| 482 | SOC_DAPM_SINGLE("DAC L2 Switch", RT5651_DD_MIXER, |
| 483 | RT5651_M_STO_DD_L2_R_SFT, 1, 1), |
| 484 | }; |
| 485 | |
| 486 | /* Analog Input Mixer */ |
| 487 | static const struct snd_kcontrol_new rt5651_rec_l_mix[] = { |
| 488 | SOC_DAPM_SINGLE("INL1 Switch", RT5651_REC_L2_MIXER, |
| 489 | RT5651_M_IN1_L_RM_L_SFT, 1, 1), |
| 490 | SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_L2_MIXER, |
| 491 | RT5651_M_BST3_RM_L_SFT, 1, 1), |
| 492 | SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_L2_MIXER, |
| 493 | RT5651_M_BST2_RM_L_SFT, 1, 1), |
| 494 | SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_L2_MIXER, |
| 495 | RT5651_M_BST1_RM_L_SFT, 1, 1), |
| 496 | }; |
| 497 | |
| 498 | static const struct snd_kcontrol_new rt5651_rec_r_mix[] = { |
| 499 | SOC_DAPM_SINGLE("INR1 Switch", RT5651_REC_R2_MIXER, |
| 500 | RT5651_M_IN1_R_RM_R_SFT, 1, 1), |
| 501 | SOC_DAPM_SINGLE("BST3 Switch", RT5651_REC_R2_MIXER, |
| 502 | RT5651_M_BST3_RM_R_SFT, 1, 1), |
| 503 | SOC_DAPM_SINGLE("BST2 Switch", RT5651_REC_R2_MIXER, |
| 504 | RT5651_M_BST2_RM_R_SFT, 1, 1), |
| 505 | SOC_DAPM_SINGLE("BST1 Switch", RT5651_REC_R2_MIXER, |
| 506 | RT5651_M_BST1_RM_R_SFT, 1, 1), |
| 507 | }; |
| 508 | |
| 509 | /* Analog Output Mixer */ |
| 510 | |
| 511 | static const struct snd_kcontrol_new rt5651_out_l_mix[] = { |
| 512 | SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_L3_MIXER, |
| 513 | RT5651_M_BST1_OM_L_SFT, 1, 1), |
| 514 | SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_L3_MIXER, |
| 515 | RT5651_M_BST2_OM_L_SFT, 1, 1), |
| 516 | SOC_DAPM_SINGLE("INL1 Switch", RT5651_OUT_L3_MIXER, |
| 517 | RT5651_M_IN1_L_OM_L_SFT, 1, 1), |
| 518 | SOC_DAPM_SINGLE("REC MIXL Switch", RT5651_OUT_L3_MIXER, |
| 519 | RT5651_M_RM_L_OM_L_SFT, 1, 1), |
| 520 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_OUT_L3_MIXER, |
| 521 | RT5651_M_DAC_L1_OM_L_SFT, 1, 1), |
| 522 | }; |
| 523 | |
| 524 | static const struct snd_kcontrol_new rt5651_out_r_mix[] = { |
| 525 | SOC_DAPM_SINGLE("BST2 Switch", RT5651_OUT_R3_MIXER, |
| 526 | RT5651_M_BST2_OM_R_SFT, 1, 1), |
| 527 | SOC_DAPM_SINGLE("BST1 Switch", RT5651_OUT_R3_MIXER, |
| 528 | RT5651_M_BST1_OM_R_SFT, 1, 1), |
| 529 | SOC_DAPM_SINGLE("INR1 Switch", RT5651_OUT_R3_MIXER, |
| 530 | RT5651_M_IN1_R_OM_R_SFT, 1, 1), |
| 531 | SOC_DAPM_SINGLE("REC MIXR Switch", RT5651_OUT_R3_MIXER, |
| 532 | RT5651_M_RM_R_OM_R_SFT, 1, 1), |
| 533 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_OUT_R3_MIXER, |
| 534 | RT5651_M_DAC_R1_OM_R_SFT, 1, 1), |
| 535 | }; |
| 536 | |
| 537 | static const struct snd_kcontrol_new rt5651_hpo_mix[] = { |
| 538 | SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5651_HPO_MIXER, |
| 539 | RT5651_M_DAC1_HM_SFT, 1, 1), |
| 540 | SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5651_HPO_MIXER, |
| 541 | RT5651_M_HPVOL_HM_SFT, 1, 1), |
| 542 | }; |
| 543 | |
| 544 | static const struct snd_kcontrol_new rt5651_lout_mix[] = { |
| 545 | SOC_DAPM_SINGLE("DAC L1 Switch", RT5651_LOUT_MIXER, |
| 546 | RT5651_M_DAC_L1_LM_SFT, 1, 1), |
| 547 | SOC_DAPM_SINGLE("DAC R1 Switch", RT5651_LOUT_MIXER, |
| 548 | RT5651_M_DAC_R1_LM_SFT, 1, 1), |
| 549 | SOC_DAPM_SINGLE("OUTVOL L Switch", RT5651_LOUT_MIXER, |
| 550 | RT5651_M_OV_L_LM_SFT, 1, 1), |
| 551 | SOC_DAPM_SINGLE("OUTVOL R Switch", RT5651_LOUT_MIXER, |
| 552 | RT5651_M_OV_R_LM_SFT, 1, 1), |
| 553 | }; |
| 554 | |
| 555 | static const struct snd_kcontrol_new outvol_l_control = |
| 556 | SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, |
| 557 | RT5651_VOL_L_SFT, 1, 1); |
| 558 | |
| 559 | static const struct snd_kcontrol_new outvol_r_control = |
| 560 | SOC_DAPM_SINGLE("Switch", RT5651_LOUT_CTRL1, |
| 561 | RT5651_VOL_R_SFT, 1, 1); |
| 562 | |
| 563 | static const struct snd_kcontrol_new lout_l_mute_control = |
| 564 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, |
| 565 | RT5651_L_MUTE_SFT, 1, 1); |
| 566 | |
| 567 | static const struct snd_kcontrol_new lout_r_mute_control = |
| 568 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_LOUT_CTRL1, |
| 569 | RT5651_R_MUTE_SFT, 1, 1); |
| 570 | |
| 571 | static const struct snd_kcontrol_new hpovol_l_control = |
| 572 | SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, |
| 573 | RT5651_VOL_L_SFT, 1, 1); |
| 574 | |
| 575 | static const struct snd_kcontrol_new hpovol_r_control = |
| 576 | SOC_DAPM_SINGLE("Switch", RT5651_HP_VOL, |
| 577 | RT5651_VOL_R_SFT, 1, 1); |
| 578 | |
| 579 | static const struct snd_kcontrol_new hpo_l_mute_control = |
| 580 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, |
| 581 | RT5651_L_MUTE_SFT, 1, 1); |
| 582 | |
| 583 | static const struct snd_kcontrol_new hpo_r_mute_control = |
| 584 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5651_HP_VOL, |
| 585 | RT5651_R_MUTE_SFT, 1, 1); |
| 586 | |
| 587 | /* INL/R source */ |
| 588 | static const char * const rt5651_inl_src[] = {"IN2P", "HPOVOLLP"}; |
| 589 | |
| 590 | static SOC_ENUM_SINGLE_DECL( |
| 591 | rt5651_inl_enum, RT5651_INL1_INR1_VOL, |
| 592 | RT5651_INL_SEL_SFT, rt5651_inl_src); |
| 593 | |
| 594 | static const struct snd_kcontrol_new rt5651_inl1_mux = |
| 595 | SOC_DAPM_ENUM("INL1 source", rt5651_inl_enum); |
| 596 | |
| 597 | static const char * const rt5651_inr1_src[] = {"IN2N", "HPOVOLRP"}; |
| 598 | |
| 599 | static SOC_ENUM_SINGLE_DECL( |
| 600 | rt5651_inr1_enum, RT5651_INL1_INR1_VOL, |
| 601 | RT5651_INR_SEL_SFT, rt5651_inr1_src); |
| 602 | |
| 603 | static const struct snd_kcontrol_new rt5651_inr1_mux = |
| 604 | SOC_DAPM_ENUM("INR1 source", rt5651_inr1_enum); |
| 605 | |
| 606 | static const char * const rt5651_inl2_src[] = {"IN3P", "OUTVOLLP"}; |
| 607 | |
| 608 | static SOC_ENUM_SINGLE_DECL( |
| 609 | rt5651_inl2_enum, RT5651_INL2_INR2_VOL, |
| 610 | RT5651_INL_SEL_SFT, rt5651_inl2_src); |
| 611 | |
| 612 | static const struct snd_kcontrol_new rt5651_inl2_mux = |
| 613 | SOC_DAPM_ENUM("INL2 source", rt5651_inl2_enum); |
| 614 | |
| 615 | static const char * const rt5651_inr2_src[] = {"IN3N", "OUTVOLRP"}; |
| 616 | |
| 617 | static SOC_ENUM_SINGLE_DECL( |
| 618 | rt5651_inr2_enum, RT5651_INL2_INR2_VOL, |
| 619 | RT5651_INR_SEL_SFT, rt5651_inr2_src); |
| 620 | |
| 621 | static const struct snd_kcontrol_new rt5651_inr2_mux = |
| 622 | SOC_DAPM_ENUM("INR2 source", rt5651_inr2_enum); |
| 623 | |
| 624 | |
| 625 | /* Stereo ADC source */ |
| 626 | static const char * const rt5651_stereo1_adc1_src[] = {"DD MIX", "ADC"}; |
| 627 | |
| 628 | static SOC_ENUM_SINGLE_DECL( |
| 629 | rt5651_stereo1_adc1_enum, RT5651_STO1_ADC_MIXER, |
| 630 | RT5651_STO1_ADC_1_SRC_SFT, rt5651_stereo1_adc1_src); |
| 631 | |
| 632 | static const struct snd_kcontrol_new rt5651_sto1_adc_l1_mux = |
| 633 | SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5651_stereo1_adc1_enum); |
| 634 | |
| 635 | static const struct snd_kcontrol_new rt5651_sto1_adc_r1_mux = |
| 636 | SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5651_stereo1_adc1_enum); |
| 637 | |
| 638 | static const char * const rt5651_stereo1_adc2_src[] = {"DMIC", "DD MIX"}; |
| 639 | |
| 640 | static SOC_ENUM_SINGLE_DECL( |
| 641 | rt5651_stereo1_adc2_enum, RT5651_STO1_ADC_MIXER, |
| 642 | RT5651_STO1_ADC_2_SRC_SFT, rt5651_stereo1_adc2_src); |
| 643 | |
| 644 | static const struct snd_kcontrol_new rt5651_sto1_adc_l2_mux = |
| 645 | SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5651_stereo1_adc2_enum); |
| 646 | |
| 647 | static const struct snd_kcontrol_new rt5651_sto1_adc_r2_mux = |
| 648 | SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5651_stereo1_adc2_enum); |
| 649 | |
| 650 | /* Mono ADC source */ |
| 651 | static const char * const rt5651_sto2_adc_l1_src[] = {"DD MIXL", "ADCL"}; |
| 652 | |
| 653 | static SOC_ENUM_SINGLE_DECL( |
| 654 | rt5651_sto2_adc_l1_enum, RT5651_STO1_ADC_MIXER, |
| 655 | RT5651_STO2_ADC_L1_SRC_SFT, rt5651_sto2_adc_l1_src); |
| 656 | |
| 657 | static const struct snd_kcontrol_new rt5651_sto2_adc_l1_mux = |
| 658 | SOC_DAPM_ENUM("Stereo2 ADC1 left source", rt5651_sto2_adc_l1_enum); |
| 659 | |
| 660 | static const char * const rt5651_sto2_adc_l2_src[] = {"DMIC L", "DD MIXL"}; |
| 661 | |
| 662 | static SOC_ENUM_SINGLE_DECL( |
| 663 | rt5651_sto2_adc_l2_enum, RT5651_STO1_ADC_MIXER, |
| 664 | RT5651_STO2_ADC_L2_SRC_SFT, rt5651_sto2_adc_l2_src); |
| 665 | |
| 666 | static const struct snd_kcontrol_new rt5651_sto2_adc_l2_mux = |
| 667 | SOC_DAPM_ENUM("Stereo2 ADC2 left source", rt5651_sto2_adc_l2_enum); |
| 668 | |
| 669 | static const char * const rt5651_sto2_adc_r1_src[] = {"DD MIXR", "ADCR"}; |
| 670 | |
| 671 | static SOC_ENUM_SINGLE_DECL( |
| 672 | rt5651_sto2_adc_r1_enum, RT5651_STO1_ADC_MIXER, |
| 673 | RT5651_STO2_ADC_R1_SRC_SFT, rt5651_sto2_adc_r1_src); |
| 674 | |
| 675 | static const struct snd_kcontrol_new rt5651_sto2_adc_r1_mux = |
| 676 | SOC_DAPM_ENUM("Stereo2 ADC1 right source", rt5651_sto2_adc_r1_enum); |
| 677 | |
| 678 | static const char * const rt5651_sto2_adc_r2_src[] = {"DMIC R", "DD MIXR"}; |
| 679 | |
| 680 | static SOC_ENUM_SINGLE_DECL( |
| 681 | rt5651_sto2_adc_r2_enum, RT5651_STO1_ADC_MIXER, |
| 682 | RT5651_STO2_ADC_R2_SRC_SFT, rt5651_sto2_adc_r2_src); |
| 683 | |
| 684 | static const struct snd_kcontrol_new rt5651_sto2_adc_r2_mux = |
| 685 | SOC_DAPM_ENUM("Stereo2 ADC2 right source", rt5651_sto2_adc_r2_enum); |
| 686 | |
| 687 | /* DAC2 channel source */ |
| 688 | |
| 689 | static const char * const rt5651_dac_src[] = {"IF1", "IF2"}; |
| 690 | |
| 691 | static SOC_ENUM_SINGLE_DECL(rt5651_dac_l2_enum, RT5651_DAC2_CTRL, |
| 692 | RT5651_SEL_DAC_L2_SFT, rt5651_dac_src); |
| 693 | |
| 694 | static const struct snd_kcontrol_new rt5651_dac_l2_mux = |
| 695 | SOC_DAPM_ENUM("DAC2 left channel source", rt5651_dac_l2_enum); |
| 696 | |
| 697 | static SOC_ENUM_SINGLE_DECL( |
| 698 | rt5651_dac_r2_enum, RT5651_DAC2_CTRL, |
| 699 | RT5651_SEL_DAC_R2_SFT, rt5651_dac_src); |
| 700 | |
| 701 | static const struct snd_kcontrol_new rt5651_dac_r2_mux = |
| 702 | SOC_DAPM_ENUM("DAC2 right channel source", rt5651_dac_r2_enum); |
| 703 | |
| 704 | /* IF2_ADC channel source */ |
| 705 | |
| 706 | static const char * const rt5651_adc_src[] = {"IF1 ADC1", "IF1 ADC2"}; |
| 707 | |
| 708 | static SOC_ENUM_SINGLE_DECL(rt5651_if2_adc_src_enum, RT5651_DIG_INF_DATA, |
| 709 | RT5651_IF2_ADC_SRC_SFT, rt5651_adc_src); |
| 710 | |
| 711 | static const struct snd_kcontrol_new rt5651_if2_adc_src_mux = |
| 712 | SOC_DAPM_ENUM("IF2 ADC channel source", rt5651_if2_adc_src_enum); |
| 713 | |
| 714 | /* PDM select */ |
| 715 | static const char * const rt5651_pdm_sel[] = {"DD MIX", "Stereo DAC MIX"}; |
| 716 | |
| 717 | static SOC_ENUM_SINGLE_DECL( |
| 718 | rt5651_pdm_l_sel_enum, RT5651_PDM_CTL, |
| 719 | RT5651_PDM_L_SEL_SFT, rt5651_pdm_sel); |
| 720 | |
| 721 | static SOC_ENUM_SINGLE_DECL( |
| 722 | rt5651_pdm_r_sel_enum, RT5651_PDM_CTL, |
| 723 | RT5651_PDM_R_SEL_SFT, rt5651_pdm_sel); |
| 724 | |
| 725 | static const struct snd_kcontrol_new rt5651_pdm_l_mux = |
| 726 | SOC_DAPM_ENUM("PDM L select", rt5651_pdm_l_sel_enum); |
| 727 | |
| 728 | static const struct snd_kcontrol_new rt5651_pdm_r_mux = |
| 729 | SOC_DAPM_ENUM("PDM R select", rt5651_pdm_r_sel_enum); |
| 730 | |
| 731 | static int rt5651_amp_power_event(struct snd_soc_dapm_widget *w, |
| 732 | struct snd_kcontrol *kcontrol, int event) |
| 733 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 734 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 735 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 736 | |
| 737 | switch (event) { |
| 738 | case SND_SOC_DAPM_POST_PMU: |
| 739 | /* depop parameters */ |
| 740 | regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + |
| 741 | RT5651_CHPUMP_INT_REG1, 0x0700, 0x0200); |
| 742 | regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, |
| 743 | RT5651_DEPOP_MASK, RT5651_DEPOP_MAN); |
| 744 | regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, |
| 745 | RT5651_HP_CP_MASK | RT5651_HP_SG_MASK | |
| 746 | RT5651_HP_CB_MASK, RT5651_HP_CP_PU | |
| 747 | RT5651_HP_SG_DIS | RT5651_HP_CB_PU); |
| 748 | regmap_write(rt5651->regmap, RT5651_PR_BASE + |
| 749 | RT5651_HP_DCC_INT1, 0x9f00); |
| 750 | /* headphone amp power on */ |
| 751 | regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, |
| 752 | RT5651_PWR_FV1 | RT5651_PWR_FV2, 0); |
| 753 | regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, |
| 754 | RT5651_PWR_HA, |
| 755 | RT5651_PWR_HA); |
| 756 | usleep_range(10000, 15000); |
| 757 | regmap_update_bits(rt5651->regmap, RT5651_PWR_ANLG1, |
| 758 | RT5651_PWR_FV1 | RT5651_PWR_FV2 , |
| 759 | RT5651_PWR_FV1 | RT5651_PWR_FV2); |
| 760 | break; |
| 761 | |
| 762 | default: |
| 763 | return 0; |
| 764 | } |
| 765 | |
| 766 | return 0; |
| 767 | } |
| 768 | |
| 769 | static int rt5651_hp_event(struct snd_soc_dapm_widget *w, |
| 770 | struct snd_kcontrol *kcontrol, int event) |
| 771 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 772 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 773 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 774 | |
| 775 | switch (event) { |
| 776 | case SND_SOC_DAPM_POST_PMU: |
| 777 | /* headphone unmute sequence */ |
| 778 | regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M2, |
| 779 | RT5651_DEPOP_MASK | RT5651_DIG_DP_MASK, |
| 780 | RT5651_DEPOP_AUTO | RT5651_DIG_DP_EN); |
| 781 | regmap_update_bits(rt5651->regmap, RT5651_CHARGE_PUMP, |
| 782 | RT5651_PM_HP_MASK, RT5651_PM_HP_HV); |
| 783 | |
| 784 | regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M3, |
| 785 | RT5651_CP_FQ1_MASK | RT5651_CP_FQ2_MASK | |
| 786 | RT5651_CP_FQ3_MASK, |
| 787 | (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ1_SFT) | |
| 788 | (RT5651_CP_FQ_12_KHZ << RT5651_CP_FQ2_SFT) | |
| 789 | (RT5651_CP_FQ_192_KHZ << RT5651_CP_FQ3_SFT)); |
| 790 | |
| 791 | regmap_write(rt5651->regmap, RT5651_PR_BASE + |
| 792 | RT5651_MAMP_INT_REG2, 0x1c00); |
| 793 | regmap_update_bits(rt5651->regmap, RT5651_DEPOP_M1, |
| 794 | RT5651_HP_CP_MASK | RT5651_HP_SG_MASK, |
| 795 | RT5651_HP_CP_PD | RT5651_HP_SG_EN); |
| 796 | regmap_update_bits(rt5651->regmap, RT5651_PR_BASE + |
| 797 | RT5651_CHPUMP_INT_REG1, 0x0700, 0x0400); |
| 798 | rt5651->hp_mute = 0; |
| 799 | break; |
| 800 | |
| 801 | case SND_SOC_DAPM_PRE_PMD: |
| 802 | rt5651->hp_mute = 1; |
| 803 | usleep_range(70000, 75000); |
| 804 | break; |
| 805 | |
| 806 | default: |
| 807 | return 0; |
| 808 | } |
| 809 | |
| 810 | return 0; |
| 811 | } |
| 812 | |
| 813 | static int rt5651_hp_post_event(struct snd_soc_dapm_widget *w, |
| 814 | struct snd_kcontrol *kcontrol, int event) |
| 815 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 816 | |
| 817 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 818 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 819 | |
| 820 | switch (event) { |
| 821 | case SND_SOC_DAPM_POST_PMU: |
| 822 | if (!rt5651->hp_mute) |
| 823 | usleep_range(80000, 85000); |
| 824 | |
| 825 | break; |
| 826 | |
| 827 | default: |
| 828 | return 0; |
| 829 | } |
| 830 | |
| 831 | return 0; |
| 832 | } |
| 833 | |
| 834 | static int rt5651_bst1_event(struct snd_soc_dapm_widget *w, |
| 835 | struct snd_kcontrol *kcontrol, int event) |
| 836 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 837 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 838 | |
| 839 | switch (event) { |
| 840 | case SND_SOC_DAPM_POST_PMU: |
| 841 | snd_soc_update_bits(codec, RT5651_PWR_ANLG2, |
| 842 | RT5651_PWR_BST1_OP2, RT5651_PWR_BST1_OP2); |
| 843 | break; |
| 844 | |
| 845 | case SND_SOC_DAPM_PRE_PMD: |
| 846 | snd_soc_update_bits(codec, RT5651_PWR_ANLG2, |
| 847 | RT5651_PWR_BST1_OP2, 0); |
| 848 | break; |
| 849 | |
| 850 | default: |
| 851 | return 0; |
| 852 | } |
| 853 | |
| 854 | return 0; |
| 855 | } |
| 856 | |
| 857 | static int rt5651_bst2_event(struct snd_soc_dapm_widget *w, |
| 858 | struct snd_kcontrol *kcontrol, int event) |
| 859 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 860 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 861 | |
| 862 | switch (event) { |
| 863 | case SND_SOC_DAPM_POST_PMU: |
| 864 | snd_soc_update_bits(codec, RT5651_PWR_ANLG2, |
| 865 | RT5651_PWR_BST2_OP2, RT5651_PWR_BST2_OP2); |
| 866 | break; |
| 867 | |
| 868 | case SND_SOC_DAPM_PRE_PMD: |
| 869 | snd_soc_update_bits(codec, RT5651_PWR_ANLG2, |
| 870 | RT5651_PWR_BST2_OP2, 0); |
| 871 | break; |
| 872 | |
| 873 | default: |
| 874 | return 0; |
| 875 | } |
| 876 | |
| 877 | return 0; |
| 878 | } |
| 879 | |
| 880 | static int rt5651_bst3_event(struct snd_soc_dapm_widget *w, |
| 881 | struct snd_kcontrol *kcontrol, int event) |
| 882 | { |
Lars-Peter Clausen | 30c173e | 2015-01-15 12:52:14 +0100 | [diff] [blame] | 883 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 884 | |
| 885 | switch (event) { |
| 886 | case SND_SOC_DAPM_POST_PMU: |
| 887 | snd_soc_update_bits(codec, RT5651_PWR_ANLG2, |
| 888 | RT5651_PWR_BST3_OP2, RT5651_PWR_BST3_OP2); |
| 889 | break; |
| 890 | |
| 891 | case SND_SOC_DAPM_PRE_PMD: |
| 892 | snd_soc_update_bits(codec, RT5651_PWR_ANLG2, |
| 893 | RT5651_PWR_BST3_OP2, 0); |
| 894 | break; |
| 895 | |
| 896 | default: |
| 897 | return 0; |
| 898 | } |
| 899 | |
| 900 | return 0; |
| 901 | } |
| 902 | |
| 903 | static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = { |
| 904 | /* ASRC */ |
| 905 | SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5651_PLL_MODE_2, |
| 906 | 15, 0, NULL, 0), |
| 907 | SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5651_PLL_MODE_2, |
| 908 | 14, 0, NULL, 0), |
| 909 | SND_SOC_DAPM_SUPPLY_S("STO1 DAC ASRC", 1, RT5651_PLL_MODE_2, |
| 910 | 13, 0, NULL, 0), |
| 911 | SND_SOC_DAPM_SUPPLY_S("STO2 DAC ASRC", 1, RT5651_PLL_MODE_2, |
| 912 | 12, 0, NULL, 0), |
| 913 | SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2, |
| 914 | 11, 0, NULL, 0), |
| 915 | |
| 916 | SND_SOC_DAPM_SUPPLY("PLL1", RT5651_PWR_ANLG2, |
| 917 | RT5651_PWR_PLL_BIT, 0, NULL, 0), |
| 918 | /* Input Side */ |
| 919 | /* micbias */ |
| 920 | SND_SOC_DAPM_SUPPLY("LDO", RT5651_PWR_ANLG1, |
| 921 | RT5651_PWR_LDO_BIT, 0, NULL, 0), |
| 922 | SND_SOC_DAPM_MICBIAS("micbias1", RT5651_PWR_ANLG2, |
| 923 | RT5651_PWR_MB1_BIT, 0), |
| 924 | /* Input Lines */ |
| 925 | SND_SOC_DAPM_INPUT("MIC1"), |
| 926 | SND_SOC_DAPM_INPUT("MIC2"), |
| 927 | SND_SOC_DAPM_INPUT("MIC3"), |
| 928 | |
| 929 | SND_SOC_DAPM_INPUT("IN1P"), |
| 930 | SND_SOC_DAPM_INPUT("IN2P"), |
| 931 | SND_SOC_DAPM_INPUT("IN2N"), |
| 932 | SND_SOC_DAPM_INPUT("IN3P"), |
| 933 | SND_SOC_DAPM_INPUT("DMIC L1"), |
| 934 | SND_SOC_DAPM_INPUT("DMIC R1"), |
| 935 | SND_SOC_DAPM_SUPPLY("DMIC CLK", RT5651_DMIC, RT5651_DMIC_1_EN_SFT, |
| 936 | 0, set_dmic_clk, SND_SOC_DAPM_PRE_PMU), |
| 937 | /* Boost */ |
| 938 | SND_SOC_DAPM_PGA_E("BST1", RT5651_PWR_ANLG2, |
| 939 | RT5651_PWR_BST1_BIT, 0, NULL, 0, rt5651_bst1_event, |
| 940 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 941 | SND_SOC_DAPM_PGA_E("BST2", RT5651_PWR_ANLG2, |
| 942 | RT5651_PWR_BST2_BIT, 0, NULL, 0, rt5651_bst2_event, |
| 943 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 944 | SND_SOC_DAPM_PGA_E("BST3", RT5651_PWR_ANLG2, |
| 945 | RT5651_PWR_BST3_BIT, 0, NULL, 0, rt5651_bst3_event, |
| 946 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 947 | /* Input Volume */ |
| 948 | SND_SOC_DAPM_PGA("INL1 VOL", RT5651_PWR_VOL, |
| 949 | RT5651_PWR_IN1_L_BIT, 0, NULL, 0), |
| 950 | SND_SOC_DAPM_PGA("INR1 VOL", RT5651_PWR_VOL, |
| 951 | RT5651_PWR_IN1_R_BIT, 0, NULL, 0), |
| 952 | SND_SOC_DAPM_PGA("INL2 VOL", RT5651_PWR_VOL, |
| 953 | RT5651_PWR_IN2_L_BIT, 0, NULL, 0), |
| 954 | SND_SOC_DAPM_PGA("INR2 VOL", RT5651_PWR_VOL, |
| 955 | RT5651_PWR_IN2_R_BIT, 0, NULL, 0), |
| 956 | /* IN Mux */ |
| 957 | SND_SOC_DAPM_MUX("INL1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl1_mux), |
| 958 | SND_SOC_DAPM_MUX("INR1 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr1_mux), |
| 959 | SND_SOC_DAPM_MUX("INL2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inl2_mux), |
| 960 | SND_SOC_DAPM_MUX("INR2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_inr2_mux), |
| 961 | /* REC Mixer */ |
| 962 | SND_SOC_DAPM_MIXER("RECMIXL", RT5651_PWR_MIXER, RT5651_PWR_RM_L_BIT, 0, |
| 963 | rt5651_rec_l_mix, ARRAY_SIZE(rt5651_rec_l_mix)), |
| 964 | SND_SOC_DAPM_MIXER("RECMIXR", RT5651_PWR_MIXER, RT5651_PWR_RM_R_BIT, 0, |
| 965 | rt5651_rec_r_mix, ARRAY_SIZE(rt5651_rec_r_mix)), |
| 966 | /* ADCs */ |
| 967 | SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0), |
| 968 | SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0), |
| 969 | SND_SOC_DAPM_SUPPLY("ADC L Power", RT5651_PWR_DIG1, |
| 970 | RT5651_PWR_ADC_L_BIT, 0, NULL, 0), |
| 971 | SND_SOC_DAPM_SUPPLY("ADC R Power", RT5651_PWR_DIG1, |
| 972 | RT5651_PWR_ADC_R_BIT, 0, NULL, 0), |
| 973 | /* ADC Mux */ |
| 974 | SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0, |
| 975 | &rt5651_sto1_adc_l2_mux), |
| 976 | SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0, |
| 977 | &rt5651_sto1_adc_r2_mux), |
| 978 | SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0, |
| 979 | &rt5651_sto1_adc_l1_mux), |
| 980 | SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0, |
| 981 | &rt5651_sto1_adc_r1_mux), |
| 982 | SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0, |
| 983 | &rt5651_sto2_adc_l2_mux), |
| 984 | SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0, |
| 985 | &rt5651_sto2_adc_l1_mux), |
| 986 | SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0, |
| 987 | &rt5651_sto2_adc_r1_mux), |
| 988 | SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0, |
| 989 | &rt5651_sto2_adc_r2_mux), |
| 990 | /* ADC Mixer */ |
| 991 | SND_SOC_DAPM_SUPPLY("Stereo1 Filter", RT5651_PWR_DIG2, |
| 992 | RT5651_PWR_ADC_STO1_F_BIT, 0, NULL, 0), |
| 993 | SND_SOC_DAPM_SUPPLY("Stereo2 Filter", RT5651_PWR_DIG2, |
| 994 | RT5651_PWR_ADC_STO2_F_BIT, 0, NULL, 0), |
| 995 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, |
| 996 | rt5651_sto1_adc_l_mix, |
| 997 | ARRAY_SIZE(rt5651_sto1_adc_l_mix)), |
| 998 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, |
| 999 | rt5651_sto1_adc_r_mix, |
| 1000 | ARRAY_SIZE(rt5651_sto1_adc_r_mix)), |
| 1001 | SND_SOC_DAPM_MIXER("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, |
| 1002 | rt5651_sto2_adc_l_mix, |
| 1003 | ARRAY_SIZE(rt5651_sto2_adc_l_mix)), |
| 1004 | SND_SOC_DAPM_MIXER("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, |
| 1005 | rt5651_sto2_adc_r_mix, |
| 1006 | ARRAY_SIZE(rt5651_sto2_adc_r_mix)), |
| 1007 | |
| 1008 | /* Digital Interface */ |
| 1009 | SND_SOC_DAPM_SUPPLY("I2S1", RT5651_PWR_DIG1, |
| 1010 | RT5651_PWR_I2S1_BIT, 0, NULL, 0), |
| 1011 | SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1012 | SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1013 | SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1014 | SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1015 | SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1016 | SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1017 | SND_SOC_DAPM_PGA("IF1 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1018 | SND_SOC_DAPM_SUPPLY("I2S2", RT5651_PWR_DIG1, |
| 1019 | RT5651_PWR_I2S2_BIT, 0, NULL, 0), |
| 1020 | SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1021 | SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1022 | SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1023 | SND_SOC_DAPM_MUX("IF2 ADC", SND_SOC_NOPM, 0, 0, |
| 1024 | &rt5651_if2_adc_src_mux), |
| 1025 | |
| 1026 | /* Digital Interface Select */ |
| 1027 | |
| 1028 | SND_SOC_DAPM_MUX("PDM L Mux", RT5651_PDM_CTL, |
| 1029 | RT5651_M_PDM_L_SFT, 1, &rt5651_pdm_l_mux), |
| 1030 | SND_SOC_DAPM_MUX("PDM R Mux", RT5651_PDM_CTL, |
| 1031 | RT5651_M_PDM_R_SFT, 1, &rt5651_pdm_r_mux), |
| 1032 | /* Audio Interface */ |
| 1033 | SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), |
| 1034 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), |
| 1035 | SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), |
| 1036 | SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), |
| 1037 | |
| 1038 | /* Audio DSP */ |
| 1039 | SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1040 | |
| 1041 | /* Output Side */ |
| 1042 | /* DAC mixer before sound effect */ |
| 1043 | SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, |
| 1044 | rt5651_dac_l_mix, ARRAY_SIZE(rt5651_dac_l_mix)), |
| 1045 | SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, |
| 1046 | rt5651_dac_r_mix, ARRAY_SIZE(rt5651_dac_r_mix)), |
| 1047 | |
| 1048 | /* DAC2 channel Mux */ |
| 1049 | SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_l2_mux), |
| 1050 | SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5651_dac_r2_mux), |
| 1051 | SND_SOC_DAPM_PGA("DAC L2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1052 | SND_SOC_DAPM_PGA("DAC R2 Volume", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 1053 | |
| 1054 | SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5651_PWR_DIG2, |
| 1055 | RT5651_PWR_DAC_STO1_F_BIT, 0, NULL, 0), |
| 1056 | SND_SOC_DAPM_SUPPLY("Stero2 DAC Power", RT5651_PWR_DIG2, |
| 1057 | RT5651_PWR_DAC_STO2_F_BIT, 0, NULL, 0), |
| 1058 | /* DAC Mixer */ |
| 1059 | SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, |
| 1060 | rt5651_sto_dac_l_mix, |
| 1061 | ARRAY_SIZE(rt5651_sto_dac_l_mix)), |
| 1062 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, |
| 1063 | rt5651_sto_dac_r_mix, |
| 1064 | ARRAY_SIZE(rt5651_sto_dac_r_mix)), |
| 1065 | SND_SOC_DAPM_MIXER("DD MIXL", SND_SOC_NOPM, 0, 0, |
| 1066 | rt5651_dd_dac_l_mix, |
| 1067 | ARRAY_SIZE(rt5651_dd_dac_l_mix)), |
| 1068 | SND_SOC_DAPM_MIXER("DD MIXR", SND_SOC_NOPM, 0, 0, |
| 1069 | rt5651_dd_dac_r_mix, |
| 1070 | ARRAY_SIZE(rt5651_dd_dac_r_mix)), |
| 1071 | |
| 1072 | /* DACs */ |
| 1073 | SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0), |
| 1074 | SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0), |
| 1075 | SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5651_PWR_DIG1, |
| 1076 | RT5651_PWR_DAC_L1_BIT, 0, NULL, 0), |
| 1077 | SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5651_PWR_DIG1, |
| 1078 | RT5651_PWR_DAC_R1_BIT, 0, NULL, 0), |
| 1079 | /* OUT Mixer */ |
| 1080 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5651_PWR_MIXER, RT5651_PWR_OM_L_BIT, |
| 1081 | 0, rt5651_out_l_mix, ARRAY_SIZE(rt5651_out_l_mix)), |
| 1082 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5651_PWR_MIXER, RT5651_PWR_OM_R_BIT, |
| 1083 | 0, rt5651_out_r_mix, ARRAY_SIZE(rt5651_out_r_mix)), |
| 1084 | /* Ouput Volume */ |
| 1085 | SND_SOC_DAPM_SWITCH("OUTVOL L", RT5651_PWR_VOL, |
| 1086 | RT5651_PWR_OV_L_BIT, 0, &outvol_l_control), |
| 1087 | SND_SOC_DAPM_SWITCH("OUTVOL R", RT5651_PWR_VOL, |
| 1088 | RT5651_PWR_OV_R_BIT, 0, &outvol_r_control), |
| 1089 | SND_SOC_DAPM_SWITCH("HPOVOL L", RT5651_PWR_VOL, |
| 1090 | RT5651_PWR_HV_L_BIT, 0, &hpovol_l_control), |
| 1091 | SND_SOC_DAPM_SWITCH("HPOVOL R", RT5651_PWR_VOL, |
| 1092 | RT5651_PWR_HV_R_BIT, 0, &hpovol_r_control), |
| 1093 | SND_SOC_DAPM_PGA("INL1", RT5651_PWR_VOL, |
| 1094 | RT5651_PWR_IN1_L_BIT, 0, NULL, 0), |
| 1095 | SND_SOC_DAPM_PGA("INR1", RT5651_PWR_VOL, |
| 1096 | RT5651_PWR_IN1_R_BIT, 0, NULL, 0), |
| 1097 | SND_SOC_DAPM_PGA("INL2", RT5651_PWR_VOL, |
| 1098 | RT5651_PWR_IN2_L_BIT, 0, NULL, 0), |
| 1099 | SND_SOC_DAPM_PGA("INR2", RT5651_PWR_VOL, |
| 1100 | RT5651_PWR_IN2_R_BIT, 0, NULL, 0), |
| 1101 | /* HPO/LOUT/Mono Mixer */ |
| 1102 | SND_SOC_DAPM_MIXER("HPOL MIX", SND_SOC_NOPM, 0, 0, |
| 1103 | rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), |
| 1104 | SND_SOC_DAPM_MIXER("HPOR MIX", SND_SOC_NOPM, 0, 0, |
| 1105 | rt5651_hpo_mix, ARRAY_SIZE(rt5651_hpo_mix)), |
| 1106 | SND_SOC_DAPM_SUPPLY("HP L Amp", RT5651_PWR_ANLG1, |
| 1107 | RT5651_PWR_HP_L_BIT, 0, NULL, 0), |
| 1108 | SND_SOC_DAPM_SUPPLY("HP R Amp", RT5651_PWR_ANLG1, |
| 1109 | RT5651_PWR_HP_R_BIT, 0, NULL, 0), |
| 1110 | SND_SOC_DAPM_MIXER("LOUT MIX", RT5651_PWR_ANLG1, RT5651_PWR_LM_BIT, 0, |
| 1111 | rt5651_lout_mix, ARRAY_SIZE(rt5651_lout_mix)), |
| 1112 | |
| 1113 | SND_SOC_DAPM_SUPPLY("Amp Power", RT5651_PWR_ANLG1, |
| 1114 | RT5651_PWR_HA_BIT, 0, rt5651_amp_power_event, |
| 1115 | SND_SOC_DAPM_POST_PMU), |
| 1116 | SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5651_hp_event, |
| 1117 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 1118 | SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0, |
| 1119 | &hpo_l_mute_control), |
| 1120 | SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0, |
| 1121 | &hpo_r_mute_control), |
| 1122 | SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0, |
| 1123 | &lout_l_mute_control), |
| 1124 | SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0, |
| 1125 | &lout_r_mute_control), |
| 1126 | SND_SOC_DAPM_POST("HP Post", rt5651_hp_post_event), |
| 1127 | |
| 1128 | /* Output Lines */ |
| 1129 | SND_SOC_DAPM_OUTPUT("HPOL"), |
| 1130 | SND_SOC_DAPM_OUTPUT("HPOR"), |
| 1131 | SND_SOC_DAPM_OUTPUT("LOUTL"), |
| 1132 | SND_SOC_DAPM_OUTPUT("LOUTR"), |
| 1133 | SND_SOC_DAPM_OUTPUT("PDML"), |
| 1134 | SND_SOC_DAPM_OUTPUT("PDMR"), |
| 1135 | }; |
| 1136 | |
| 1137 | static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { |
| 1138 | {"Stero1 DAC Power", NULL, "STO1 DAC ASRC"}, |
| 1139 | {"Stero2 DAC Power", NULL, "STO2 DAC ASRC"}, |
| 1140 | {"I2S1", NULL, "I2S1 ASRC"}, |
| 1141 | {"I2S2", NULL, "I2S2 ASRC"}, |
| 1142 | |
| 1143 | {"IN1P", NULL, "LDO"}, |
| 1144 | {"IN2P", NULL, "LDO"}, |
| 1145 | {"IN3P", NULL, "LDO"}, |
| 1146 | |
| 1147 | {"IN1P", NULL, "MIC1"}, |
| 1148 | {"IN2P", NULL, "MIC2"}, |
| 1149 | {"IN2N", NULL, "MIC2"}, |
| 1150 | {"IN3P", NULL, "MIC3"}, |
| 1151 | |
| 1152 | {"BST1", NULL, "IN1P"}, |
| 1153 | {"BST2", NULL, "IN2P"}, |
| 1154 | {"BST2", NULL, "IN2N"}, |
| 1155 | {"BST3", NULL, "IN3P"}, |
| 1156 | |
| 1157 | {"INL1 VOL", NULL, "IN2P"}, |
| 1158 | {"INR1 VOL", NULL, "IN2N"}, |
| 1159 | |
| 1160 | {"RECMIXL", "INL1 Switch", "INL1 VOL"}, |
| 1161 | {"RECMIXL", "BST3 Switch", "BST3"}, |
| 1162 | {"RECMIXL", "BST2 Switch", "BST2"}, |
| 1163 | {"RECMIXL", "BST1 Switch", "BST1"}, |
| 1164 | |
| 1165 | {"RECMIXR", "INR1 Switch", "INR1 VOL"}, |
| 1166 | {"RECMIXR", "BST3 Switch", "BST3"}, |
| 1167 | {"RECMIXR", "BST2 Switch", "BST2"}, |
| 1168 | {"RECMIXR", "BST1 Switch", "BST1"}, |
| 1169 | |
| 1170 | {"ADC L", NULL, "RECMIXL"}, |
| 1171 | {"ADC L", NULL, "ADC L Power"}, |
| 1172 | {"ADC R", NULL, "RECMIXR"}, |
| 1173 | {"ADC R", NULL, "ADC R Power"}, |
| 1174 | |
| 1175 | {"DMIC L1", NULL, "DMIC CLK"}, |
| 1176 | {"DMIC R1", NULL, "DMIC CLK"}, |
| 1177 | |
| 1178 | {"Stereo1 ADC L2 Mux", "DMIC", "DMIC L1"}, |
| 1179 | {"Stereo1 ADC L2 Mux", "DD MIX", "DD MIXL"}, |
| 1180 | {"Stereo1 ADC L1 Mux", "ADC", "ADC L"}, |
| 1181 | {"Stereo1 ADC L1 Mux", "DD MIX", "DD MIXL"}, |
| 1182 | |
| 1183 | {"Stereo1 ADC R1 Mux", "ADC", "ADC R"}, |
| 1184 | {"Stereo1 ADC R1 Mux", "DD MIX", "DD MIXR"}, |
| 1185 | {"Stereo1 ADC R2 Mux", "DMIC", "DMIC R1"}, |
| 1186 | {"Stereo1 ADC R2 Mux", "DD MIX", "DD MIXR"}, |
| 1187 | |
| 1188 | {"Stereo2 ADC L2 Mux", "DMIC L", "DMIC L1"}, |
| 1189 | {"Stereo2 ADC L2 Mux", "DD MIXL", "DD MIXL"}, |
| 1190 | {"Stereo2 ADC L1 Mux", "DD MIXL", "DD MIXL"}, |
| 1191 | {"Stereo2 ADC L1 Mux", "ADCL", "ADC L"}, |
| 1192 | |
| 1193 | {"Stereo2 ADC R1 Mux", "DD MIXR", "DD MIXR"}, |
| 1194 | {"Stereo2 ADC R1 Mux", "ADCR", "ADC R"}, |
| 1195 | {"Stereo2 ADC R2 Mux", "DMIC R", "DMIC R1"}, |
| 1196 | {"Stereo2 ADC R2 Mux", "DD MIXR", "DD MIXR"}, |
| 1197 | |
| 1198 | {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"}, |
| 1199 | {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"}, |
| 1200 | {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"}, |
| 1201 | {"Stereo1 Filter", NULL, "PLL1", is_sysclk_from_pll}, |
| 1202 | {"Stereo1 Filter", NULL, "ADC ASRC"}, |
| 1203 | |
| 1204 | {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"}, |
| 1205 | {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"}, |
| 1206 | {"Stereo1 ADC MIXR", NULL, "Stereo1 Filter"}, |
| 1207 | |
| 1208 | {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"}, |
| 1209 | {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"}, |
| 1210 | {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"}, |
| 1211 | {"Stereo2 Filter", NULL, "PLL1", is_sysclk_from_pll}, |
| 1212 | {"Stereo2 Filter", NULL, "ADC ASRC"}, |
| 1213 | |
| 1214 | {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"}, |
| 1215 | {"Stereo2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux"}, |
| 1216 | {"Stereo2 ADC MIXR", NULL, "Stereo2 Filter"}, |
| 1217 | |
| 1218 | {"IF1 ADC2", NULL, "Stereo2 ADC MIXL"}, |
| 1219 | {"IF1 ADC2", NULL, "Stereo2 ADC MIXR"}, |
| 1220 | {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"}, |
| 1221 | {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"}, |
| 1222 | |
| 1223 | {"IF1 ADC1", NULL, "I2S1"}, |
| 1224 | |
| 1225 | {"IF2 ADC", "IF1 ADC1", "IF1 ADC1"}, |
| 1226 | {"IF2 ADC", "IF1 ADC2", "IF1 ADC2"}, |
| 1227 | {"IF2 ADC", NULL, "I2S2"}, |
| 1228 | |
| 1229 | {"AIF1TX", NULL, "IF1 ADC1"}, |
| 1230 | {"AIF1TX", NULL, "IF1 ADC2"}, |
| 1231 | {"AIF2TX", NULL, "IF2 ADC"}, |
| 1232 | |
| 1233 | {"IF1 DAC", NULL, "AIF1RX"}, |
| 1234 | {"IF1 DAC", NULL, "I2S1"}, |
| 1235 | {"IF2 DAC", NULL, "AIF2RX"}, |
| 1236 | {"IF2 DAC", NULL, "I2S2"}, |
| 1237 | |
| 1238 | {"IF1 DAC1 L", NULL, "IF1 DAC"}, |
| 1239 | {"IF1 DAC1 R", NULL, "IF1 DAC"}, |
| 1240 | {"IF1 DAC2 L", NULL, "IF1 DAC"}, |
| 1241 | {"IF1 DAC2 R", NULL, "IF1 DAC"}, |
| 1242 | {"IF2 DAC L", NULL, "IF2 DAC"}, |
| 1243 | {"IF2 DAC R", NULL, "IF2 DAC"}, |
| 1244 | |
| 1245 | {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"}, |
| 1246 | {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"}, |
| 1247 | {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"}, |
| 1248 | {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"}, |
| 1249 | |
| 1250 | {"Audio DSP", NULL, "DAC MIXL"}, |
| 1251 | {"Audio DSP", NULL, "DAC MIXR"}, |
| 1252 | |
| 1253 | {"DAC L2 Mux", "IF1", "IF1 DAC2 L"}, |
| 1254 | {"DAC L2 Mux", "IF2", "IF2 DAC L"}, |
| 1255 | {"DAC L2 Volume", NULL, "DAC L2 Mux"}, |
| 1256 | |
| 1257 | {"DAC R2 Mux", "IF1", "IF1 DAC2 R"}, |
| 1258 | {"DAC R2 Mux", "IF2", "IF2 DAC R"}, |
| 1259 | {"DAC R2 Volume", NULL, "DAC R2 Mux"}, |
| 1260 | |
| 1261 | {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"}, |
| 1262 | {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"}, |
| 1263 | {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"}, |
| 1264 | {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"}, |
| 1265 | {"Stereo DAC MIXL", NULL, "Stero2 DAC Power"}, |
| 1266 | {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"}, |
| 1267 | {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"}, |
| 1268 | {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"}, |
| 1269 | {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"}, |
| 1270 | {"Stereo DAC MIXR", NULL, "Stero2 DAC Power"}, |
| 1271 | |
| 1272 | {"PDM L Mux", "Stereo DAC MIX", "Stereo DAC MIXL"}, |
| 1273 | {"PDM L Mux", "DD MIX", "DAC MIXL"}, |
| 1274 | {"PDM R Mux", "Stereo DAC MIX", "Stereo DAC MIXR"}, |
| 1275 | {"PDM R Mux", "DD MIX", "DAC MIXR"}, |
| 1276 | |
| 1277 | {"DAC L1", NULL, "Stereo DAC MIXL"}, |
| 1278 | {"DAC L1", NULL, "PLL1", is_sysclk_from_pll}, |
| 1279 | {"DAC L1", NULL, "DAC L1 Power"}, |
| 1280 | {"DAC R1", NULL, "Stereo DAC MIXR"}, |
| 1281 | {"DAC R1", NULL, "PLL1", is_sysclk_from_pll}, |
| 1282 | {"DAC R1", NULL, "DAC R1 Power"}, |
| 1283 | |
| 1284 | {"DD MIXL", "DAC L1 Switch", "DAC MIXL"}, |
| 1285 | {"DD MIXL", "DAC L2 Switch", "DAC L2 Volume"}, |
| 1286 | {"DD MIXL", "DAC R2 Switch", "DAC R2 Volume"}, |
| 1287 | {"DD MIXL", NULL, "Stero2 DAC Power"}, |
| 1288 | |
| 1289 | {"DD MIXR", "DAC R1 Switch", "DAC MIXR"}, |
| 1290 | {"DD MIXR", "DAC R2 Switch", "DAC R2 Volume"}, |
| 1291 | {"DD MIXR", "DAC L2 Switch", "DAC L2 Volume"}, |
| 1292 | {"DD MIXR", NULL, "Stero2 DAC Power"}, |
| 1293 | |
| 1294 | {"OUT MIXL", "BST1 Switch", "BST1"}, |
| 1295 | {"OUT MIXL", "BST2 Switch", "BST2"}, |
| 1296 | {"OUT MIXL", "INL1 Switch", "INL1 VOL"}, |
| 1297 | {"OUT MIXL", "REC MIXL Switch", "RECMIXL"}, |
| 1298 | {"OUT MIXL", "DAC L1 Switch", "DAC L1"}, |
| 1299 | |
| 1300 | {"OUT MIXR", "BST2 Switch", "BST2"}, |
| 1301 | {"OUT MIXR", "BST1 Switch", "BST1"}, |
| 1302 | {"OUT MIXR", "INR1 Switch", "INR1 VOL"}, |
| 1303 | {"OUT MIXR", "REC MIXR Switch", "RECMIXR"}, |
| 1304 | {"OUT MIXR", "DAC R1 Switch", "DAC R1"}, |
| 1305 | |
| 1306 | {"HPOVOL L", "Switch", "OUT MIXL"}, |
| 1307 | {"HPOVOL R", "Switch", "OUT MIXR"}, |
| 1308 | {"OUTVOL L", "Switch", "OUT MIXL"}, |
| 1309 | {"OUTVOL R", "Switch", "OUT MIXR"}, |
| 1310 | |
| 1311 | {"HPOL MIX", "HPO MIX DAC1 Switch", "DAC L1"}, |
| 1312 | {"HPOL MIX", "HPO MIX HPVOL Switch", "HPOVOL L"}, |
| 1313 | {"HPOL MIX", NULL, "HP L Amp"}, |
| 1314 | {"HPOR MIX", "HPO MIX DAC1 Switch", "DAC R1"}, |
| 1315 | {"HPOR MIX", "HPO MIX HPVOL Switch", "HPOVOL R"}, |
| 1316 | {"HPOR MIX", NULL, "HP R Amp"}, |
| 1317 | |
| 1318 | {"LOUT MIX", "DAC L1 Switch", "DAC L1"}, |
| 1319 | {"LOUT MIX", "DAC R1 Switch", "DAC R1"}, |
| 1320 | {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"}, |
| 1321 | {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"}, |
| 1322 | |
| 1323 | {"HP Amp", NULL, "HPOL MIX"}, |
| 1324 | {"HP Amp", NULL, "HPOR MIX"}, |
| 1325 | {"HP Amp", NULL, "Amp Power"}, |
| 1326 | {"HPO L Playback", "Switch", "HP Amp"}, |
| 1327 | {"HPO R Playback", "Switch", "HP Amp"}, |
| 1328 | {"HPOL", NULL, "HPO L Playback"}, |
| 1329 | {"HPOR", NULL, "HPO R Playback"}, |
| 1330 | |
| 1331 | {"LOUT L Playback", "Switch", "LOUT MIX"}, |
| 1332 | {"LOUT R Playback", "Switch", "LOUT MIX"}, |
| 1333 | {"LOUTL", NULL, "LOUT L Playback"}, |
| 1334 | {"LOUTL", NULL, "Amp Power"}, |
| 1335 | {"LOUTR", NULL, "LOUT R Playback"}, |
| 1336 | {"LOUTR", NULL, "Amp Power"}, |
| 1337 | |
| 1338 | {"PDML", NULL, "PDM L Mux"}, |
| 1339 | {"PDMR", NULL, "PDM R Mux"}, |
| 1340 | }; |
| 1341 | |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1342 | static int rt5651_hw_params(struct snd_pcm_substream *substream, |
| 1343 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
| 1344 | { |
Lars-Peter Clausen | c140684 | 2014-05-19 08:03:04 +0200 | [diff] [blame] | 1345 | struct snd_soc_codec *codec = dai->codec; |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1346 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 1347 | unsigned int val_len = 0, val_clk, mask_clk; |
| 1348 | int pre_div, bclk_ms, frame_size; |
| 1349 | |
| 1350 | rt5651->lrck[dai->id] = params_rate(params); |
Oder Chiou | d92950e | 2014-05-20 15:01:55 +0800 | [diff] [blame] | 1351 | pre_div = rl6231_get_clk_info(rt5651->sysclk, rt5651->lrck[dai->id]); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1352 | |
| 1353 | if (pre_div < 0) { |
| 1354 | dev_err(codec->dev, "Unsupported clock setting\n"); |
| 1355 | return -EINVAL; |
| 1356 | } |
| 1357 | frame_size = snd_soc_params_to_frame_size(params); |
| 1358 | if (frame_size < 0) { |
| 1359 | dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); |
| 1360 | return -EINVAL; |
| 1361 | } |
| 1362 | bclk_ms = frame_size > 32 ? 1 : 0; |
| 1363 | rt5651->bclk[dai->id] = rt5651->lrck[dai->id] * (32 << bclk_ms); |
| 1364 | |
| 1365 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", |
| 1366 | rt5651->bclk[dai->id], rt5651->lrck[dai->id]); |
| 1367 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", |
| 1368 | bclk_ms, pre_div, dai->id); |
| 1369 | |
Mark Brown | 794f33d | 2014-07-31 12:33:41 +0100 | [diff] [blame] | 1370 | switch (params_width(params)) { |
| 1371 | case 16: |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1372 | break; |
Mark Brown | 794f33d | 2014-07-31 12:33:41 +0100 | [diff] [blame] | 1373 | case 20: |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1374 | val_len |= RT5651_I2S_DL_20; |
| 1375 | break; |
Mark Brown | 794f33d | 2014-07-31 12:33:41 +0100 | [diff] [blame] | 1376 | case 24: |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1377 | val_len |= RT5651_I2S_DL_24; |
| 1378 | break; |
Mark Brown | 794f33d | 2014-07-31 12:33:41 +0100 | [diff] [blame] | 1379 | case 8: |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1380 | val_len |= RT5651_I2S_DL_8; |
| 1381 | break; |
| 1382 | default: |
| 1383 | return -EINVAL; |
| 1384 | } |
| 1385 | |
| 1386 | switch (dai->id) { |
| 1387 | case RT5651_AIF1: |
| 1388 | mask_clk = RT5651_I2S_PD1_MASK; |
| 1389 | val_clk = pre_div << RT5651_I2S_PD1_SFT; |
| 1390 | snd_soc_update_bits(codec, RT5651_I2S1_SDP, |
| 1391 | RT5651_I2S_DL_MASK, val_len); |
| 1392 | snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk); |
| 1393 | break; |
| 1394 | case RT5651_AIF2: |
| 1395 | mask_clk = RT5651_I2S_BCLK_MS2_MASK | RT5651_I2S_PD2_MASK; |
| 1396 | val_clk = pre_div << RT5651_I2S_PD2_SFT; |
| 1397 | snd_soc_update_bits(codec, RT5651_I2S2_SDP, |
| 1398 | RT5651_I2S_DL_MASK, val_len); |
| 1399 | snd_soc_update_bits(codec, RT5651_ADDA_CLK1, mask_clk, val_clk); |
| 1400 | break; |
| 1401 | default: |
| 1402 | dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id); |
| 1403 | return -EINVAL; |
| 1404 | } |
| 1405 | |
| 1406 | return 0; |
| 1407 | } |
| 1408 | |
| 1409 | static int rt5651_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
| 1410 | { |
| 1411 | struct snd_soc_codec *codec = dai->codec; |
| 1412 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 1413 | unsigned int reg_val = 0; |
| 1414 | |
| 1415 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 1416 | case SND_SOC_DAIFMT_CBM_CFM: |
| 1417 | rt5651->master[dai->id] = 1; |
| 1418 | break; |
| 1419 | case SND_SOC_DAIFMT_CBS_CFS: |
| 1420 | reg_val |= RT5651_I2S_MS_S; |
| 1421 | rt5651->master[dai->id] = 0; |
| 1422 | break; |
| 1423 | default: |
| 1424 | return -EINVAL; |
| 1425 | } |
| 1426 | |
| 1427 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 1428 | case SND_SOC_DAIFMT_NB_NF: |
| 1429 | break; |
| 1430 | case SND_SOC_DAIFMT_IB_NF: |
| 1431 | reg_val |= RT5651_I2S_BP_INV; |
| 1432 | break; |
| 1433 | default: |
| 1434 | return -EINVAL; |
| 1435 | } |
| 1436 | |
| 1437 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 1438 | case SND_SOC_DAIFMT_I2S: |
| 1439 | break; |
| 1440 | case SND_SOC_DAIFMT_LEFT_J: |
| 1441 | reg_val |= RT5651_I2S_DF_LEFT; |
| 1442 | break; |
| 1443 | case SND_SOC_DAIFMT_DSP_A: |
| 1444 | reg_val |= RT5651_I2S_DF_PCM_A; |
| 1445 | break; |
| 1446 | case SND_SOC_DAIFMT_DSP_B: |
| 1447 | reg_val |= RT5651_I2S_DF_PCM_B; |
| 1448 | break; |
| 1449 | default: |
| 1450 | return -EINVAL; |
| 1451 | } |
| 1452 | |
| 1453 | switch (dai->id) { |
| 1454 | case RT5651_AIF1: |
| 1455 | snd_soc_update_bits(codec, RT5651_I2S1_SDP, |
| 1456 | RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | |
| 1457 | RT5651_I2S_DF_MASK, reg_val); |
| 1458 | break; |
| 1459 | case RT5651_AIF2: |
| 1460 | snd_soc_update_bits(codec, RT5651_I2S2_SDP, |
| 1461 | RT5651_I2S_MS_MASK | RT5651_I2S_BP_MASK | |
| 1462 | RT5651_I2S_DF_MASK, reg_val); |
| 1463 | break; |
| 1464 | default: |
| 1465 | dev_err(codec->dev, "Wrong dai->id: %d\n", dai->id); |
| 1466 | return -EINVAL; |
| 1467 | } |
| 1468 | return 0; |
| 1469 | } |
| 1470 | |
| 1471 | static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, |
| 1472 | int clk_id, unsigned int freq, int dir) |
| 1473 | { |
| 1474 | struct snd_soc_codec *codec = dai->codec; |
| 1475 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 1476 | unsigned int reg_val = 0; |
| 1477 | |
| 1478 | if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src) |
| 1479 | return 0; |
| 1480 | |
| 1481 | switch (clk_id) { |
| 1482 | case RT5651_SCLK_S_MCLK: |
| 1483 | reg_val |= RT5651_SCLK_SRC_MCLK; |
| 1484 | break; |
| 1485 | case RT5651_SCLK_S_PLL1: |
| 1486 | reg_val |= RT5651_SCLK_SRC_PLL1; |
| 1487 | break; |
| 1488 | case RT5651_SCLK_S_RCCLK: |
| 1489 | reg_val |= RT5651_SCLK_SRC_RCCLK; |
| 1490 | break; |
| 1491 | default: |
| 1492 | dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); |
| 1493 | return -EINVAL; |
| 1494 | } |
| 1495 | snd_soc_update_bits(codec, RT5651_GLB_CLK, |
| 1496 | RT5651_SCLK_SRC_MASK, reg_val); |
| 1497 | rt5651->sysclk = freq; |
| 1498 | rt5651->sysclk_src = clk_id; |
| 1499 | |
| 1500 | dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); |
| 1501 | |
| 1502 | return 0; |
| 1503 | } |
| 1504 | |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1505 | static int rt5651_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, |
| 1506 | unsigned int freq_in, unsigned int freq_out) |
| 1507 | { |
| 1508 | struct snd_soc_codec *codec = dai->codec; |
| 1509 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
Oder Chiou | 71c7a2d | 2014-05-20 15:01:54 +0800 | [diff] [blame] | 1510 | struct rl6231_pll_code pll_code; |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1511 | int ret; |
| 1512 | |
| 1513 | if (source == rt5651->pll_src && freq_in == rt5651->pll_in && |
| 1514 | freq_out == rt5651->pll_out) |
| 1515 | return 0; |
| 1516 | |
| 1517 | if (!freq_in || !freq_out) { |
| 1518 | dev_dbg(codec->dev, "PLL disabled\n"); |
| 1519 | |
| 1520 | rt5651->pll_in = 0; |
| 1521 | rt5651->pll_out = 0; |
| 1522 | snd_soc_update_bits(codec, RT5651_GLB_CLK, |
| 1523 | RT5651_SCLK_SRC_MASK, RT5651_SCLK_SRC_MCLK); |
| 1524 | return 0; |
| 1525 | } |
| 1526 | |
| 1527 | switch (source) { |
| 1528 | case RT5651_PLL1_S_MCLK: |
| 1529 | snd_soc_update_bits(codec, RT5651_GLB_CLK, |
| 1530 | RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_MCLK); |
| 1531 | break; |
| 1532 | case RT5651_PLL1_S_BCLK1: |
| 1533 | snd_soc_update_bits(codec, RT5651_GLB_CLK, |
| 1534 | RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK1); |
| 1535 | break; |
| 1536 | case RT5651_PLL1_S_BCLK2: |
| 1537 | snd_soc_update_bits(codec, RT5651_GLB_CLK, |
| 1538 | RT5651_PLL1_SRC_MASK, RT5651_PLL1_SRC_BCLK2); |
| 1539 | break; |
| 1540 | default: |
| 1541 | dev_err(codec->dev, "Unknown PLL source %d\n", source); |
| 1542 | return -EINVAL; |
| 1543 | } |
| 1544 | |
Oder Chiou | 71c7a2d | 2014-05-20 15:01:54 +0800 | [diff] [blame] | 1545 | ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1546 | if (ret < 0) { |
| 1547 | dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); |
| 1548 | return ret; |
| 1549 | } |
| 1550 | |
Oder Chiou | 71c7a2d | 2014-05-20 15:01:54 +0800 | [diff] [blame] | 1551 | dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", |
| 1552 | pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), |
| 1553 | pll_code.n_code, pll_code.k_code); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1554 | |
| 1555 | snd_soc_write(codec, RT5651_PLL_CTRL1, |
Oder Chiou | 71c7a2d | 2014-05-20 15:01:54 +0800 | [diff] [blame] | 1556 | pll_code.n_code << RT5651_PLL_N_SFT | pll_code.k_code); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1557 | snd_soc_write(codec, RT5651_PLL_CTRL2, |
Oder Chiou | 71c7a2d | 2014-05-20 15:01:54 +0800 | [diff] [blame] | 1558 | (pll_code.m_bp ? 0 : pll_code.m_code) << RT5651_PLL_M_SFT | |
| 1559 | pll_code.m_bp << RT5651_PLL_M_BP_SFT); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1560 | |
| 1561 | rt5651->pll_in = freq_in; |
| 1562 | rt5651->pll_out = freq_out; |
| 1563 | rt5651->pll_src = source; |
| 1564 | |
| 1565 | return 0; |
| 1566 | } |
| 1567 | |
| 1568 | static int rt5651_set_bias_level(struct snd_soc_codec *codec, |
| 1569 | enum snd_soc_bias_level level) |
| 1570 | { |
| 1571 | switch (level) { |
| 1572 | case SND_SOC_BIAS_PREPARE: |
Lars-Peter Clausen | eb13bd5 | 2015-05-19 21:49:09 +0200 | [diff] [blame] | 1573 | if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) { |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1574 | snd_soc_update_bits(codec, RT5651_PWR_ANLG1, |
| 1575 | RT5651_PWR_VREF1 | RT5651_PWR_MB | |
| 1576 | RT5651_PWR_BG | RT5651_PWR_VREF2, |
| 1577 | RT5651_PWR_VREF1 | RT5651_PWR_MB | |
| 1578 | RT5651_PWR_BG | RT5651_PWR_VREF2); |
| 1579 | usleep_range(10000, 15000); |
| 1580 | snd_soc_update_bits(codec, RT5651_PWR_ANLG1, |
| 1581 | RT5651_PWR_FV1 | RT5651_PWR_FV2, |
| 1582 | RT5651_PWR_FV1 | RT5651_PWR_FV2); |
| 1583 | snd_soc_update_bits(codec, RT5651_PWR_ANLG1, |
| 1584 | RT5651_PWR_LDO_DVO_MASK, |
| 1585 | RT5651_PWR_LDO_DVO_1_2V); |
| 1586 | snd_soc_update_bits(codec, RT5651_D_MISC, 0x1, 0x1); |
| 1587 | if (snd_soc_read(codec, RT5651_PLL_MODE_1) & 0x9200) |
| 1588 | snd_soc_update_bits(codec, RT5651_D_MISC, |
| 1589 | 0xc00, 0xc00); |
| 1590 | } |
| 1591 | break; |
| 1592 | |
| 1593 | case SND_SOC_BIAS_STANDBY: |
| 1594 | snd_soc_write(codec, RT5651_D_MISC, 0x0010); |
| 1595 | snd_soc_write(codec, RT5651_PWR_DIG1, 0x0000); |
| 1596 | snd_soc_write(codec, RT5651_PWR_DIG2, 0x0000); |
| 1597 | snd_soc_write(codec, RT5651_PWR_VOL, 0x0000); |
| 1598 | snd_soc_write(codec, RT5651_PWR_MIXER, 0x0000); |
| 1599 | snd_soc_write(codec, RT5651_PWR_ANLG1, 0x0000); |
| 1600 | snd_soc_write(codec, RT5651_PWR_ANLG2, 0x0000); |
| 1601 | break; |
| 1602 | |
| 1603 | default: |
| 1604 | break; |
| 1605 | } |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1606 | |
| 1607 | return 0; |
| 1608 | } |
| 1609 | |
| 1610 | static int rt5651_probe(struct snd_soc_codec *codec) |
| 1611 | { |
| 1612 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 1613 | |
| 1614 | rt5651->codec = codec; |
| 1615 | |
| 1616 | snd_soc_update_bits(codec, RT5651_PWR_ANLG1, |
| 1617 | RT5651_PWR_VREF1 | RT5651_PWR_MB | |
| 1618 | RT5651_PWR_BG | RT5651_PWR_VREF2, |
| 1619 | RT5651_PWR_VREF1 | RT5651_PWR_MB | |
| 1620 | RT5651_PWR_BG | RT5651_PWR_VREF2); |
| 1621 | usleep_range(10000, 15000); |
| 1622 | snd_soc_update_bits(codec, RT5651_PWR_ANLG1, |
| 1623 | RT5651_PWR_FV1 | RT5651_PWR_FV2, |
| 1624 | RT5651_PWR_FV1 | RT5651_PWR_FV2); |
| 1625 | |
Lars-Peter Clausen | bd1204c | 2015-04-27 22:13:24 +0200 | [diff] [blame] | 1626 | snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1627 | |
| 1628 | return 0; |
| 1629 | } |
| 1630 | |
| 1631 | #ifdef CONFIG_PM |
| 1632 | static int rt5651_suspend(struct snd_soc_codec *codec) |
| 1633 | { |
| 1634 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 1635 | |
| 1636 | regcache_cache_only(rt5651->regmap, true); |
| 1637 | regcache_mark_dirty(rt5651->regmap); |
| 1638 | return 0; |
| 1639 | } |
| 1640 | |
| 1641 | static int rt5651_resume(struct snd_soc_codec *codec) |
| 1642 | { |
| 1643 | struct rt5651_priv *rt5651 = snd_soc_codec_get_drvdata(codec); |
| 1644 | |
| 1645 | regcache_cache_only(rt5651->regmap, false); |
| 1646 | snd_soc_cache_sync(codec); |
| 1647 | |
| 1648 | return 0; |
| 1649 | } |
| 1650 | #else |
| 1651 | #define rt5651_suspend NULL |
| 1652 | #define rt5651_resume NULL |
| 1653 | #endif |
| 1654 | |
| 1655 | #define RT5651_STEREO_RATES SNDRV_PCM_RATE_8000_96000 |
| 1656 | #define RT5651_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
| 1657 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) |
| 1658 | |
Mark Brown | 871c131 | 2014-04-18 20:02:06 +0100 | [diff] [blame] | 1659 | static const struct snd_soc_dai_ops rt5651_aif_dai_ops = { |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1660 | .hw_params = rt5651_hw_params, |
| 1661 | .set_fmt = rt5651_set_dai_fmt, |
| 1662 | .set_sysclk = rt5651_set_dai_sysclk, |
| 1663 | .set_pll = rt5651_set_dai_pll, |
| 1664 | }; |
| 1665 | |
Mark Brown | 871c131 | 2014-04-18 20:02:06 +0100 | [diff] [blame] | 1666 | static struct snd_soc_dai_driver rt5651_dai[] = { |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1667 | { |
| 1668 | .name = "rt5651-aif1", |
| 1669 | .id = RT5651_AIF1, |
| 1670 | .playback = { |
| 1671 | .stream_name = "AIF1 Playback", |
| 1672 | .channels_min = 1, |
| 1673 | .channels_max = 2, |
| 1674 | .rates = RT5651_STEREO_RATES, |
| 1675 | .formats = RT5651_FORMATS, |
| 1676 | }, |
| 1677 | .capture = { |
| 1678 | .stream_name = "AIF1 Capture", |
| 1679 | .channels_min = 1, |
| 1680 | .channels_max = 2, |
| 1681 | .rates = RT5651_STEREO_RATES, |
| 1682 | .formats = RT5651_FORMATS, |
| 1683 | }, |
| 1684 | .ops = &rt5651_aif_dai_ops, |
| 1685 | }, |
| 1686 | { |
| 1687 | .name = "rt5651-aif2", |
| 1688 | .id = RT5651_AIF2, |
| 1689 | .playback = { |
| 1690 | .stream_name = "AIF2 Playback", |
| 1691 | .channels_min = 1, |
| 1692 | .channels_max = 2, |
| 1693 | .rates = RT5651_STEREO_RATES, |
| 1694 | .formats = RT5651_FORMATS, |
| 1695 | }, |
| 1696 | .capture = { |
| 1697 | .stream_name = "AIF2 Capture", |
| 1698 | .channels_min = 1, |
| 1699 | .channels_max = 2, |
| 1700 | .rates = RT5651_STEREO_RATES, |
| 1701 | .formats = RT5651_FORMATS, |
| 1702 | }, |
| 1703 | .ops = &rt5651_aif_dai_ops, |
| 1704 | }, |
| 1705 | }; |
| 1706 | |
| 1707 | static struct snd_soc_codec_driver soc_codec_dev_rt5651 = { |
| 1708 | .probe = rt5651_probe, |
| 1709 | .suspend = rt5651_suspend, |
| 1710 | .resume = rt5651_resume, |
| 1711 | .set_bias_level = rt5651_set_bias_level, |
| 1712 | .idle_bias_off = true, |
| 1713 | .controls = rt5651_snd_controls, |
| 1714 | .num_controls = ARRAY_SIZE(rt5651_snd_controls), |
| 1715 | .dapm_widgets = rt5651_dapm_widgets, |
| 1716 | .num_dapm_widgets = ARRAY_SIZE(rt5651_dapm_widgets), |
| 1717 | .dapm_routes = rt5651_dapm_routes, |
| 1718 | .num_dapm_routes = ARRAY_SIZE(rt5651_dapm_routes), |
| 1719 | }; |
| 1720 | |
| 1721 | static const struct regmap_config rt5651_regmap = { |
| 1722 | .reg_bits = 8, |
| 1723 | .val_bits = 16, |
| 1724 | |
| 1725 | .max_register = RT5651_DEVICE_ID + 1 + (ARRAY_SIZE(rt5651_ranges) * |
| 1726 | RT5651_PR_SPACING), |
| 1727 | .volatile_reg = rt5651_volatile_register, |
| 1728 | .readable_reg = rt5651_readable_register, |
| 1729 | |
| 1730 | .cache_type = REGCACHE_RBTREE, |
| 1731 | .reg_defaults = rt5651_reg, |
| 1732 | .num_reg_defaults = ARRAY_SIZE(rt5651_reg), |
| 1733 | .ranges = rt5651_ranges, |
| 1734 | .num_ranges = ARRAY_SIZE(rt5651_ranges), |
| 1735 | }; |
| 1736 | |
| 1737 | static const struct i2c_device_id rt5651_i2c_id[] = { |
| 1738 | { "rt5651", 0 }, |
| 1739 | { } |
| 1740 | }; |
| 1741 | MODULE_DEVICE_TABLE(i2c, rt5651_i2c_id); |
| 1742 | |
| 1743 | static int rt5651_i2c_probe(struct i2c_client *i2c, |
| 1744 | const struct i2c_device_id *id) |
| 1745 | { |
| 1746 | struct rt5651_platform_data *pdata = dev_get_platdata(&i2c->dev); |
| 1747 | struct rt5651_priv *rt5651; |
| 1748 | int ret; |
| 1749 | |
| 1750 | rt5651 = devm_kzalloc(&i2c->dev, sizeof(*rt5651), |
| 1751 | GFP_KERNEL); |
| 1752 | if (NULL == rt5651) |
| 1753 | return -ENOMEM; |
| 1754 | |
| 1755 | i2c_set_clientdata(i2c, rt5651); |
| 1756 | |
| 1757 | if (pdata) |
| 1758 | rt5651->pdata = *pdata; |
| 1759 | |
| 1760 | rt5651->regmap = devm_regmap_init_i2c(i2c, &rt5651_regmap); |
| 1761 | if (IS_ERR(rt5651->regmap)) { |
| 1762 | ret = PTR_ERR(rt5651->regmap); |
| 1763 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", |
| 1764 | ret); |
| 1765 | return ret; |
| 1766 | } |
| 1767 | |
| 1768 | regmap_read(rt5651->regmap, RT5651_DEVICE_ID, &ret); |
| 1769 | if (ret != RT5651_DEVICE_ID_VALUE) { |
| 1770 | dev_err(&i2c->dev, |
| 1771 | "Device with ID register %x is not rt5651\n", ret); |
| 1772 | return -ENODEV; |
| 1773 | } |
| 1774 | |
| 1775 | regmap_write(rt5651->regmap, RT5651_RESET, 0); |
| 1776 | |
| 1777 | ret = regmap_register_patch(rt5651->regmap, init_list, |
| 1778 | ARRAY_SIZE(init_list)); |
| 1779 | if (ret != 0) |
| 1780 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); |
| 1781 | |
| 1782 | if (rt5651->pdata.in2_diff) |
| 1783 | regmap_update_bits(rt5651->regmap, RT5651_IN1_IN2, |
| 1784 | RT5651_IN_DF2, RT5651_IN_DF2); |
| 1785 | |
| 1786 | if (rt5651->pdata.dmic_en) |
| 1787 | regmap_update_bits(rt5651->regmap, RT5651_GPIO_CTRL1, |
| 1788 | RT5651_GP2_PIN_MASK, RT5651_GP2_PIN_DMIC1_SCL); |
| 1789 | |
| 1790 | rt5651->hp_mute = 1; |
| 1791 | |
| 1792 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5651, |
| 1793 | rt5651_dai, ARRAY_SIZE(rt5651_dai)); |
| 1794 | |
| 1795 | return ret; |
| 1796 | } |
| 1797 | |
| 1798 | static int rt5651_i2c_remove(struct i2c_client *i2c) |
| 1799 | { |
| 1800 | snd_soc_unregister_codec(&i2c->dev); |
| 1801 | |
| 1802 | return 0; |
| 1803 | } |
| 1804 | |
Mark Brown | 871c131 | 2014-04-18 20:02:06 +0100 | [diff] [blame] | 1805 | static struct i2c_driver rt5651_i2c_driver = { |
Bard Liao | 40bc18a | 2014-04-16 19:20:46 +0800 | [diff] [blame] | 1806 | .driver = { |
| 1807 | .name = "rt5651", |
| 1808 | .owner = THIS_MODULE, |
| 1809 | }, |
| 1810 | .probe = rt5651_i2c_probe, |
| 1811 | .remove = rt5651_i2c_remove, |
| 1812 | .id_table = rt5651_i2c_id, |
| 1813 | }; |
| 1814 | module_i2c_driver(rt5651_i2c_driver); |
| 1815 | |
| 1816 | MODULE_DESCRIPTION("ASoC RT5651 driver"); |
| 1817 | MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); |
| 1818 | MODULE_LICENSE("GPL v2"); |