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Sungchun Kang89069692012-07-31 10:44:04 -03001/*
2 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * header file for Samsung EXYNOS5 SoC series G-Scaler driver
6
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef GSC_CORE_H_
13#define GSC_CORE_H_
14
15#include <linux/delay.h>
16#include <linux/sched.h>
17#include <linux/spinlock.h>
18#include <linux/types.h>
19#include <linux/videodev2.h>
20#include <linux/io.h>
21#include <linux/pm_runtime.h>
22#include <media/videobuf2-core.h>
23#include <media/v4l2-ctrls.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-mem2mem.h>
26#include <media/v4l2-mediabus.h>
27#include <media/videobuf2-dma-contig.h>
28
29#include "gsc-regs.h"
30
31#define CONFIG_VB2_GSC_DMA_CONTIG 1
32#define GSC_MODULE_NAME "exynos-gsc"
33
34#define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000)
35#define GSC_MAX_DEVS 4
36#define GSC_M2M_BUF_NUM 0
37#define GSC_MAX_CTRL_NUM 10
38#define GSC_SC_ALIGN_4 4
39#define GSC_SC_ALIGN_2 2
40#define DEFAULT_CSC_EQ 1
41#define DEFAULT_CSC_RANGE 1
42
43#define GSC_PARAMS (1 << 0)
44#define GSC_SRC_FMT (1 << 1)
45#define GSC_DST_FMT (1 << 2)
46#define GSC_CTX_M2M (1 << 3)
47#define GSC_CTX_STOP_REQ (1 << 6)
48
49enum gsc_dev_flags {
50 /* for global */
51 ST_SUSPEND,
52
53 /* for m2m node */
54 ST_M2M_OPEN,
55 ST_M2M_RUN,
56 ST_M2M_PEND,
57 ST_M2M_SUSPENDED,
58 ST_M2M_SUSPENDING,
59};
60
61enum gsc_irq {
62 GSC_IRQ_DONE,
63 GSC_IRQ_OVERRUN
64};
65
66/**
67 * enum gsc_datapath - the path of data used for G-Scaler
68 * @GSC_CAMERA: from camera
69 * @GSC_DMA: from/to DMA
70 * @GSC_LOCAL: to local path
71 * @GSC_WRITEBACK: from FIMD
72 */
73enum gsc_datapath {
74 GSC_CAMERA = 0x1,
75 GSC_DMA,
76 GSC_MIXER,
77 GSC_FIMD,
78 GSC_WRITEBACK,
79};
80
81enum gsc_color_fmt {
82 GSC_RGB = 0x1,
83 GSC_YUV420 = 0x2,
84 GSC_YUV422 = 0x4,
85 GSC_YUV444 = 0x8,
86};
87
88enum gsc_yuv_fmt {
89 GSC_LSB_Y = 0x10,
90 GSC_LSB_C,
91 GSC_CBCR = 0x20,
92 GSC_CRCB,
93};
94
95#define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
96#define is_rgb(x) (!!((x) & 0x1))
97#define is_yuv420(x) (!!((x) & 0x2))
98#define is_yuv422(x) (!!((x) & 0x4))
99
100#define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state)
101#define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state)
102#define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state)
103
104#define ctrl_to_ctx(__ctrl) \
105 container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
106/**
107 * struct gsc_fmt - the driver's internal color format data
108 * @mbus_code: Media Bus pixel code, -1 if not applicable
109 * @name: format description
110 * @pixelformat: the fourcc code for this format, 0 if not applicable
111 * @yorder: Y/C order
112 * @corder: Chrominance order control
113 * @num_planes: number of physically non-contiguous data planes
114 * @nr_comp: number of physically contiguous data planes
115 * @depth: per plane driver's private 'number of bits per pixel'
116 * @flags: flags indicating which operation mode format applies to
117 */
118struct gsc_fmt {
119 enum v4l2_mbus_pixelcode mbus_code;
120 char *name;
121 u32 pixelformat;
122 u32 color;
123 u32 yorder;
124 u32 corder;
125 u16 num_planes;
126 u16 num_comp;
127 u8 depth[VIDEO_MAX_PLANES];
128 u32 flags;
129};
130
131/**
132 * struct gsc_input_buf - the driver's video buffer
133 * @vb: videobuf2 buffer
134 * @list : linked list structure for buffer queue
135 * @idx : index of G-Scaler input buffer
136 */
137struct gsc_input_buf {
138 struct vb2_buffer vb;
139 struct list_head list;
140 int idx;
141};
142
143/**
144 * struct gsc_addr - the G-Scaler physical address set
145 * @y: luminance plane address
146 * @cb: Cb plane address
147 * @cr: Cr plane address
148 */
149struct gsc_addr {
150 dma_addr_t y;
151 dma_addr_t cb;
152 dma_addr_t cr;
153};
154
155/* struct gsc_ctrls - the G-Scaler control set
156 * @rotate: rotation degree
157 * @hflip: horizontal flip
158 * @vflip: vertical flip
159 * @global_alpha: the alpha value of current frame
160 */
161struct gsc_ctrls {
162 struct v4l2_ctrl *rotate;
163 struct v4l2_ctrl *hflip;
164 struct v4l2_ctrl *vflip;
165 struct v4l2_ctrl *global_alpha;
166};
167
168/**
169 * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
170 * @pre_shfactor: pre sclaer shift factor
171 * @pre_hratio: horizontal ratio of the prescaler
172 * @pre_vratio: vertical ratio of the prescaler
173 * @main_hratio: the main scaler's horizontal ratio
174 * @main_vratio: the main scaler's vertical ratio
175 */
176struct gsc_scaler {
177 u32 pre_shfactor;
178 u32 pre_hratio;
179 u32 pre_vratio;
180 u32 main_hratio;
181 u32 main_vratio;
182};
183
184struct gsc_dev;
185
186struct gsc_ctx;
187
188/**
189 * struct gsc_frame - source/target frame properties
190 * @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
191 * @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
192 * @crop: cropped(source)/scaled(destination) size
193 * @payload: image size in bytes (w x h x bpp)
194 * @addr: image frame buffer physical addresses
195 * @fmt: G-Scaler color format pointer
196 * @colorspace: value indicating v4l2_colorspace
197 * @alpha: frame's alpha value
198 */
199struct gsc_frame {
200 u32 f_width;
201 u32 f_height;
202 struct v4l2_rect crop;
203 unsigned long payload[VIDEO_MAX_PLANES];
204 struct gsc_addr addr;
205 const struct gsc_fmt *fmt;
206 u32 colorspace;
207 u8 alpha;
208};
209
210/**
211 * struct gsc_m2m_device - v4l2 memory-to-memory device data
212 * @vfd: the video device node for v4l2 m2m mode
213 * @m2m_dev: v4l2 memory-to-memory device data
214 * @ctx: hardware context data
215 * @refcnt: the reference counter
216 */
217struct gsc_m2m_device {
218 struct video_device *vfd;
219 struct v4l2_m2m_dev *m2m_dev;
220 struct gsc_ctx *ctx;
221 int refcnt;
222};
223
224/**
225 * struct gsc_pix_max - image pixel size limits in various IP configurations
226 *
227 * @org_scaler_bypass_w: max pixel width when the scaler is disabled
228 * @org_scaler_bypass_h: max pixel height when the scaler is disabled
229 * @org_scaler_input_w: max pixel width when the scaler is enabled
230 * @org_scaler_input_h: max pixel height when the scaler is enabled
231 * @real_rot_dis_w: max pixel src cropped height with the rotator is off
232 * @real_rot_dis_h: max pixel src croppped width with the rotator is off
233 * @real_rot_en_w: max pixel src cropped width with the rotator is on
234 * @real_rot_en_h: max pixel src cropped height with the rotator is on
235 * @target_rot_dis_w: max pixel dst scaled width with the rotator is off
236 * @target_rot_dis_h: max pixel dst scaled height with the rotator is off
237 * @target_rot_en_w: max pixel dst scaled width with the rotator is on
238 * @target_rot_en_h: max pixel dst scaled height with the rotator is on
239 */
240struct gsc_pix_max {
241 u16 org_scaler_bypass_w;
242 u16 org_scaler_bypass_h;
243 u16 org_scaler_input_w;
244 u16 org_scaler_input_h;
245 u16 real_rot_dis_w;
246 u16 real_rot_dis_h;
247 u16 real_rot_en_w;
248 u16 real_rot_en_h;
249 u16 target_rot_dis_w;
250 u16 target_rot_dis_h;
251 u16 target_rot_en_w;
252 u16 target_rot_en_h;
253};
254
255/**
256 * struct gsc_pix_min - image pixel size limits in various IP configurations
257 *
258 * @org_w: minimum source pixel width
259 * @org_h: minimum source pixel height
260 * @real_w: minimum input crop pixel width
261 * @real_h: minimum input crop pixel height
262 * @target_rot_dis_w: minimum output scaled pixel height when rotator is off
263 * @target_rot_dis_h: minimum output scaled pixel height when rotator is off
264 * @target_rot_en_w: minimum output scaled pixel height when rotator is on
265 * @target_rot_en_h: minimum output scaled pixel height when rotator is on
266 */
267struct gsc_pix_min {
268 u16 org_w;
269 u16 org_h;
270 u16 real_w;
271 u16 real_h;
272 u16 target_rot_dis_w;
273 u16 target_rot_dis_h;
274 u16 target_rot_en_w;
275 u16 target_rot_en_h;
276};
277
278struct gsc_pix_align {
279 u16 org_h;
280 u16 org_w;
281 u16 offset_h;
282 u16 real_w;
283 u16 real_h;
284 u16 target_w;
285 u16 target_h;
286};
287
288/**
289 * struct gsc_variant - G-Scaler variant information
290 */
291struct gsc_variant {
292 struct gsc_pix_max *pix_max;
293 struct gsc_pix_min *pix_min;
294 struct gsc_pix_align *pix_align;
295 u16 in_buf_cnt;
296 u16 out_buf_cnt;
297 u16 sc_up_max;
298 u16 sc_down_max;
299 u16 poly_sc_down_max;
300 u16 pre_sc_down_max;
301 u16 local_sc_down;
302};
303
304/**
305 * struct gsc_driverdata - per device type driver data for init time.
306 *
307 * @variant: the variant information for this driver.
308 * @lclk_frequency: G-Scaler clock frequency
309 * @num_entities: the number of g-scalers
310 */
311struct gsc_driverdata {
312 struct gsc_variant *variant[GSC_MAX_DEVS];
313 unsigned long lclk_frequency;
314 int num_entities;
315};
316
317/**
318 * struct gsc_dev - abstraction for G-Scaler entity
319 * @slock: the spinlock protecting this data structure
320 * @lock: the mutex protecting this data structure
321 * @pdev: pointer to the G-Scaler platform device
322 * @variant: the IP variant information
323 * @id: G-Scaler device index (0..GSC_MAX_DEVS)
324 * @clock: clocks required for G-Scaler operation
325 * @regs: the mapped hardware registers
326 * @irq_queue: interrupt handler waitqueue
327 * @m2m: memory-to-memory V4L2 device information
328 * @state: flags used to synchronize m2m and capture mode operation
329 * @alloc_ctx: videobuf2 memory allocator context
330 * @vdev: video device for G-Scaler instance
331 */
332struct gsc_dev {
333 spinlock_t slock;
334 struct mutex lock;
335 struct platform_device *pdev;
336 struct gsc_variant *variant;
337 u16 id;
338 struct clk *clock;
339 void __iomem *regs;
340 wait_queue_head_t irq_queue;
341 struct gsc_m2m_device m2m;
342 struct exynos_platform_gscaler *pdata;
343 unsigned long state;
344 struct vb2_alloc_ctx *alloc_ctx;
345 struct video_device vdev;
346};
347
348/**
349 * gsc_ctx - the device context data
350 * @s_frame: source frame properties
351 * @d_frame: destination frame properties
352 * @in_path: input mode (DMA or camera)
353 * @out_path: output mode (DMA or FIFO)
354 * @scaler: image scaler properties
355 * @flags: additional flags for image conversion
356 * @state: flags to keep track of user configuration
357 * @gsc_dev: the G-Scaler device this context applies to
358 * @m2m_ctx: memory-to-memory device context
359 * @fh: v4l2 file handle
360 * @ctrl_handler: v4l2 controls handler
361 * @gsc_ctrls G-Scaler control set
362 * @ctrls_rdy: true if the control handler is initialized
363 */
364struct gsc_ctx {
365 struct gsc_frame s_frame;
366 struct gsc_frame d_frame;
367 enum gsc_datapath in_path;
368 enum gsc_datapath out_path;
369 struct gsc_scaler scaler;
370 u32 flags;
371 u32 state;
372 int rotation;
373 unsigned int hflip:1;
374 unsigned int vflip:1;
375 struct gsc_dev *gsc_dev;
376 struct v4l2_m2m_ctx *m2m_ctx;
377 struct v4l2_fh fh;
378 struct v4l2_ctrl_handler ctrl_handler;
379 struct gsc_ctrls gsc_ctrls;
380 bool ctrls_rdy;
381};
382
383void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
384int gsc_register_m2m_device(struct gsc_dev *gsc);
385void gsc_unregister_m2m_device(struct gsc_dev *gsc);
386void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
387
388u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
389const struct gsc_fmt *get_format(int index);
390const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
391int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f);
392int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
393void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
394int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
395void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
396int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
397int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
398int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
399 u32 *ratio);
400void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
401void gsc_check_src_scale_info(struct gsc_variant *var,
402 struct gsc_frame *s_frame,
403 u32 *wratio, u32 tx, u32 ty, u32 *hratio);
404int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
405 int dh, int rot, int out_path);
406int gsc_set_scaler_info(struct gsc_ctx *ctx);
407int gsc_ctrls_create(struct gsc_ctx *ctx);
408void gsc_ctrls_delete(struct gsc_ctx *ctx);
409int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
410 struct gsc_frame *frame, struct gsc_addr *addr);
411
412static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
413{
414 unsigned long flags;
415
416 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
417 ctx->state |= state;
418 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
419}
420
421static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
422{
423 unsigned long flags;
424
425 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
426 ctx->state &= ~state;
427 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
428}
429
Shaik Ameer Bashaaecede42012-11-07 03:37:07 -0300430static inline int is_tiled(const struct gsc_fmt *fmt)
431{
432 return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
433}
434
Sungchun Kang89069692012-07-31 10:44:04 -0300435static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
436{
437 u32 cfg = readl(dev->regs + GSC_ENABLE);
438
439 if (on)
440 cfg |= GSC_ENABLE_ON;
441 else
442 cfg &= ~GSC_ENABLE_ON;
443
444 writel(cfg, dev->regs + GSC_ENABLE);
445}
446
447static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
448{
449 u32 cfg = readl(dev->regs + GSC_IRQ);
450 if (cfg & GSC_IRQ_STATUS_OR_IRQ)
451 return GSC_IRQ_OVERRUN;
452 else
453 return GSC_IRQ_DONE;
454
455}
456
457static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
458{
459 u32 cfg = readl(dev->regs + GSC_IRQ);
460 if (irq == GSC_IRQ_OVERRUN)
461 cfg |= GSC_IRQ_STATUS_OR_IRQ;
462 else if (irq == GSC_IRQ_DONE)
463 cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
464 writel(cfg, dev->regs + GSC_IRQ);
465}
466
467static inline void gsc_lock(struct vb2_queue *vq)
468{
469 struct gsc_ctx *ctx = vb2_get_drv_priv(vq);
470 mutex_lock(&ctx->gsc_dev->lock);
471}
472
473static inline void gsc_unlock(struct vb2_queue *vq)
474{
475 struct gsc_ctx *ctx = vb2_get_drv_priv(vq);
476 mutex_unlock(&ctx->gsc_dev->lock);
477}
478
479static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
480{
481 unsigned long flags;
482 bool ret;
483
484 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
485 ret = (ctx->state & mask) == mask;
486 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
487 return ret;
488}
489
490static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
491 enum v4l2_buf_type type)
492{
493 struct gsc_frame *frame;
494
495 if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
496 frame = &ctx->s_frame;
497 } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
498 frame = &ctx->d_frame;
499 } else {
500 pr_err("Wrong buffer/video queue type (%d)", type);
501 return ERR_PTR(-EINVAL);
502 }
503
504 return frame;
505}
506
507void gsc_hw_set_sw_reset(struct gsc_dev *dev);
508int gsc_wait_reset(struct gsc_dev *dev);
509
510void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
511void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
512void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
513void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
514void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
515 int index);
516void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
517 int index);
518void gsc_hw_set_input_path(struct gsc_ctx *ctx);
519void gsc_hw_set_in_size(struct gsc_ctx *ctx);
520void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
521void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
522void gsc_hw_set_output_path(struct gsc_ctx *ctx);
523void gsc_hw_set_out_size(struct gsc_ctx *ctx);
524void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
525void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
526void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
527void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
528void gsc_hw_set_rotation(struct gsc_ctx *ctx);
529void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
530void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
531
532#endif /* GSC_CORE_H_ */