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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/sharpsl.c
3 *
4 * Copyright (C) 2004 Richard Purdie
5 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00006 * $Id: sharpsl.c,v 1.7 2005/11/07 11:14:31 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * Based on Sharp's NAND driver sharp_sl.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <linux/genhd.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/mtd/mtd.h>
21#include <linux/mtd/nand.h>
22#include <linux/mtd/nand_ecc.h>
23#include <linux/mtd/partitions.h>
24#include <linux/interrupt.h>
25#include <asm/io.h>
26#include <asm/hardware.h>
27#include <asm/mach-types.h>
28
29static void __iomem *sharpsl_io_base;
30static int sharpsl_phys_base = 0x0C000000;
31
32/* register offset */
33#define ECCLPLB sharpsl_io_base+0x00 /* line parity 7 - 0 bit */
34#define ECCLPUB sharpsl_io_base+0x04 /* line parity 15 - 8 bit */
35#define ECCCP sharpsl_io_base+0x08 /* column parity 5 - 0 bit */
36#define ECCCNTR sharpsl_io_base+0x0C /* ECC byte counter */
37#define ECCCLRR sharpsl_io_base+0x10 /* cleare ECC */
38#define FLASHIO sharpsl_io_base+0x14 /* Flash I/O */
39#define FLASHCTL sharpsl_io_base+0x18 /* Flash Control */
40
41/* Flash control bit */
42#define FLRYBY (1 << 5)
43#define FLCE1 (1 << 4)
44#define FLWP (1 << 3)
45#define FLALE (1 << 2)
46#define FLCLE (1 << 1)
47#define FLCE0 (1 << 0)
48
Linus Torvalds1da177e2005-04-16 15:20:36 -070049/*
50 * MTD structure for SharpSL
51 */
52static struct mtd_info *sharpsl_mtd = NULL;
53
54/*
55 * Define partitions for flash device
56 */
57#define DEFAULT_NUM_PARTITIONS 3
58
59static int nr_partitions;
60static struct mtd_partition sharpsl_nand_default_partition_info[] = {
61 {
David Woodhousee0c7d762006-05-13 18:07:53 +010062 .name = "System Area",
63 .offset = 0,
64 .size = 7 * 1024 * 1024,
65 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 {
David Woodhousee0c7d762006-05-13 18:07:53 +010067 .name = "Root Filesystem",
68 .offset = 7 * 1024 * 1024,
69 .size = 30 * 1024 * 1024,
70 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 {
David Woodhousee0c7d762006-05-13 18:07:53 +010072 .name = "Home Filesystem",
73 .offset = MTDPART_OFS_APPEND,
74 .size = MTDPART_SIZ_FULL,
75 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070076};
77
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000078/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 * hardware specific access to control-lines
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020080 * ctrl:
Richard Purdie6a5a297c2006-07-15 13:05:24 +010081 * NAND_CNE: bit 0 -> ! bit 0 & 4
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020082 * NAND_CLE: bit 1 -> bit 1
83 * NAND_ALE: bit 2 -> bit 2
84 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070085 */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020086static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
87 unsigned int ctrl)
Linus Torvalds1da177e2005-04-16 15:20:36 -070088{
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020089 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020091 if (ctrl & NAND_CTRL_CHANGE) {
92 unsigned char bits = ctrl & 0x07;
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020094 bits |= (ctrl & 0x01) << 4;
Richard Purdie6a5a297c2006-07-15 13:05:24 +010095
96 bits ^= 0x11;
97
98 writeb((readb(FLASHCTL) & ~0x17) | bits, FLASHCTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200100
101 if (cmd != NAND_CMD_NONE)
102 writeb(cmd, chip->IO_ADDR_W);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103}
104
105static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
106
107static struct nand_bbt_descr sharpsl_bbt = {
108 .options = 0,
109 .offs = 4,
110 .len = 2,
111 .pattern = scan_ff_pattern
112};
113
Richard Purdie87c146d2005-11-03 11:36:45 +0000114static struct nand_bbt_descr sharpsl_akita_bbt = {
115 .options = 0,
116 .offs = 4,
117 .len = 1,
118 .pattern = scan_ff_pattern
119};
120
Thomas Gleixner5bd34c02006-05-27 22:16:10 +0200121static struct nand_ecclayout akita_oobinfo = {
Richard Purdie87c146d2005-11-03 11:36:45 +0000122 .eccbytes = 24,
123 .eccpos = {
David Woodhousee0c7d762006-05-13 18:07:53 +0100124 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
125 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
126 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
127 .oobfree = {{0x08, 0x09}}
Richard Purdie87c146d2005-11-03 11:36:45 +0000128};
129
David Woodhousee0c7d762006-05-13 18:07:53 +0100130static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131{
132 return !((readb(FLASHCTL) & FLRYBY) == 0);
133}
134
David Woodhousee0c7d762006-05-13 18:07:53 +0100135static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136{
David Woodhousee0c7d762006-05-13 18:07:53 +0100137 writeb(0, ECCCLRR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138}
139
David Woodhousee0c7d762006-05-13 18:07:53 +0100140static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141{
142 ecc_code[0] = ~readb(ECCLPUB);
143 ecc_code[1] = ~readb(ECCLPLB);
144 ecc_code[2] = (~readb(ECCCP) << 2) | 0x03;
145 return readb(ECCCNTR) != 0;
146}
147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148#ifdef CONFIG_MTD_PARTITIONS
149const char *part_probes[] = { "cmdlinepart", NULL };
150#endif
151
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152/*
153 * Main initialization routine
154 */
David Woodhousecead4db2006-05-16 13:54:50 +0100155static int __init sharpsl_nand_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156{
157 struct nand_chip *this;
David Woodhousee0c7d762006-05-13 18:07:53 +0100158 struct mtd_partition *sharpsl_partition_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 int err = 0;
160
161 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100162 sharpsl_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 if (!sharpsl_mtd) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100164 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 return -ENOMEM;
166 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000167
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 /* map physical adress */
169 sharpsl_io_base = ioremap(sharpsl_phys_base, 0x1000);
David Woodhousee0c7d762006-05-13 18:07:53 +0100170 if (!sharpsl_io_base) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 printk("ioremap to access Sharp SL NAND chip failed\n");
172 kfree(sharpsl_mtd);
173 return -EIO;
174 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000175
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100177 this = (struct nand_chip *)(&sharpsl_mtd[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
179 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100180 memset(sharpsl_mtd, 0, sizeof(struct mtd_info));
181 memset(this, 0, sizeof(struct nand_chip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182
183 /* Link the private data with the MTD structure */
184 sharpsl_mtd->priv = this;
David Woodhouse552d9202006-05-14 01:20:46 +0100185 sharpsl_mtd->owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186
187 /*
188 * PXA initialize
189 */
190 writeb(readb(FLASHCTL) | FLWP, FLASHCTL);
191
192 /* Set address of NAND IO lines */
193 this->IO_ADDR_R = FLASHIO;
194 this->IO_ADDR_W = FLASHIO;
195 /* Set address of hardware control function */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200196 this->cmd_ctrl = sharpsl_nand_hwcontrol;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 this->dev_ready = sharpsl_nand_dev_ready;
198 /* 15 us command delay time */
199 this->chip_delay = 15;
200 /* set eccmode using hardware ECC */
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200201 this->ecc.mode = NAND_ECC_HW;
202 this->ecc.size = 256;
203 this->ecc.bytes = 3;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000204 this->badblock_pattern = &sharpsl_bbt;
Richard Purdie87c146d2005-11-03 11:36:45 +0000205 if (machine_is_akita() || machine_is_borzoi()) {
206 this->badblock_pattern = &sharpsl_akita_bbt;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +0200207 this->ecc.layout = &akita_oobinfo;
Richard Purdie87c146d2005-11-03 11:36:45 +0000208 }
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200209 this->ecc.hwctl = sharpsl_nand_enable_hwecc;
210 this->ecc.calculate = sharpsl_nand_calculate_ecc;
211 this->ecc.correct = nand_correct_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
213 /* Scan to find existence of the device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100214 err = nand_scan(sharpsl_mtd, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 if (err) {
216 iounmap(sharpsl_io_base);
217 kfree(sharpsl_mtd);
218 return err;
219 }
220
221 /* Register the partitions */
222 sharpsl_mtd->name = "sharpsl-nand";
David Woodhousee0c7d762006-05-13 18:07:53 +0100223 nr_partitions = parse_mtd_partitions(sharpsl_mtd, part_probes, &sharpsl_partition_info, 0);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000224
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 if (nr_partitions <= 0) {
226 nr_partitions = DEFAULT_NUM_PARTITIONS;
227 sharpsl_partition_info = sharpsl_nand_default_partition_info;
228 if (machine_is_poodle()) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100229 sharpsl_partition_info[1].size = 22 * 1024 * 1024;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230 } else if (machine_is_corgi() || machine_is_shepherd()) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100231 sharpsl_partition_info[1].size = 25 * 1024 * 1024;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232 } else if (machine_is_husky()) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100233 sharpsl_partition_info[1].size = 53 * 1024 * 1024;
Richard Purdie62052d42005-09-16 19:27:31 -0700234 } else if (machine_is_spitz()) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100235 sharpsl_partition_info[1].size = 5 * 1024 * 1024;
Richard Purdie62052d42005-09-16 19:27:31 -0700236 } else if (machine_is_akita()) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100237 sharpsl_partition_info[1].size = 58 * 1024 * 1024;
Richard Purdie62052d42005-09-16 19:27:31 -0700238 } else if (machine_is_borzoi()) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100239 sharpsl_partition_info[1].size = 32 * 1024 * 1024;
Richard Purdie62052d42005-09-16 19:27:31 -0700240 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 }
242
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 add_mtd_partitions(sharpsl_mtd, sharpsl_partition_info, nr_partitions);
244
245 /* Return happy */
246 return 0;
247}
David Woodhousee0c7d762006-05-13 18:07:53 +0100248
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249module_init(sharpsl_nand_init);
250
251/*
252 * Clean up routine
253 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254static void __exit sharpsl_nand_cleanup(void)
255{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 /* Release resources, unregister device */
257 nand_release(sharpsl_mtd);
258
259 iounmap(sharpsl_io_base);
260
261 /* Free the MTD device structure */
262 kfree(sharpsl_mtd);
263}
David Woodhousee0c7d762006-05-13 18:07:53 +0100264
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265module_exit(sharpsl_nand_cleanup);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
267MODULE_LICENSE("GPL");
268MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
269MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");