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Nicolas Ferre13455622010-10-14 17:19:11 +02001/*
2 * reset AT91SAM9G20 as per errata
3 *
4 * (C) BitBox Ltd 2010
5 *
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#include <linux/linkage.h>
Nicolas Ferre13455622010-10-14 17:19:11 +020017#include <mach/hardware.h>
Jean-Christophe PLAGNIOL-VILLARDf363c402012-02-13 12:58:53 +080018#include <mach/at91_ramc.h>
Jean-Christophe PLAGNIOL-VILLARDf0995d02012-10-30 08:11:24 +080019#include "at91_rstc.h"
Nicolas Ferre13455622010-10-14 17:19:11 +020020
21 .arm
22
Russell King1b2073e2011-11-03 09:53:29 +000023 .globl at91sam9_alt_restart
Nicolas Ferre13455622010-10-14 17:19:11 +020024
Jean-Christophe PLAGNIOL-VILLARDf363c402012-02-13 12:58:53 +080025at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
26 ldr r0, [r0]
27 ldr r4, =at91_rstc_base
28 ldr r1, [r4]
Nicolas Ferre13455622010-10-14 17:19:11 +020029
30 mov r2, #1
31 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
32 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
33
34 .balign 32 @ align to cache line
35
36 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
37 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
Jean-Christophe PLAGNIOL-VILLARDe9f68b52011-11-18 01:25:52 +080038 str r4, [r1, #AT91_RSTC_CR] @ reset processor
Nicolas Ferre13455622010-10-14 17:19:11 +020039
40 b .