Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /*************************************************************************** |
| 2 | * au88x0_sb.h |
| 3 | * |
| 4 | * Wed Oct 29 22:10:42 2003 |
| 5 | * |
| 6 | ****************************************************************************/ |
| 7 | |
| 8 | #ifdef CHIP_AU8820 |
| 9 | /* AU8820 starting @ 64KiB offset */ |
| 10 | #define SBEMU_BASE 0x10000 |
| 11 | #else |
| 12 | /* AU8810? and AU8830 starting @ 164KiB offset */ |
| 13 | #define SBEMU_BASE 0x29000 |
| 14 | #endif |
| 15 | |
| 16 | #define FM_A_STATUS (SBEMU_BASE + 0x00) /* read */ |
| 17 | #define FM_A_ADDRESS (SBEMU_BASE + 0x00) /* write */ |
| 18 | #define FM_A_DATA (SBEMU_BASE + 0x04) |
| 19 | #define FM_B_STATUS (SBEMU_BASE + 0x08) |
| 20 | #define FM_B_ADDRESS (SBEMU_BASE + 0x08) |
| 21 | #define FM_B_DATA (SBEMU_BASE + 0x0C) |
| 22 | #define SB_MIXER_ADDR (SBEMU_BASE + 0x10) |
| 23 | #define SB_MIXER_DATA (SBEMU_BASE + 0x14) |
| 24 | #define SB_RESET (SBEMU_BASE + 0x18) |
| 25 | #define SB_RESET_ALIAS (SBEMU_BASE + 0x1C) |
| 26 | #define FM_STATUS2 (SBEMU_BASE + 0x20) |
| 27 | #define FM_ADDR2 (SBEMU_BASE + 0x20) |
| 28 | #define FM_DATA2 (SBEMU_BASE + 0x24) |
| 29 | #define SB_DSP_READ (SBEMU_BASE + 0x28) |
| 30 | #define SB_DSP_WRITE (SBEMU_BASE + 0x30) |
| 31 | #define SB_DSP_WRITE_STATUS (SBEMU_BASE + 0x30) /* bit 7 */ |
| 32 | #define SB_DSP_READ_STATUS (SBEMU_BASE + 0x38) /* bit 7 */ |
| 33 | #define SB_LACR (SBEMU_BASE + 0x40) /* ? */ |
| 34 | #define SB_LADCR (SBEMU_BASE + 0x44) /* ? */ |
| 35 | #define SB_LAMR (SBEMU_BASE + 0x48) /* ? */ |
| 36 | #define SB_LARR (SBEMU_BASE + 0x4C) /* ? */ |
| 37 | #define SB_VERSION (SBEMU_BASE + 0x50) |
| 38 | #define SB_CTRLSTAT (SBEMU_BASE + 0x54) |
| 39 | #define SB_TIMERSTAT (SBEMU_BASE + 0x58) |
| 40 | #define FM_RAM (SBEMU_BASE + 0x100) /* 0x40 ULONG */ |