Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet |
| 3 | * driver for Linux. |
| 4 | * |
| 5 | * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved. |
| 6 | * |
| 7 | * This software is available to you under a choice of one of two |
| 8 | * licenses. You may choose to be licensed under the terms of the GNU |
| 9 | * General Public License (GPL) Version 2, available from the file |
| 10 | * COPYING in the main directory of this source tree, or the |
| 11 | * OpenIB.org BSD license below: |
| 12 | * |
| 13 | * Redistribution and use in source and binary forms, with or |
| 14 | * without modification, are permitted provided that the following |
| 15 | * conditions are met: |
| 16 | * |
| 17 | * - Redistributions of source code must retain the above |
| 18 | * copyright notice, this list of conditions and the following |
| 19 | * disclaimer. |
| 20 | * |
| 21 | * - Redistributions in binary form must reproduce the above |
| 22 | * copyright notice, this list of conditions and the following |
| 23 | * disclaimer in the documentation and/or other materials |
| 24 | * provided with the distribution. |
| 25 | * |
| 26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 27 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 28 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 29 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 30 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 31 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 32 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 33 | * SOFTWARE. |
| 34 | */ |
| 35 | |
| 36 | #include <linux/skbuff.h> |
| 37 | #include <linux/netdevice.h> |
| 38 | #include <linux/etherdevice.h> |
| 39 | #include <linux/if_vlan.h> |
| 40 | #include <linux/ip.h> |
| 41 | #include <net/ipv6.h> |
| 42 | #include <net/tcp.h> |
| 43 | #include <linux/dma-mapping.h> |
Paul Gortmaker | 70c7160 | 2011-05-22 16:47:17 -0400 | [diff] [blame] | 44 | #include <linux/prefetch.h> |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 45 | |
| 46 | #include "t4vf_common.h" |
| 47 | #include "t4vf_defs.h" |
| 48 | |
| 49 | #include "../cxgb4/t4_regs.h" |
| 50 | #include "../cxgb4/t4fw_api.h" |
| 51 | #include "../cxgb4/t4_msg.h" |
| 52 | |
| 53 | /* |
| 54 | * Decoded Adapter Parameters. |
| 55 | */ |
| 56 | static u32 FL_PG_ORDER; /* large page allocation size */ |
| 57 | static u32 STAT_LEN; /* length of status page at ring end */ |
| 58 | static u32 PKTSHIFT; /* padding between CPL and packet data */ |
| 59 | static u32 FL_ALIGN; /* response queue message alignment */ |
| 60 | |
| 61 | /* |
| 62 | * Constants ... |
| 63 | */ |
| 64 | enum { |
| 65 | /* |
| 66 | * Egress Queue sizes, producer and consumer indices are all in units |
| 67 | * of Egress Context Units bytes. Note that as far as the hardware is |
| 68 | * concerned, the free list is an Egress Queue (the host produces free |
| 69 | * buffers which the hardware consumes) and free list entries are |
| 70 | * 64-bit PCI DMA addresses. |
| 71 | */ |
| 72 | EQ_UNIT = SGE_EQ_IDXSIZE, |
| 73 | FL_PER_EQ_UNIT = EQ_UNIT / sizeof(__be64), |
| 74 | TXD_PER_EQ_UNIT = EQ_UNIT / sizeof(__be64), |
| 75 | |
| 76 | /* |
| 77 | * Max number of TX descriptors we clean up at a time. Should be |
| 78 | * modest as freeing skbs isn't cheap and it happens while holding |
| 79 | * locks. We just need to free packets faster than they arrive, we |
| 80 | * eventually catch up and keep the amortized cost reasonable. |
| 81 | */ |
| 82 | MAX_TX_RECLAIM = 16, |
| 83 | |
| 84 | /* |
| 85 | * Max number of Rx buffers we replenish at a time. Again keep this |
| 86 | * modest, allocating buffers isn't cheap either. |
| 87 | */ |
| 88 | MAX_RX_REFILL = 16, |
| 89 | |
| 90 | /* |
| 91 | * Period of the Rx queue check timer. This timer is infrequent as it |
| 92 | * has something to do only when the system experiences severe memory |
| 93 | * shortage. |
| 94 | */ |
| 95 | RX_QCHECK_PERIOD = (HZ / 2), |
| 96 | |
| 97 | /* |
| 98 | * Period of the TX queue check timer and the maximum number of TX |
| 99 | * descriptors to be reclaimed by the TX timer. |
| 100 | */ |
| 101 | TX_QCHECK_PERIOD = (HZ / 2), |
| 102 | MAX_TIMER_TX_RECLAIM = 100, |
| 103 | |
| 104 | /* |
| 105 | * An FL with <= FL_STARVE_THRES buffers is starving and a periodic |
| 106 | * timer will attempt to refill it. |
| 107 | */ |
| 108 | FL_STARVE_THRES = 4, |
| 109 | |
| 110 | /* |
| 111 | * Suspend an Ethernet TX queue with fewer available descriptors than |
| 112 | * this. We always want to have room for a maximum sized packet: |
| 113 | * inline immediate data + MAX_SKB_FRAGS. This is the same as |
| 114 | * calc_tx_flits() for a TSO packet with nr_frags == MAX_SKB_FRAGS |
| 115 | * (see that function and its helpers for a description of the |
| 116 | * calculation). |
| 117 | */ |
| 118 | ETHTXQ_MAX_FRAGS = MAX_SKB_FRAGS + 1, |
| 119 | ETHTXQ_MAX_SGL_LEN = ((3 * (ETHTXQ_MAX_FRAGS-1))/2 + |
| 120 | ((ETHTXQ_MAX_FRAGS-1) & 1) + |
| 121 | 2), |
| 122 | ETHTXQ_MAX_HDR = (sizeof(struct fw_eth_tx_pkt_vm_wr) + |
| 123 | sizeof(struct cpl_tx_pkt_lso_core) + |
| 124 | sizeof(struct cpl_tx_pkt_core)) / sizeof(__be64), |
| 125 | ETHTXQ_MAX_FLITS = ETHTXQ_MAX_SGL_LEN + ETHTXQ_MAX_HDR, |
| 126 | |
| 127 | ETHTXQ_STOP_THRES = 1 + DIV_ROUND_UP(ETHTXQ_MAX_FLITS, TXD_PER_EQ_UNIT), |
| 128 | |
| 129 | /* |
| 130 | * Max TX descriptor space we allow for an Ethernet packet to be |
| 131 | * inlined into a WR. This is limited by the maximum value which |
| 132 | * we can specify for immediate data in the firmware Ethernet TX |
| 133 | * Work Request. |
| 134 | */ |
| 135 | MAX_IMM_TX_PKT_LEN = FW_WR_IMMDLEN_MASK, |
| 136 | |
| 137 | /* |
| 138 | * Max size of a WR sent through a control TX queue. |
| 139 | */ |
| 140 | MAX_CTRL_WR_LEN = 256, |
| 141 | |
| 142 | /* |
| 143 | * Maximum amount of data which we'll ever need to inline into a |
| 144 | * TX ring: max(MAX_IMM_TX_PKT_LEN, MAX_CTRL_WR_LEN). |
| 145 | */ |
| 146 | MAX_IMM_TX_LEN = (MAX_IMM_TX_PKT_LEN > MAX_CTRL_WR_LEN |
| 147 | ? MAX_IMM_TX_PKT_LEN |
| 148 | : MAX_CTRL_WR_LEN), |
| 149 | |
| 150 | /* |
| 151 | * For incoming packets less than RX_COPY_THRES, we copy the data into |
| 152 | * an skb rather than referencing the data. We allocate enough |
| 153 | * in-line room in skb's to accommodate pulling in RX_PULL_LEN bytes |
| 154 | * of the data (header). |
| 155 | */ |
| 156 | RX_COPY_THRES = 256, |
| 157 | RX_PULL_LEN = 128, |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 158 | |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 159 | /* |
| 160 | * Main body length for sk_buffs used for RX Ethernet packets with |
| 161 | * fragments. Should be >= RX_PULL_LEN but possibly bigger to give |
| 162 | * pskb_may_pull() some room. |
| 163 | */ |
| 164 | RX_SKB_LEN = 512, |
| 165 | }; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 166 | |
| 167 | /* |
| 168 | * Software state per TX descriptor. |
| 169 | */ |
| 170 | struct tx_sw_desc { |
| 171 | struct sk_buff *skb; /* socket buffer of TX data source */ |
| 172 | struct ulptx_sgl *sgl; /* scatter/gather list in TX Queue */ |
| 173 | }; |
| 174 | |
| 175 | /* |
| 176 | * Software state per RX Free List descriptor. We keep track of the allocated |
| 177 | * FL page, its size, and its PCI DMA address (if the page is mapped). The FL |
| 178 | * page size and its PCI DMA mapped state are stored in the low bits of the |
| 179 | * PCI DMA address as per below. |
| 180 | */ |
| 181 | struct rx_sw_desc { |
| 182 | struct page *page; /* Free List page buffer */ |
| 183 | dma_addr_t dma_addr; /* PCI DMA address (if mapped) */ |
| 184 | /* and flags (see below) */ |
| 185 | }; |
| 186 | |
| 187 | /* |
| 188 | * The low bits of rx_sw_desc.dma_addr have special meaning. Note that the |
| 189 | * SGE also uses the low 4 bits to determine the size of the buffer. It uses |
| 190 | * those bits to index into the SGE_FL_BUFFER_SIZE[index] register array. |
| 191 | * Since we only use SGE_FL_BUFFER_SIZE0 and SGE_FL_BUFFER_SIZE1, these low 4 |
| 192 | * bits can only contain a 0 or a 1 to indicate which size buffer we're giving |
| 193 | * to the SGE. Thus, our software state of "is the buffer mapped for DMA" is |
| 194 | * maintained in an inverse sense so the hardware never sees that bit high. |
| 195 | */ |
| 196 | enum { |
| 197 | RX_LARGE_BUF = 1 << 0, /* buffer is SGE_FL_BUFFER_SIZE[1] */ |
| 198 | RX_UNMAPPED_BUF = 1 << 1, /* buffer is not mapped */ |
| 199 | }; |
| 200 | |
| 201 | /** |
| 202 | * get_buf_addr - return DMA buffer address of software descriptor |
| 203 | * @sdesc: pointer to the software buffer descriptor |
| 204 | * |
| 205 | * Return the DMA buffer address of a software descriptor (stripping out |
| 206 | * our low-order flag bits). |
| 207 | */ |
| 208 | static inline dma_addr_t get_buf_addr(const struct rx_sw_desc *sdesc) |
| 209 | { |
| 210 | return sdesc->dma_addr & ~(dma_addr_t)(RX_LARGE_BUF | RX_UNMAPPED_BUF); |
| 211 | } |
| 212 | |
| 213 | /** |
| 214 | * is_buf_mapped - is buffer mapped for DMA? |
| 215 | * @sdesc: pointer to the software buffer descriptor |
| 216 | * |
| 217 | * Determine whether the buffer associated with a software descriptor in |
| 218 | * mapped for DMA or not. |
| 219 | */ |
| 220 | static inline bool is_buf_mapped(const struct rx_sw_desc *sdesc) |
| 221 | { |
| 222 | return !(sdesc->dma_addr & RX_UNMAPPED_BUF); |
| 223 | } |
| 224 | |
| 225 | /** |
| 226 | * need_skb_unmap - does the platform need unmapping of sk_buffs? |
| 227 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 228 | * Returns true if the platform needs sk_buff unmapping. The compiler |
| 229 | * optimizes away unnecessary code if this returns true. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 230 | */ |
| 231 | static inline int need_skb_unmap(void) |
| 232 | { |
FUJITA Tomonori | 57b2eaf | 2010-07-07 23:52:37 +0000 | [diff] [blame] | 233 | #ifdef CONFIG_NEED_DMA_MAP_STATE |
| 234 | return 1; |
| 235 | #else |
| 236 | return 0; |
| 237 | #endif |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 238 | } |
| 239 | |
| 240 | /** |
| 241 | * txq_avail - return the number of available slots in a TX queue |
| 242 | * @tq: the TX queue |
| 243 | * |
| 244 | * Returns the number of available descriptors in a TX queue. |
| 245 | */ |
| 246 | static inline unsigned int txq_avail(const struct sge_txq *tq) |
| 247 | { |
| 248 | return tq->size - 1 - tq->in_use; |
| 249 | } |
| 250 | |
| 251 | /** |
| 252 | * fl_cap - return the capacity of a Free List |
| 253 | * @fl: the Free List |
| 254 | * |
| 255 | * Returns the capacity of a Free List. The capacity is less than the |
| 256 | * size because an Egress Queue Index Unit worth of descriptors needs to |
| 257 | * be left unpopulated, otherwise the Producer and Consumer indices PIDX |
| 258 | * and CIDX will match and the hardware will think the FL is empty. |
| 259 | */ |
| 260 | static inline unsigned int fl_cap(const struct sge_fl *fl) |
| 261 | { |
| 262 | return fl->size - FL_PER_EQ_UNIT; |
| 263 | } |
| 264 | |
| 265 | /** |
| 266 | * fl_starving - return whether a Free List is starving. |
| 267 | * @fl: the Free List |
| 268 | * |
| 269 | * Tests specified Free List to see whether the number of buffers |
| 270 | * available to the hardware has falled below our "starvation" |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 271 | * threshold. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 272 | */ |
| 273 | static inline bool fl_starving(const struct sge_fl *fl) |
| 274 | { |
| 275 | return fl->avail - fl->pend_cred <= FL_STARVE_THRES; |
| 276 | } |
| 277 | |
| 278 | /** |
| 279 | * map_skb - map an skb for DMA to the device |
| 280 | * @dev: the egress net device |
| 281 | * @skb: the packet to map |
| 282 | * @addr: a pointer to the base of the DMA mapping array |
| 283 | * |
| 284 | * Map an skb for DMA to the device and return an array of DMA addresses. |
| 285 | */ |
| 286 | static int map_skb(struct device *dev, const struct sk_buff *skb, |
| 287 | dma_addr_t *addr) |
| 288 | { |
| 289 | const skb_frag_t *fp, *end; |
| 290 | const struct skb_shared_info *si; |
| 291 | |
| 292 | *addr = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); |
| 293 | if (dma_mapping_error(dev, *addr)) |
| 294 | goto out_err; |
| 295 | |
| 296 | si = skb_shinfo(skb); |
| 297 | end = &si->frags[si->nr_frags]; |
| 298 | for (fp = si->frags; fp < end; fp++) { |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 299 | *++addr = skb_frag_dma_map(dev, fp, 0, skb_frag_size(fp), |
| 300 | DMA_TO_DEVICE); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 301 | if (dma_mapping_error(dev, *addr)) |
| 302 | goto unwind; |
| 303 | } |
| 304 | return 0; |
| 305 | |
| 306 | unwind: |
| 307 | while (fp-- > si->frags) |
Eric Dumazet | 9e903e0 | 2011-10-18 21:00:24 +0000 | [diff] [blame] | 308 | dma_unmap_page(dev, *--addr, skb_frag_size(fp), DMA_TO_DEVICE); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 309 | dma_unmap_single(dev, addr[-1], skb_headlen(skb), DMA_TO_DEVICE); |
| 310 | |
| 311 | out_err: |
| 312 | return -ENOMEM; |
| 313 | } |
| 314 | |
| 315 | static void unmap_sgl(struct device *dev, const struct sk_buff *skb, |
| 316 | const struct ulptx_sgl *sgl, const struct sge_txq *tq) |
| 317 | { |
| 318 | const struct ulptx_sge_pair *p; |
| 319 | unsigned int nfrags = skb_shinfo(skb)->nr_frags; |
| 320 | |
| 321 | if (likely(skb_headlen(skb))) |
| 322 | dma_unmap_single(dev, be64_to_cpu(sgl->addr0), |
| 323 | be32_to_cpu(sgl->len0), DMA_TO_DEVICE); |
| 324 | else { |
| 325 | dma_unmap_page(dev, be64_to_cpu(sgl->addr0), |
| 326 | be32_to_cpu(sgl->len0), DMA_TO_DEVICE); |
| 327 | nfrags--; |
| 328 | } |
| 329 | |
| 330 | /* |
| 331 | * the complexity below is because of the possibility of a wrap-around |
| 332 | * in the middle of an SGL |
| 333 | */ |
| 334 | for (p = sgl->sge; nfrags >= 2; nfrags -= 2) { |
| 335 | if (likely((u8 *)(p + 1) <= (u8 *)tq->stat)) { |
| 336 | unmap: |
| 337 | dma_unmap_page(dev, be64_to_cpu(p->addr[0]), |
| 338 | be32_to_cpu(p->len[0]), DMA_TO_DEVICE); |
| 339 | dma_unmap_page(dev, be64_to_cpu(p->addr[1]), |
| 340 | be32_to_cpu(p->len[1]), DMA_TO_DEVICE); |
| 341 | p++; |
| 342 | } else if ((u8 *)p == (u8 *)tq->stat) { |
| 343 | p = (const struct ulptx_sge_pair *)tq->desc; |
| 344 | goto unmap; |
| 345 | } else if ((u8 *)p + 8 == (u8 *)tq->stat) { |
| 346 | const __be64 *addr = (const __be64 *)tq->desc; |
| 347 | |
| 348 | dma_unmap_page(dev, be64_to_cpu(addr[0]), |
| 349 | be32_to_cpu(p->len[0]), DMA_TO_DEVICE); |
| 350 | dma_unmap_page(dev, be64_to_cpu(addr[1]), |
| 351 | be32_to_cpu(p->len[1]), DMA_TO_DEVICE); |
| 352 | p = (const struct ulptx_sge_pair *)&addr[2]; |
| 353 | } else { |
| 354 | const __be64 *addr = (const __be64 *)tq->desc; |
| 355 | |
| 356 | dma_unmap_page(dev, be64_to_cpu(p->addr[0]), |
| 357 | be32_to_cpu(p->len[0]), DMA_TO_DEVICE); |
| 358 | dma_unmap_page(dev, be64_to_cpu(addr[0]), |
| 359 | be32_to_cpu(p->len[1]), DMA_TO_DEVICE); |
| 360 | p = (const struct ulptx_sge_pair *)&addr[1]; |
| 361 | } |
| 362 | } |
| 363 | if (nfrags) { |
| 364 | __be64 addr; |
| 365 | |
| 366 | if ((u8 *)p == (u8 *)tq->stat) |
| 367 | p = (const struct ulptx_sge_pair *)tq->desc; |
| 368 | addr = ((u8 *)p + 16 <= (u8 *)tq->stat |
| 369 | ? p->addr[0] |
| 370 | : *(const __be64 *)tq->desc); |
| 371 | dma_unmap_page(dev, be64_to_cpu(addr), be32_to_cpu(p->len[0]), |
| 372 | DMA_TO_DEVICE); |
| 373 | } |
| 374 | } |
| 375 | |
| 376 | /** |
| 377 | * free_tx_desc - reclaims TX descriptors and their buffers |
| 378 | * @adapter: the adapter |
| 379 | * @tq: the TX queue to reclaim descriptors from |
| 380 | * @n: the number of descriptors to reclaim |
| 381 | * @unmap: whether the buffers should be unmapped for DMA |
| 382 | * |
| 383 | * Reclaims TX descriptors from an SGE TX queue and frees the associated |
| 384 | * TX buffers. Called with the TX queue lock held. |
| 385 | */ |
| 386 | static void free_tx_desc(struct adapter *adapter, struct sge_txq *tq, |
| 387 | unsigned int n, bool unmap) |
| 388 | { |
| 389 | struct tx_sw_desc *sdesc; |
| 390 | unsigned int cidx = tq->cidx; |
| 391 | struct device *dev = adapter->pdev_dev; |
| 392 | |
| 393 | const int need_unmap = need_skb_unmap() && unmap; |
| 394 | |
| 395 | sdesc = &tq->sdesc[cidx]; |
| 396 | while (n--) { |
| 397 | /* |
| 398 | * If we kept a reference to the original TX skb, we need to |
| 399 | * unmap it from PCI DMA space (if required) and free it. |
| 400 | */ |
| 401 | if (sdesc->skb) { |
| 402 | if (need_unmap) |
| 403 | unmap_sgl(dev, sdesc->skb, sdesc->sgl, tq); |
| 404 | kfree_skb(sdesc->skb); |
| 405 | sdesc->skb = NULL; |
| 406 | } |
| 407 | |
| 408 | sdesc++; |
| 409 | if (++cidx == tq->size) { |
| 410 | cidx = 0; |
| 411 | sdesc = tq->sdesc; |
| 412 | } |
| 413 | } |
| 414 | tq->cidx = cidx; |
| 415 | } |
| 416 | |
| 417 | /* |
| 418 | * Return the number of reclaimable descriptors in a TX queue. |
| 419 | */ |
| 420 | static inline int reclaimable(const struct sge_txq *tq) |
| 421 | { |
| 422 | int hw_cidx = be16_to_cpu(tq->stat->cidx); |
| 423 | int reclaimable = hw_cidx - tq->cidx; |
| 424 | if (reclaimable < 0) |
| 425 | reclaimable += tq->size; |
| 426 | return reclaimable; |
| 427 | } |
| 428 | |
| 429 | /** |
| 430 | * reclaim_completed_tx - reclaims completed TX descriptors |
| 431 | * @adapter: the adapter |
| 432 | * @tq: the TX queue to reclaim completed descriptors from |
| 433 | * @unmap: whether the buffers should be unmapped for DMA |
| 434 | * |
| 435 | * Reclaims TX descriptors that the SGE has indicated it has processed, |
| 436 | * and frees the associated buffers if possible. Called with the TX |
| 437 | * queue locked. |
| 438 | */ |
| 439 | static inline void reclaim_completed_tx(struct adapter *adapter, |
| 440 | struct sge_txq *tq, |
| 441 | bool unmap) |
| 442 | { |
| 443 | int avail = reclaimable(tq); |
| 444 | |
| 445 | if (avail) { |
| 446 | /* |
| 447 | * Limit the amount of clean up work we do at a time to keep |
| 448 | * the TX lock hold time O(1). |
| 449 | */ |
| 450 | if (avail > MAX_TX_RECLAIM) |
| 451 | avail = MAX_TX_RECLAIM; |
| 452 | |
| 453 | free_tx_desc(adapter, tq, avail, unmap); |
| 454 | tq->in_use -= avail; |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | /** |
| 459 | * get_buf_size - return the size of an RX Free List buffer. |
| 460 | * @sdesc: pointer to the software buffer descriptor |
| 461 | */ |
| 462 | static inline int get_buf_size(const struct rx_sw_desc *sdesc) |
| 463 | { |
| 464 | return FL_PG_ORDER > 0 && (sdesc->dma_addr & RX_LARGE_BUF) |
| 465 | ? (PAGE_SIZE << FL_PG_ORDER) |
| 466 | : PAGE_SIZE; |
| 467 | } |
| 468 | |
| 469 | /** |
| 470 | * free_rx_bufs - free RX buffers on an SGE Free List |
| 471 | * @adapter: the adapter |
| 472 | * @fl: the SGE Free List to free buffers from |
| 473 | * @n: how many buffers to free |
| 474 | * |
| 475 | * Release the next @n buffers on an SGE Free List RX queue. The |
| 476 | * buffers must be made inaccessible to hardware before calling this |
| 477 | * function. |
| 478 | */ |
| 479 | static void free_rx_bufs(struct adapter *adapter, struct sge_fl *fl, int n) |
| 480 | { |
| 481 | while (n--) { |
| 482 | struct rx_sw_desc *sdesc = &fl->sdesc[fl->cidx]; |
| 483 | |
| 484 | if (is_buf_mapped(sdesc)) |
| 485 | dma_unmap_page(adapter->pdev_dev, get_buf_addr(sdesc), |
| 486 | get_buf_size(sdesc), PCI_DMA_FROMDEVICE); |
| 487 | put_page(sdesc->page); |
| 488 | sdesc->page = NULL; |
| 489 | if (++fl->cidx == fl->size) |
| 490 | fl->cidx = 0; |
| 491 | fl->avail--; |
| 492 | } |
| 493 | } |
| 494 | |
| 495 | /** |
| 496 | * unmap_rx_buf - unmap the current RX buffer on an SGE Free List |
| 497 | * @adapter: the adapter |
| 498 | * @fl: the SGE Free List |
| 499 | * |
| 500 | * Unmap the current buffer on an SGE Free List RX queue. The |
| 501 | * buffer must be made inaccessible to HW before calling this function. |
| 502 | * |
| 503 | * This is similar to @free_rx_bufs above but does not free the buffer. |
| 504 | * Do note that the FL still loses any further access to the buffer. |
| 505 | * This is used predominantly to "transfer ownership" of an FL buffer |
| 506 | * to another entity (typically an skb's fragment list). |
| 507 | */ |
| 508 | static void unmap_rx_buf(struct adapter *adapter, struct sge_fl *fl) |
| 509 | { |
| 510 | struct rx_sw_desc *sdesc = &fl->sdesc[fl->cidx]; |
| 511 | |
| 512 | if (is_buf_mapped(sdesc)) |
| 513 | dma_unmap_page(adapter->pdev_dev, get_buf_addr(sdesc), |
| 514 | get_buf_size(sdesc), PCI_DMA_FROMDEVICE); |
| 515 | sdesc->page = NULL; |
| 516 | if (++fl->cidx == fl->size) |
| 517 | fl->cidx = 0; |
| 518 | fl->avail--; |
| 519 | } |
| 520 | |
| 521 | /** |
| 522 | * ring_fl_db - righ doorbell on free list |
| 523 | * @adapter: the adapter |
| 524 | * @fl: the Free List whose doorbell should be rung ... |
| 525 | * |
| 526 | * Tell the Scatter Gather Engine that there are new free list entries |
| 527 | * available. |
| 528 | */ |
| 529 | static inline void ring_fl_db(struct adapter *adapter, struct sge_fl *fl) |
| 530 | { |
| 531 | /* |
| 532 | * The SGE keeps track of its Producer and Consumer Indices in terms |
| 533 | * of Egress Queue Units so we can only tell it about integral numbers |
| 534 | * of multiples of Free List Entries per Egress Queue Units ... |
| 535 | */ |
| 536 | if (fl->pend_cred >= FL_PER_EQ_UNIT) { |
| 537 | wmb(); |
| 538 | t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_KDOORBELL, |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 539 | DBPRIO(1) | |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 540 | QID(fl->cntxt_id) | |
| 541 | PIDX(fl->pend_cred / FL_PER_EQ_UNIT)); |
| 542 | fl->pend_cred %= FL_PER_EQ_UNIT; |
| 543 | } |
| 544 | } |
| 545 | |
| 546 | /** |
| 547 | * set_rx_sw_desc - initialize software RX buffer descriptor |
| 548 | * @sdesc: pointer to the softwore RX buffer descriptor |
| 549 | * @page: pointer to the page data structure backing the RX buffer |
| 550 | * @dma_addr: PCI DMA address (possibly with low-bit flags) |
| 551 | */ |
| 552 | static inline void set_rx_sw_desc(struct rx_sw_desc *sdesc, struct page *page, |
| 553 | dma_addr_t dma_addr) |
| 554 | { |
| 555 | sdesc->page = page; |
| 556 | sdesc->dma_addr = dma_addr; |
| 557 | } |
| 558 | |
| 559 | /* |
| 560 | * Support for poisoning RX buffers ... |
| 561 | */ |
| 562 | #define POISON_BUF_VAL -1 |
| 563 | |
| 564 | static inline void poison_buf(struct page *page, size_t sz) |
| 565 | { |
| 566 | #if POISON_BUF_VAL >= 0 |
| 567 | memset(page_address(page), POISON_BUF_VAL, sz); |
| 568 | #endif |
| 569 | } |
| 570 | |
| 571 | /** |
| 572 | * refill_fl - refill an SGE RX buffer ring |
| 573 | * @adapter: the adapter |
| 574 | * @fl: the Free List ring to refill |
| 575 | * @n: the number of new buffers to allocate |
| 576 | * @gfp: the gfp flags for the allocations |
| 577 | * |
| 578 | * (Re)populate an SGE free-buffer queue with up to @n new packet buffers, |
| 579 | * allocated with the supplied gfp flags. The caller must assure that |
| 580 | * @n does not exceed the queue's capacity -- i.e. (cidx == pidx) _IN |
| 581 | * EGRESS QUEUE UNITS_ indicates an empty Free List! Returns the number |
| 582 | * of buffers allocated. If afterwards the queue is found critically low, |
| 583 | * mark it as starving in the bitmap of starving FLs. |
| 584 | */ |
| 585 | static unsigned int refill_fl(struct adapter *adapter, struct sge_fl *fl, |
| 586 | int n, gfp_t gfp) |
| 587 | { |
| 588 | struct page *page; |
| 589 | dma_addr_t dma_addr; |
| 590 | unsigned int cred = fl->avail; |
| 591 | __be64 *d = &fl->desc[fl->pidx]; |
| 592 | struct rx_sw_desc *sdesc = &fl->sdesc[fl->pidx]; |
| 593 | |
| 594 | /* |
| 595 | * Sanity: ensure that the result of adding n Free List buffers |
| 596 | * won't result in wrapping the SGE's Producer Index around to |
| 597 | * it's Consumer Index thereby indicating an empty Free List ... |
| 598 | */ |
| 599 | BUG_ON(fl->avail + n > fl->size - FL_PER_EQ_UNIT); |
| 600 | |
| 601 | /* |
| 602 | * If we support large pages, prefer large buffers and fail over to |
| 603 | * small pages if we can't allocate large pages to satisfy the refill. |
| 604 | * If we don't support large pages, drop directly into the small page |
| 605 | * allocation code. |
| 606 | */ |
| 607 | if (FL_PG_ORDER == 0) |
| 608 | goto alloc_small_pages; |
| 609 | |
| 610 | while (n) { |
| 611 | page = alloc_pages(gfp | __GFP_COMP | __GFP_NOWARN, |
| 612 | FL_PG_ORDER); |
| 613 | if (unlikely(!page)) { |
| 614 | /* |
| 615 | * We've failed inour attempt to allocate a "large |
| 616 | * page". Fail over to the "small page" allocation |
| 617 | * below. |
| 618 | */ |
| 619 | fl->large_alloc_failed++; |
| 620 | break; |
| 621 | } |
| 622 | poison_buf(page, PAGE_SIZE << FL_PG_ORDER); |
| 623 | |
| 624 | dma_addr = dma_map_page(adapter->pdev_dev, page, 0, |
| 625 | PAGE_SIZE << FL_PG_ORDER, |
| 626 | PCI_DMA_FROMDEVICE); |
| 627 | if (unlikely(dma_mapping_error(adapter->pdev_dev, dma_addr))) { |
| 628 | /* |
| 629 | * We've run out of DMA mapping space. Free up the |
| 630 | * buffer and return with what we've managed to put |
| 631 | * into the free list. We don't want to fail over to |
| 632 | * the small page allocation below in this case |
| 633 | * because DMA mapping resources are typically |
| 634 | * critical resources once they become scarse. |
| 635 | */ |
| 636 | __free_pages(page, FL_PG_ORDER); |
| 637 | goto out; |
| 638 | } |
| 639 | dma_addr |= RX_LARGE_BUF; |
| 640 | *d++ = cpu_to_be64(dma_addr); |
| 641 | |
| 642 | set_rx_sw_desc(sdesc, page, dma_addr); |
| 643 | sdesc++; |
| 644 | |
| 645 | fl->avail++; |
| 646 | if (++fl->pidx == fl->size) { |
| 647 | fl->pidx = 0; |
| 648 | sdesc = fl->sdesc; |
| 649 | d = fl->desc; |
| 650 | } |
| 651 | n--; |
| 652 | } |
| 653 | |
| 654 | alloc_small_pages: |
| 655 | while (n--) { |
Mel Gorman | 0614002 | 2012-07-31 16:44:24 -0700 | [diff] [blame] | 656 | page = __skb_alloc_page(gfp | __GFP_NOWARN, NULL); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 657 | if (unlikely(!page)) { |
| 658 | fl->alloc_failed++; |
| 659 | break; |
| 660 | } |
| 661 | poison_buf(page, PAGE_SIZE); |
| 662 | |
| 663 | dma_addr = dma_map_page(adapter->pdev_dev, page, 0, PAGE_SIZE, |
| 664 | PCI_DMA_FROMDEVICE); |
| 665 | if (unlikely(dma_mapping_error(adapter->pdev_dev, dma_addr))) { |
Eric Dumazet | 1f2149c | 2011-11-22 10:57:41 +0000 | [diff] [blame] | 666 | put_page(page); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 667 | break; |
| 668 | } |
| 669 | *d++ = cpu_to_be64(dma_addr); |
| 670 | |
| 671 | set_rx_sw_desc(sdesc, page, dma_addr); |
| 672 | sdesc++; |
| 673 | |
| 674 | fl->avail++; |
| 675 | if (++fl->pidx == fl->size) { |
| 676 | fl->pidx = 0; |
| 677 | sdesc = fl->sdesc; |
| 678 | d = fl->desc; |
| 679 | } |
| 680 | } |
| 681 | |
| 682 | out: |
| 683 | /* |
| 684 | * Update our accounting state to incorporate the new Free List |
| 685 | * buffers, tell the hardware about them and return the number of |
Paul Bolle | 90802ed | 2011-12-05 13:00:34 +0100 | [diff] [blame] | 686 | * buffers which we were able to allocate. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 687 | */ |
| 688 | cred = fl->avail - cred; |
| 689 | fl->pend_cred += cred; |
| 690 | ring_fl_db(adapter, fl); |
| 691 | |
| 692 | if (unlikely(fl_starving(fl))) { |
| 693 | smp_wmb(); |
| 694 | set_bit(fl->cntxt_id, adapter->sge.starving_fl); |
| 695 | } |
| 696 | |
| 697 | return cred; |
| 698 | } |
| 699 | |
| 700 | /* |
| 701 | * Refill a Free List to its capacity or the Maximum Refill Increment, |
| 702 | * whichever is smaller ... |
| 703 | */ |
| 704 | static inline void __refill_fl(struct adapter *adapter, struct sge_fl *fl) |
| 705 | { |
| 706 | refill_fl(adapter, fl, |
| 707 | min((unsigned int)MAX_RX_REFILL, fl_cap(fl) - fl->avail), |
| 708 | GFP_ATOMIC); |
| 709 | } |
| 710 | |
| 711 | /** |
| 712 | * alloc_ring - allocate resources for an SGE descriptor ring |
| 713 | * @dev: the PCI device's core device |
| 714 | * @nelem: the number of descriptors |
| 715 | * @hwsize: the size of each hardware descriptor |
| 716 | * @swsize: the size of each software descriptor |
| 717 | * @busaddrp: the physical PCI bus address of the allocated ring |
| 718 | * @swringp: return address pointer for software ring |
| 719 | * @stat_size: extra space in hardware ring for status information |
| 720 | * |
| 721 | * Allocates resources for an SGE descriptor ring, such as TX queues, |
| 722 | * free buffer lists, response queues, etc. Each SGE ring requires |
| 723 | * space for its hardware descriptors plus, optionally, space for software |
| 724 | * state associated with each hardware entry (the metadata). The function |
| 725 | * returns three values: the virtual address for the hardware ring (the |
| 726 | * return value of the function), the PCI bus address of the hardware |
| 727 | * ring (in *busaddrp), and the address of the software ring (in swringp). |
| 728 | * Both the hardware and software rings are returned zeroed out. |
| 729 | */ |
| 730 | static void *alloc_ring(struct device *dev, size_t nelem, size_t hwsize, |
| 731 | size_t swsize, dma_addr_t *busaddrp, void *swringp, |
| 732 | size_t stat_size) |
| 733 | { |
| 734 | /* |
| 735 | * Allocate the hardware ring and PCI DMA bus address space for said. |
| 736 | */ |
| 737 | size_t hwlen = nelem * hwsize + stat_size; |
| 738 | void *hwring = dma_alloc_coherent(dev, hwlen, busaddrp, GFP_KERNEL); |
| 739 | |
| 740 | if (!hwring) |
| 741 | return NULL; |
| 742 | |
| 743 | /* |
| 744 | * If the caller wants a software ring, allocate it and return a |
| 745 | * pointer to it in *swringp. |
| 746 | */ |
| 747 | BUG_ON((swsize != 0) != (swringp != NULL)); |
| 748 | if (swsize) { |
| 749 | void *swring = kcalloc(nelem, swsize, GFP_KERNEL); |
| 750 | |
| 751 | if (!swring) { |
| 752 | dma_free_coherent(dev, hwlen, hwring, *busaddrp); |
| 753 | return NULL; |
| 754 | } |
| 755 | *(void **)swringp = swring; |
| 756 | } |
| 757 | |
| 758 | /* |
| 759 | * Zero out the hardware ring and return its address as our function |
| 760 | * value. |
| 761 | */ |
| 762 | memset(hwring, 0, hwlen); |
| 763 | return hwring; |
| 764 | } |
| 765 | |
| 766 | /** |
| 767 | * sgl_len - calculates the size of an SGL of the given capacity |
| 768 | * @n: the number of SGL entries |
| 769 | * |
| 770 | * Calculates the number of flits (8-byte units) needed for a Direct |
| 771 | * Scatter/Gather List that can hold the given number of entries. |
| 772 | */ |
| 773 | static inline unsigned int sgl_len(unsigned int n) |
| 774 | { |
| 775 | /* |
| 776 | * A Direct Scatter Gather List uses 32-bit lengths and 64-bit PCI DMA |
| 777 | * addresses. The DSGL Work Request starts off with a 32-bit DSGL |
| 778 | * ULPTX header, then Length0, then Address0, then, for 1 <= i <= N, |
| 779 | * repeated sequences of { Length[i], Length[i+1], Address[i], |
| 780 | * Address[i+1] } (this ensures that all addresses are on 64-bit |
| 781 | * boundaries). If N is even, then Length[N+1] should be set to 0 and |
| 782 | * Address[N+1] is omitted. |
| 783 | * |
| 784 | * The following calculation incorporates all of the above. It's |
| 785 | * somewhat hard to follow but, briefly: the "+2" accounts for the |
| 786 | * first two flits which include the DSGL header, Length0 and |
| 787 | * Address0; the "(3*(n-1))/2" covers the main body of list entries (3 |
| 788 | * flits for every pair of the remaining N) +1 if (n-1) is odd; and |
| 789 | * finally the "+((n-1)&1)" adds the one remaining flit needed if |
| 790 | * (n-1) is odd ... |
| 791 | */ |
| 792 | n--; |
| 793 | return (3 * n) / 2 + (n & 1) + 2; |
| 794 | } |
| 795 | |
| 796 | /** |
| 797 | * flits_to_desc - returns the num of TX descriptors for the given flits |
| 798 | * @flits: the number of flits |
| 799 | * |
| 800 | * Returns the number of TX descriptors needed for the supplied number |
| 801 | * of flits. |
| 802 | */ |
| 803 | static inline unsigned int flits_to_desc(unsigned int flits) |
| 804 | { |
| 805 | BUG_ON(flits > SGE_MAX_WR_LEN / sizeof(__be64)); |
| 806 | return DIV_ROUND_UP(flits, TXD_PER_EQ_UNIT); |
| 807 | } |
| 808 | |
| 809 | /** |
| 810 | * is_eth_imm - can an Ethernet packet be sent as immediate data? |
| 811 | * @skb: the packet |
| 812 | * |
| 813 | * Returns whether an Ethernet packet is small enough to fit completely as |
| 814 | * immediate data. |
| 815 | */ |
| 816 | static inline int is_eth_imm(const struct sk_buff *skb) |
| 817 | { |
| 818 | /* |
| 819 | * The VF Driver uses the FW_ETH_TX_PKT_VM_WR firmware Work Request |
| 820 | * which does not accommodate immediate data. We could dike out all |
| 821 | * of the support code for immediate data but that would tie our hands |
| 822 | * too much if we ever want to enhace the firmware. It would also |
| 823 | * create more differences between the PF and VF Drivers. |
| 824 | */ |
| 825 | return false; |
| 826 | } |
| 827 | |
| 828 | /** |
| 829 | * calc_tx_flits - calculate the number of flits for a packet TX WR |
| 830 | * @skb: the packet |
| 831 | * |
| 832 | * Returns the number of flits needed for a TX Work Request for the |
| 833 | * given Ethernet packet, including the needed WR and CPL headers. |
| 834 | */ |
| 835 | static inline unsigned int calc_tx_flits(const struct sk_buff *skb) |
| 836 | { |
| 837 | unsigned int flits; |
| 838 | |
| 839 | /* |
| 840 | * If the skb is small enough, we can pump it out as a work request |
| 841 | * with only immediate data. In that case we just have to have the |
| 842 | * TX Packet header plus the skb data in the Work Request. |
| 843 | */ |
| 844 | if (is_eth_imm(skb)) |
| 845 | return DIV_ROUND_UP(skb->len + sizeof(struct cpl_tx_pkt), |
| 846 | sizeof(__be64)); |
| 847 | |
| 848 | /* |
| 849 | * Otherwise, we're going to have to construct a Scatter gather list |
| 850 | * of the skb body and fragments. We also include the flits necessary |
| 851 | * for the TX Packet Work Request and CPL. We always have a firmware |
| 852 | * Write Header (incorporated as part of the cpl_tx_pkt_lso and |
| 853 | * cpl_tx_pkt structures), followed by either a TX Packet Write CPL |
| 854 | * message or, if we're doing a Large Send Offload, an LSO CPL message |
| 855 | * with an embeded TX Packet Write CPL message. |
| 856 | */ |
| 857 | flits = sgl_len(skb_shinfo(skb)->nr_frags + 1); |
| 858 | if (skb_shinfo(skb)->gso_size) |
| 859 | flits += (sizeof(struct fw_eth_tx_pkt_vm_wr) + |
| 860 | sizeof(struct cpl_tx_pkt_lso_core) + |
| 861 | sizeof(struct cpl_tx_pkt_core)) / sizeof(__be64); |
| 862 | else |
| 863 | flits += (sizeof(struct fw_eth_tx_pkt_vm_wr) + |
| 864 | sizeof(struct cpl_tx_pkt_core)) / sizeof(__be64); |
| 865 | return flits; |
| 866 | } |
| 867 | |
| 868 | /** |
| 869 | * write_sgl - populate a Scatter/Gather List for a packet |
| 870 | * @skb: the packet |
| 871 | * @tq: the TX queue we are writing into |
| 872 | * @sgl: starting location for writing the SGL |
| 873 | * @end: points right after the end of the SGL |
| 874 | * @start: start offset into skb main-body data to include in the SGL |
| 875 | * @addr: the list of DMA bus addresses for the SGL elements |
| 876 | * |
| 877 | * Generates a Scatter/Gather List for the buffers that make up a packet. |
| 878 | * The caller must provide adequate space for the SGL that will be written. |
| 879 | * The SGL includes all of the packet's page fragments and the data in its |
| 880 | * main body except for the first @start bytes. @pos must be 16-byte |
| 881 | * aligned and within a TX descriptor with available space. @end points |
| 882 | * write after the end of the SGL but does not account for any potential |
| 883 | * wrap around, i.e., @end > @tq->stat. |
| 884 | */ |
| 885 | static void write_sgl(const struct sk_buff *skb, struct sge_txq *tq, |
| 886 | struct ulptx_sgl *sgl, u64 *end, unsigned int start, |
| 887 | const dma_addr_t *addr) |
| 888 | { |
| 889 | unsigned int i, len; |
| 890 | struct ulptx_sge_pair *to; |
| 891 | const struct skb_shared_info *si = skb_shinfo(skb); |
| 892 | unsigned int nfrags = si->nr_frags; |
| 893 | struct ulptx_sge_pair buf[MAX_SKB_FRAGS / 2 + 1]; |
| 894 | |
| 895 | len = skb_headlen(skb) - start; |
| 896 | if (likely(len)) { |
| 897 | sgl->len0 = htonl(len); |
| 898 | sgl->addr0 = cpu_to_be64(addr[0] + start); |
| 899 | nfrags++; |
| 900 | } else { |
Eric Dumazet | 9e903e0 | 2011-10-18 21:00:24 +0000 | [diff] [blame] | 901 | sgl->len0 = htonl(skb_frag_size(&si->frags[0])); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 902 | sgl->addr0 = cpu_to_be64(addr[1]); |
| 903 | } |
| 904 | |
| 905 | sgl->cmd_nsge = htonl(ULPTX_CMD(ULP_TX_SC_DSGL) | |
| 906 | ULPTX_NSGE(nfrags)); |
| 907 | if (likely(--nfrags == 0)) |
| 908 | return; |
| 909 | /* |
| 910 | * Most of the complexity below deals with the possibility we hit the |
| 911 | * end of the queue in the middle of writing the SGL. For this case |
| 912 | * only we create the SGL in a temporary buffer and then copy it. |
| 913 | */ |
| 914 | to = (u8 *)end > (u8 *)tq->stat ? buf : sgl->sge; |
| 915 | |
| 916 | for (i = (nfrags != si->nr_frags); nfrags >= 2; nfrags -= 2, to++) { |
Eric Dumazet | 9e903e0 | 2011-10-18 21:00:24 +0000 | [diff] [blame] | 917 | to->len[0] = cpu_to_be32(skb_frag_size(&si->frags[i])); |
| 918 | to->len[1] = cpu_to_be32(skb_frag_size(&si->frags[++i])); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 919 | to->addr[0] = cpu_to_be64(addr[i]); |
| 920 | to->addr[1] = cpu_to_be64(addr[++i]); |
| 921 | } |
| 922 | if (nfrags) { |
Eric Dumazet | 9e903e0 | 2011-10-18 21:00:24 +0000 | [diff] [blame] | 923 | to->len[0] = cpu_to_be32(skb_frag_size(&si->frags[i])); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 924 | to->len[1] = cpu_to_be32(0); |
| 925 | to->addr[0] = cpu_to_be64(addr[i + 1]); |
| 926 | } |
| 927 | if (unlikely((u8 *)end > (u8 *)tq->stat)) { |
| 928 | unsigned int part0 = (u8 *)tq->stat - (u8 *)sgl->sge, part1; |
| 929 | |
| 930 | if (likely(part0)) |
| 931 | memcpy(sgl->sge, buf, part0); |
| 932 | part1 = (u8 *)end - (u8 *)tq->stat; |
| 933 | memcpy(tq->desc, (u8 *)buf + part0, part1); |
| 934 | end = (void *)tq->desc + part1; |
| 935 | } |
| 936 | if ((uintptr_t)end & 8) /* 0-pad to multiple of 16 */ |
Joe Perches | 6469933 | 2012-06-04 12:44:16 +0000 | [diff] [blame] | 937 | *end = 0; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 938 | } |
| 939 | |
| 940 | /** |
| 941 | * check_ring_tx_db - check and potentially ring a TX queue's doorbell |
| 942 | * @adapter: the adapter |
| 943 | * @tq: the TX queue |
| 944 | * @n: number of new descriptors to give to HW |
| 945 | * |
| 946 | * Ring the doorbel for a TX queue. |
| 947 | */ |
| 948 | static inline void ring_tx_db(struct adapter *adapter, struct sge_txq *tq, |
| 949 | int n) |
| 950 | { |
| 951 | /* |
| 952 | * Warn if we write doorbells with the wrong priority and write |
| 953 | * descriptors before telling HW. |
| 954 | */ |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 955 | WARN_ON((QID(tq->cntxt_id) | PIDX(n)) & DBPRIO(1)); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 956 | wmb(); |
| 957 | t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_KDOORBELL, |
| 958 | QID(tq->cntxt_id) | PIDX(n)); |
| 959 | } |
| 960 | |
| 961 | /** |
| 962 | * inline_tx_skb - inline a packet's data into TX descriptors |
| 963 | * @skb: the packet |
| 964 | * @tq: the TX queue where the packet will be inlined |
| 965 | * @pos: starting position in the TX queue to inline the packet |
| 966 | * |
| 967 | * Inline a packet's contents directly into TX descriptors, starting at |
| 968 | * the given position within the TX DMA ring. |
| 969 | * Most of the complexity of this operation is dealing with wrap arounds |
| 970 | * in the middle of the packet we want to inline. |
| 971 | */ |
| 972 | static void inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *tq, |
| 973 | void *pos) |
| 974 | { |
| 975 | u64 *p; |
| 976 | int left = (void *)tq->stat - pos; |
| 977 | |
| 978 | if (likely(skb->len <= left)) { |
| 979 | if (likely(!skb->data_len)) |
| 980 | skb_copy_from_linear_data(skb, pos, skb->len); |
| 981 | else |
| 982 | skb_copy_bits(skb, 0, pos, skb->len); |
| 983 | pos += skb->len; |
| 984 | } else { |
| 985 | skb_copy_bits(skb, 0, pos, left); |
| 986 | skb_copy_bits(skb, left, tq->desc, skb->len - left); |
| 987 | pos = (void *)tq->desc + (skb->len - left); |
| 988 | } |
| 989 | |
| 990 | /* 0-pad to multiple of 16 */ |
| 991 | p = PTR_ALIGN(pos, 8); |
| 992 | if ((uintptr_t)p & 8) |
| 993 | *p = 0; |
| 994 | } |
| 995 | |
| 996 | /* |
| 997 | * Figure out what HW csum a packet wants and return the appropriate control |
| 998 | * bits. |
| 999 | */ |
| 1000 | static u64 hwcsum(const struct sk_buff *skb) |
| 1001 | { |
| 1002 | int csum_type; |
| 1003 | const struct iphdr *iph = ip_hdr(skb); |
| 1004 | |
| 1005 | if (iph->version == 4) { |
| 1006 | if (iph->protocol == IPPROTO_TCP) |
| 1007 | csum_type = TX_CSUM_TCPIP; |
| 1008 | else if (iph->protocol == IPPROTO_UDP) |
| 1009 | csum_type = TX_CSUM_UDPIP; |
| 1010 | else { |
| 1011 | nocsum: |
| 1012 | /* |
| 1013 | * unknown protocol, disable HW csum |
| 1014 | * and hope a bad packet is detected |
| 1015 | */ |
| 1016 | return TXPKT_L4CSUM_DIS; |
| 1017 | } |
| 1018 | } else { |
| 1019 | /* |
| 1020 | * this doesn't work with extension headers |
| 1021 | */ |
| 1022 | const struct ipv6hdr *ip6h = (const struct ipv6hdr *)iph; |
| 1023 | |
| 1024 | if (ip6h->nexthdr == IPPROTO_TCP) |
| 1025 | csum_type = TX_CSUM_TCPIP6; |
| 1026 | else if (ip6h->nexthdr == IPPROTO_UDP) |
| 1027 | csum_type = TX_CSUM_UDPIP6; |
| 1028 | else |
| 1029 | goto nocsum; |
| 1030 | } |
| 1031 | |
| 1032 | if (likely(csum_type >= TX_CSUM_TCPIP)) |
| 1033 | return TXPKT_CSUM_TYPE(csum_type) | |
| 1034 | TXPKT_IPHDR_LEN(skb_network_header_len(skb)) | |
| 1035 | TXPKT_ETHHDR_LEN(skb_network_offset(skb) - ETH_HLEN); |
| 1036 | else { |
| 1037 | int start = skb_transport_offset(skb); |
| 1038 | |
| 1039 | return TXPKT_CSUM_TYPE(csum_type) | |
| 1040 | TXPKT_CSUM_START(start) | |
| 1041 | TXPKT_CSUM_LOC(start + skb->csum_offset); |
| 1042 | } |
| 1043 | } |
| 1044 | |
| 1045 | /* |
| 1046 | * Stop an Ethernet TX queue and record that state change. |
| 1047 | */ |
| 1048 | static void txq_stop(struct sge_eth_txq *txq) |
| 1049 | { |
| 1050 | netif_tx_stop_queue(txq->txq); |
| 1051 | txq->q.stops++; |
| 1052 | } |
| 1053 | |
| 1054 | /* |
| 1055 | * Advance our software state for a TX queue by adding n in use descriptors. |
| 1056 | */ |
| 1057 | static inline void txq_advance(struct sge_txq *tq, unsigned int n) |
| 1058 | { |
| 1059 | tq->in_use += n; |
| 1060 | tq->pidx += n; |
| 1061 | if (tq->pidx >= tq->size) |
| 1062 | tq->pidx -= tq->size; |
| 1063 | } |
| 1064 | |
| 1065 | /** |
| 1066 | * t4vf_eth_xmit - add a packet to an Ethernet TX queue |
| 1067 | * @skb: the packet |
| 1068 | * @dev: the egress net device |
| 1069 | * |
| 1070 | * Add a packet to an SGE Ethernet TX queue. Runs with softirqs disabled. |
| 1071 | */ |
| 1072 | int t4vf_eth_xmit(struct sk_buff *skb, struct net_device *dev) |
| 1073 | { |
Casey Leedom | 7f9dd2f | 2010-07-12 14:39:07 -0700 | [diff] [blame] | 1074 | u32 wr_mid; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1075 | u64 cntrl, *end; |
| 1076 | int qidx, credits; |
| 1077 | unsigned int flits, ndesc; |
| 1078 | struct adapter *adapter; |
| 1079 | struct sge_eth_txq *txq; |
| 1080 | const struct port_info *pi; |
| 1081 | struct fw_eth_tx_pkt_vm_wr *wr; |
| 1082 | struct cpl_tx_pkt_core *cpl; |
| 1083 | const struct skb_shared_info *ssi; |
| 1084 | dma_addr_t addr[MAX_SKB_FRAGS + 1]; |
| 1085 | const size_t fw_hdr_copy_len = (sizeof(wr->ethmacdst) + |
| 1086 | sizeof(wr->ethmacsrc) + |
| 1087 | sizeof(wr->ethtype) + |
| 1088 | sizeof(wr->vlantci)); |
| 1089 | |
| 1090 | /* |
| 1091 | * The chip minimum packet length is 10 octets but the firmware |
| 1092 | * command that we are using requires that we copy the Ethernet header |
| 1093 | * (including the VLAN tag) into the header so we reject anything |
| 1094 | * smaller than that ... |
| 1095 | */ |
| 1096 | if (unlikely(skb->len < fw_hdr_copy_len)) |
| 1097 | goto out_free; |
| 1098 | |
| 1099 | /* |
| 1100 | * Figure out which TX Queue we're going to use. |
| 1101 | */ |
| 1102 | pi = netdev_priv(dev); |
| 1103 | adapter = pi->adapter; |
| 1104 | qidx = skb_get_queue_mapping(skb); |
| 1105 | BUG_ON(qidx >= pi->nqsets); |
| 1106 | txq = &adapter->sge.ethtxq[pi->first_qset + qidx]; |
| 1107 | |
| 1108 | /* |
| 1109 | * Take this opportunity to reclaim any TX Descriptors whose DMA |
| 1110 | * transfers have completed. |
| 1111 | */ |
| 1112 | reclaim_completed_tx(adapter, &txq->q, true); |
| 1113 | |
| 1114 | /* |
| 1115 | * Calculate the number of flits and TX Descriptors we're going to |
| 1116 | * need along with how many TX Descriptors will be left over after |
| 1117 | * we inject our Work Request. |
| 1118 | */ |
| 1119 | flits = calc_tx_flits(skb); |
| 1120 | ndesc = flits_to_desc(flits); |
| 1121 | credits = txq_avail(&txq->q) - ndesc; |
| 1122 | |
| 1123 | if (unlikely(credits < 0)) { |
| 1124 | /* |
| 1125 | * Not enough room for this packet's Work Request. Stop the |
| 1126 | * TX Queue and return a "busy" condition. The queue will get |
| 1127 | * started later on when the firmware informs us that space |
| 1128 | * has opened up. |
| 1129 | */ |
| 1130 | txq_stop(txq); |
| 1131 | dev_err(adapter->pdev_dev, |
| 1132 | "%s: TX ring %u full while queue awake!\n", |
| 1133 | dev->name, qidx); |
| 1134 | return NETDEV_TX_BUSY; |
| 1135 | } |
| 1136 | |
| 1137 | if (!is_eth_imm(skb) && |
| 1138 | unlikely(map_skb(adapter->pdev_dev, skb, addr) < 0)) { |
| 1139 | /* |
| 1140 | * We need to map the skb into PCI DMA space (because it can't |
| 1141 | * be in-lined directly into the Work Request) and the mapping |
| 1142 | * operation failed. Record the error and drop the packet. |
| 1143 | */ |
| 1144 | txq->mapping_err++; |
| 1145 | goto out_free; |
| 1146 | } |
| 1147 | |
Casey Leedom | 7f9dd2f | 2010-07-12 14:39:07 -0700 | [diff] [blame] | 1148 | wr_mid = FW_WR_LEN16(DIV_ROUND_UP(flits, 2)); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1149 | if (unlikely(credits < ETHTXQ_STOP_THRES)) { |
| 1150 | /* |
| 1151 | * After we're done injecting the Work Request for this |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1152 | * packet, we'll be below our "stop threshold" so stop the TX |
Casey Leedom | 7f9dd2f | 2010-07-12 14:39:07 -0700 | [diff] [blame] | 1153 | * Queue now and schedule a request for an SGE Egress Queue |
| 1154 | * Update message. The queue will get started later on when |
| 1155 | * the firmware processes this Work Request and sends us an |
| 1156 | * Egress Queue Status Update message indicating that space |
| 1157 | * has opened up. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1158 | */ |
| 1159 | txq_stop(txq); |
Casey Leedom | 7f9dd2f | 2010-07-12 14:39:07 -0700 | [diff] [blame] | 1160 | wr_mid |= FW_WR_EQUEQ | FW_WR_EQUIQ; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1161 | } |
| 1162 | |
| 1163 | /* |
| 1164 | * Start filling in our Work Request. Note that we do _not_ handle |
| 1165 | * the WR Header wrapping around the TX Descriptor Ring. If our |
| 1166 | * maximum header size ever exceeds one TX Descriptor, we'll need to |
| 1167 | * do something else here. |
| 1168 | */ |
| 1169 | BUG_ON(DIV_ROUND_UP(ETHTXQ_MAX_HDR, TXD_PER_EQ_UNIT) > 1); |
| 1170 | wr = (void *)&txq->q.desc[txq->q.pidx]; |
Casey Leedom | 7f9dd2f | 2010-07-12 14:39:07 -0700 | [diff] [blame] | 1171 | wr->equiq_to_len16 = cpu_to_be32(wr_mid); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1172 | wr->r3[0] = cpu_to_be64(0); |
| 1173 | wr->r3[1] = cpu_to_be64(0); |
| 1174 | skb_copy_from_linear_data(skb, (void *)wr->ethmacdst, fw_hdr_copy_len); |
| 1175 | end = (u64 *)wr + flits; |
| 1176 | |
| 1177 | /* |
| 1178 | * If this is a Large Send Offload packet we'll put in an LSO CPL |
| 1179 | * message with an encapsulated TX Packet CPL message. Otherwise we |
| 1180 | * just use a TX Packet CPL message. |
| 1181 | */ |
| 1182 | ssi = skb_shinfo(skb); |
| 1183 | if (ssi->gso_size) { |
| 1184 | struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1); |
| 1185 | bool v6 = (ssi->gso_type & SKB_GSO_TCPV6) != 0; |
| 1186 | int l3hdr_len = skb_network_header_len(skb); |
| 1187 | int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN; |
| 1188 | |
| 1189 | wr->op_immdlen = |
| 1190 | cpu_to_be32(FW_WR_OP(FW_ETH_TX_PKT_VM_WR) | |
| 1191 | FW_WR_IMMDLEN(sizeof(*lso) + |
| 1192 | sizeof(*cpl))); |
| 1193 | /* |
| 1194 | * Fill in the LSO CPL message. |
| 1195 | */ |
| 1196 | lso->lso_ctrl = |
| 1197 | cpu_to_be32(LSO_OPCODE(CPL_TX_PKT_LSO) | |
| 1198 | LSO_FIRST_SLICE | |
| 1199 | LSO_LAST_SLICE | |
| 1200 | LSO_IPV6(v6) | |
| 1201 | LSO_ETHHDR_LEN(eth_xtra_len/4) | |
| 1202 | LSO_IPHDR_LEN(l3hdr_len/4) | |
| 1203 | LSO_TCPHDR_LEN(tcp_hdr(skb)->doff)); |
| 1204 | lso->ipid_ofst = cpu_to_be16(0); |
| 1205 | lso->mss = cpu_to_be16(ssi->gso_size); |
| 1206 | lso->seqno_offset = cpu_to_be32(0); |
| 1207 | lso->len = cpu_to_be32(skb->len); |
| 1208 | |
| 1209 | /* |
| 1210 | * Set up TX Packet CPL pointer, control word and perform |
| 1211 | * accounting. |
| 1212 | */ |
| 1213 | cpl = (void *)(lso + 1); |
| 1214 | cntrl = (TXPKT_CSUM_TYPE(v6 ? TX_CSUM_TCPIP6 : TX_CSUM_TCPIP) | |
| 1215 | TXPKT_IPHDR_LEN(l3hdr_len) | |
| 1216 | TXPKT_ETHHDR_LEN(eth_xtra_len)); |
| 1217 | txq->tso++; |
| 1218 | txq->tx_cso += ssi->gso_segs; |
| 1219 | } else { |
| 1220 | int len; |
| 1221 | |
| 1222 | len = is_eth_imm(skb) ? skb->len + sizeof(*cpl) : sizeof(*cpl); |
| 1223 | wr->op_immdlen = |
| 1224 | cpu_to_be32(FW_WR_OP(FW_ETH_TX_PKT_VM_WR) | |
| 1225 | FW_WR_IMMDLEN(len)); |
| 1226 | |
| 1227 | /* |
| 1228 | * Set up TX Packet CPL pointer, control word and perform |
| 1229 | * accounting. |
| 1230 | */ |
| 1231 | cpl = (void *)(wr + 1); |
| 1232 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
| 1233 | cntrl = hwcsum(skb) | TXPKT_IPCSUM_DIS; |
| 1234 | txq->tx_cso++; |
| 1235 | } else |
| 1236 | cntrl = TXPKT_L4CSUM_DIS | TXPKT_IPCSUM_DIS; |
| 1237 | } |
| 1238 | |
| 1239 | /* |
| 1240 | * If there's a VLAN tag present, add that to the list of things to |
| 1241 | * do in this Work Request. |
| 1242 | */ |
| 1243 | if (vlan_tx_tag_present(skb)) { |
| 1244 | txq->vlan_ins++; |
| 1245 | cntrl |= TXPKT_VLAN_VLD | TXPKT_VLAN(vlan_tx_tag_get(skb)); |
| 1246 | } |
| 1247 | |
| 1248 | /* |
| 1249 | * Fill in the TX Packet CPL message header. |
| 1250 | */ |
| 1251 | cpl->ctrl0 = cpu_to_be32(TXPKT_OPCODE(CPL_TX_PKT_XT) | |
| 1252 | TXPKT_INTF(pi->port_id) | |
| 1253 | TXPKT_PF(0)); |
| 1254 | cpl->pack = cpu_to_be16(0); |
| 1255 | cpl->len = cpu_to_be16(skb->len); |
| 1256 | cpl->ctrl1 = cpu_to_be64(cntrl); |
| 1257 | |
| 1258 | #ifdef T4_TRACE |
| 1259 | T4_TRACE5(adapter->tb[txq->q.cntxt_id & 7], |
| 1260 | "eth_xmit: ndesc %u, credits %u, pidx %u, len %u, frags %u", |
| 1261 | ndesc, credits, txq->q.pidx, skb->len, ssi->nr_frags); |
| 1262 | #endif |
| 1263 | |
| 1264 | /* |
| 1265 | * Fill in the body of the TX Packet CPL message with either in-lined |
| 1266 | * data or a Scatter/Gather List. |
| 1267 | */ |
| 1268 | if (is_eth_imm(skb)) { |
| 1269 | /* |
| 1270 | * In-line the packet's data and free the skb since we don't |
| 1271 | * need it any longer. |
| 1272 | */ |
| 1273 | inline_tx_skb(skb, &txq->q, cpl + 1); |
| 1274 | dev_kfree_skb(skb); |
| 1275 | } else { |
| 1276 | /* |
| 1277 | * Write the skb's Scatter/Gather list into the TX Packet CPL |
| 1278 | * message and retain a pointer to the skb so we can free it |
| 1279 | * later when its DMA completes. (We store the skb pointer |
| 1280 | * in the Software Descriptor corresponding to the last TX |
| 1281 | * Descriptor used by the Work Request.) |
| 1282 | * |
| 1283 | * The retained skb will be freed when the corresponding TX |
| 1284 | * Descriptors are reclaimed after their DMAs complete. |
| 1285 | * However, this could take quite a while since, in general, |
| 1286 | * the hardware is set up to be lazy about sending DMA |
| 1287 | * completion notifications to us and we mostly perform TX |
| 1288 | * reclaims in the transmit routine. |
| 1289 | * |
| 1290 | * This is good for performamce but means that we rely on new |
| 1291 | * TX packets arriving to run the destructors of completed |
| 1292 | * packets, which open up space in their sockets' send queues. |
| 1293 | * Sometimes we do not get such new packets causing TX to |
| 1294 | * stall. A single UDP transmitter is a good example of this |
| 1295 | * situation. We have a clean up timer that periodically |
| 1296 | * reclaims completed packets but it doesn't run often enough |
| 1297 | * (nor do we want it to) to prevent lengthy stalls. A |
| 1298 | * solution to this problem is to run the destructor early, |
| 1299 | * after the packet is queued but before it's DMAd. A con is |
| 1300 | * that we lie to socket memory accounting, but the amount of |
| 1301 | * extra memory is reasonable (limited by the number of TX |
| 1302 | * descriptors), the packets do actually get freed quickly by |
| 1303 | * new packets almost always, and for protocols like TCP that |
| 1304 | * wait for acks to really free up the data the extra memory |
| 1305 | * is even less. On the positive side we run the destructors |
| 1306 | * on the sending CPU rather than on a potentially different |
Casey Leedom | 64bb336 | 2010-06-29 12:53:39 +0000 | [diff] [blame] | 1307 | * completing CPU, usually a good thing. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1308 | * |
| 1309 | * Run the destructor before telling the DMA engine about the |
| 1310 | * packet to make sure it doesn't complete and get freed |
| 1311 | * prematurely. |
| 1312 | */ |
| 1313 | struct ulptx_sgl *sgl = (struct ulptx_sgl *)(cpl + 1); |
| 1314 | struct sge_txq *tq = &txq->q; |
| 1315 | int last_desc; |
| 1316 | |
| 1317 | /* |
| 1318 | * If the Work Request header was an exact multiple of our TX |
| 1319 | * Descriptor length, then it's possible that the starting SGL |
| 1320 | * pointer lines up exactly with the end of our TX Descriptor |
| 1321 | * ring. If that's the case, wrap around to the beginning |
| 1322 | * here ... |
| 1323 | */ |
| 1324 | if (unlikely((void *)sgl == (void *)tq->stat)) { |
| 1325 | sgl = (void *)tq->desc; |
Joe Perches | 6469933 | 2012-06-04 12:44:16 +0000 | [diff] [blame] | 1326 | end = ((void *)tq->desc + ((void *)end - (void *)tq->stat)); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1327 | } |
| 1328 | |
| 1329 | write_sgl(skb, tq, sgl, end, 0, addr); |
| 1330 | skb_orphan(skb); |
| 1331 | |
| 1332 | last_desc = tq->pidx + ndesc - 1; |
| 1333 | if (last_desc >= tq->size) |
| 1334 | last_desc -= tq->size; |
| 1335 | tq->sdesc[last_desc].skb = skb; |
| 1336 | tq->sdesc[last_desc].sgl = sgl; |
| 1337 | } |
| 1338 | |
| 1339 | /* |
| 1340 | * Advance our internal TX Queue state, tell the hardware about |
| 1341 | * the new TX descriptors and return success. |
| 1342 | */ |
| 1343 | txq_advance(&txq->q, ndesc); |
| 1344 | dev->trans_start = jiffies; |
| 1345 | ring_tx_db(adapter, &txq->q, ndesc); |
| 1346 | return NETDEV_TX_OK; |
| 1347 | |
| 1348 | out_free: |
| 1349 | /* |
| 1350 | * An error of some sort happened. Free the TX skb and tell the |
| 1351 | * OS that we've "dealt" with the packet ... |
| 1352 | */ |
| 1353 | dev_kfree_skb(skb); |
| 1354 | return NETDEV_TX_OK; |
| 1355 | } |
| 1356 | |
| 1357 | /** |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1358 | * copy_frags - copy fragments from gather list into skb_shared_info |
| 1359 | * @skb: destination skb |
| 1360 | * @gl: source internal packet gather list |
| 1361 | * @offset: packet start offset in first page |
| 1362 | * |
| 1363 | * Copy an internal packet gather list into a Linux skb_shared_info |
| 1364 | * structure. |
| 1365 | */ |
| 1366 | static inline void copy_frags(struct sk_buff *skb, |
| 1367 | const struct pkt_gl *gl, |
| 1368 | unsigned int offset) |
| 1369 | { |
| 1370 | int i; |
| 1371 | |
| 1372 | /* usually there's just one frag */ |
| 1373 | __skb_fill_page_desc(skb, 0, gl->frags[0].page, |
| 1374 | gl->frags[0].offset + offset, |
| 1375 | gl->frags[0].size - offset); |
| 1376 | skb_shinfo(skb)->nr_frags = gl->nfrags; |
| 1377 | for (i = 1; i < gl->nfrags; i++) |
| 1378 | __skb_fill_page_desc(skb, i, gl->frags[i].page, |
| 1379 | gl->frags[i].offset, |
| 1380 | gl->frags[i].size); |
| 1381 | |
| 1382 | /* get a reference to the last page, we don't own it */ |
| 1383 | get_page(gl->frags[gl->nfrags - 1].page); |
| 1384 | } |
| 1385 | |
| 1386 | /** |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 1387 | * t4vf_pktgl_to_skb - build an sk_buff from a packet gather list |
| 1388 | * @gl: the gather list |
| 1389 | * @skb_len: size of sk_buff main body if it carries fragments |
| 1390 | * @pull_len: amount of data to move to the sk_buff's main body |
| 1391 | * |
| 1392 | * Builds an sk_buff from the given packet gather list. Returns the |
| 1393 | * sk_buff or %NULL if sk_buff allocation failed. |
| 1394 | */ |
| 1395 | struct sk_buff *t4vf_pktgl_to_skb(const struct pkt_gl *gl, |
| 1396 | unsigned int skb_len, unsigned int pull_len) |
| 1397 | { |
| 1398 | struct sk_buff *skb; |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 1399 | |
| 1400 | /* |
| 1401 | * If the ingress packet is small enough, allocate an skb large enough |
| 1402 | * for all of the data and copy it inline. Otherwise, allocate an skb |
| 1403 | * with enough room to pull in the header and reference the rest of |
| 1404 | * the data via the skb fragment list. |
| 1405 | * |
| 1406 | * Below we rely on RX_COPY_THRES being less than the smallest Rx |
| 1407 | * buff! size, which is expected since buffers are at least |
| 1408 | * PAGE_SIZEd. In this case packets up to RX_COPY_THRES have only one |
| 1409 | * fragment. |
| 1410 | */ |
| 1411 | if (gl->tot_len <= RX_COPY_THRES) { |
| 1412 | /* small packets have only one fragment */ |
| 1413 | skb = alloc_skb(gl->tot_len, GFP_ATOMIC); |
| 1414 | if (unlikely(!skb)) |
| 1415 | goto out; |
| 1416 | __skb_put(skb, gl->tot_len); |
| 1417 | skb_copy_to_linear_data(skb, gl->va, gl->tot_len); |
| 1418 | } else { |
| 1419 | skb = alloc_skb(skb_len, GFP_ATOMIC); |
| 1420 | if (unlikely(!skb)) |
| 1421 | goto out; |
| 1422 | __skb_put(skb, pull_len); |
| 1423 | skb_copy_to_linear_data(skb, gl->va, pull_len); |
| 1424 | |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1425 | copy_frags(skb, gl, pull_len); |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 1426 | skb->len = gl->tot_len; |
| 1427 | skb->data_len = skb->len - pull_len; |
| 1428 | skb->truesize += skb->data_len; |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 1429 | } |
| 1430 | |
| 1431 | out: |
| 1432 | return skb; |
| 1433 | } |
| 1434 | |
| 1435 | /** |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1436 | * t4vf_pktgl_free - free a packet gather list |
| 1437 | * @gl: the gather list |
| 1438 | * |
| 1439 | * Releases the pages of a packet gather list. We do not own the last |
| 1440 | * page on the list and do not free it. |
| 1441 | */ |
| 1442 | void t4vf_pktgl_free(const struct pkt_gl *gl) |
| 1443 | { |
| 1444 | int frag; |
| 1445 | |
| 1446 | frag = gl->nfrags - 1; |
| 1447 | while (frag--) |
| 1448 | put_page(gl->frags[frag].page); |
| 1449 | } |
| 1450 | |
| 1451 | /** |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1452 | * do_gro - perform Generic Receive Offload ingress packet processing |
| 1453 | * @rxq: ingress RX Ethernet Queue |
| 1454 | * @gl: gather list for ingress packet |
| 1455 | * @pkt: CPL header for last packet fragment |
| 1456 | * |
| 1457 | * Perform Generic Receive Offload (GRO) ingress packet processing. |
| 1458 | * We use the standard Linux GRO interfaces for this. |
| 1459 | */ |
| 1460 | static void do_gro(struct sge_eth_rxq *rxq, const struct pkt_gl *gl, |
| 1461 | const struct cpl_rx_pkt *pkt) |
| 1462 | { |
| 1463 | int ret; |
| 1464 | struct sk_buff *skb; |
| 1465 | |
| 1466 | skb = napi_get_frags(&rxq->rspq.napi); |
| 1467 | if (unlikely(!skb)) { |
| 1468 | t4vf_pktgl_free(gl); |
| 1469 | rxq->stats.rx_drops++; |
| 1470 | return; |
| 1471 | } |
| 1472 | |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1473 | copy_frags(skb, gl, PKTSHIFT); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1474 | skb->len = gl->tot_len - PKTSHIFT; |
| 1475 | skb->data_len = skb->len; |
| 1476 | skb->truesize += skb->data_len; |
| 1477 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1478 | skb_record_rx_queue(skb, rxq->rspq.idx); |
| 1479 | |
Jiri Pirko | 8773766 | 2011-07-20 04:54:16 +0000 | [diff] [blame] | 1480 | if (pkt->vlan_ex) |
| 1481 | __vlan_hwaccel_put_tag(skb, be16_to_cpu(pkt->vlan)); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1482 | ret = napi_gro_frags(&rxq->rspq.napi); |
| 1483 | |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1484 | if (ret == GRO_HELD) |
| 1485 | rxq->stats.lro_pkts++; |
| 1486 | else if (ret == GRO_MERGED || ret == GRO_MERGED_FREE) |
| 1487 | rxq->stats.lro_merged++; |
| 1488 | rxq->stats.pkts++; |
| 1489 | rxq->stats.rx_cso++; |
| 1490 | } |
| 1491 | |
| 1492 | /** |
| 1493 | * t4vf_ethrx_handler - process an ingress ethernet packet |
| 1494 | * @rspq: the response queue that received the packet |
| 1495 | * @rsp: the response queue descriptor holding the RX_PKT message |
| 1496 | * @gl: the gather list of packet fragments |
| 1497 | * |
| 1498 | * Process an ingress ethernet packet and deliver it to the stack. |
| 1499 | */ |
| 1500 | int t4vf_ethrx_handler(struct sge_rspq *rspq, const __be64 *rsp, |
| 1501 | const struct pkt_gl *gl) |
| 1502 | { |
| 1503 | struct sk_buff *skb; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1504 | const struct cpl_rx_pkt *pkt = (void *)&rsp[1]; |
| 1505 | bool csum_ok = pkt->csum_calc && !pkt->err_vec; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1506 | struct sge_eth_rxq *rxq = container_of(rspq, struct sge_eth_rxq, rspq); |
| 1507 | |
| 1508 | /* |
| 1509 | * If this is a good TCP packet and we have Generic Receive Offload |
| 1510 | * enabled, handle the packet in the GRO path. |
| 1511 | */ |
| 1512 | if ((pkt->l2info & cpu_to_be32(RXF_TCP)) && |
| 1513 | (rspq->netdev->features & NETIF_F_GRO) && csum_ok && |
| 1514 | !pkt->ip_frag) { |
| 1515 | do_gro(rxq, gl, pkt); |
| 1516 | return 0; |
| 1517 | } |
| 1518 | |
| 1519 | /* |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 1520 | * Convert the Packet Gather List into an skb. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1521 | */ |
Casey Leedom | eb6c503 | 2010-11-11 09:06:50 +0000 | [diff] [blame] | 1522 | skb = t4vf_pktgl_to_skb(gl, RX_SKB_LEN, RX_PULL_LEN); |
| 1523 | if (unlikely(!skb)) { |
| 1524 | t4vf_pktgl_free(gl); |
| 1525 | rxq->stats.rx_drops++; |
| 1526 | return 0; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1527 | } |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1528 | __skb_pull(skb, PKTSHIFT); |
| 1529 | skb->protocol = eth_type_trans(skb, rspq->netdev); |
| 1530 | skb_record_rx_queue(skb, rspq->idx); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1531 | rxq->stats.pkts++; |
| 1532 | |
Michał Mirosław | 2ed28ba | 2011-04-16 13:05:08 +0000 | [diff] [blame] | 1533 | if (csum_ok && (rspq->netdev->features & NETIF_F_RXCSUM) && |
| 1534 | !pkt->err_vec && (be32_to_cpu(pkt->l2info) & (RXF_UDP|RXF_TCP))) { |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1535 | if (!pkt->ip_frag) |
| 1536 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1537 | else { |
| 1538 | __sum16 c = (__force __sum16)pkt->csum; |
| 1539 | skb->csum = csum_unfold(c); |
| 1540 | skb->ip_summed = CHECKSUM_COMPLETE; |
| 1541 | } |
| 1542 | rxq->stats.rx_cso++; |
| 1543 | } else |
Eric Dumazet | bc8acf2 | 2010-09-02 13:07:41 -0700 | [diff] [blame] | 1544 | skb_checksum_none_assert(skb); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1545 | |
Jiri Pirko | 8773766 | 2011-07-20 04:54:16 +0000 | [diff] [blame] | 1546 | if (pkt->vlan_ex) { |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1547 | rxq->stats.vlan_ex++; |
Jiri Pirko | 8773766 | 2011-07-20 04:54:16 +0000 | [diff] [blame] | 1548 | __vlan_hwaccel_put_tag(skb, be16_to_cpu(pkt->vlan)); |
| 1549 | } |
| 1550 | |
| 1551 | netif_receive_skb(skb); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1552 | |
| 1553 | return 0; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1554 | } |
| 1555 | |
| 1556 | /** |
| 1557 | * is_new_response - check if a response is newly written |
| 1558 | * @rc: the response control descriptor |
| 1559 | * @rspq: the response queue |
| 1560 | * |
| 1561 | * Returns true if a response descriptor contains a yet unprocessed |
| 1562 | * response. |
| 1563 | */ |
| 1564 | static inline bool is_new_response(const struct rsp_ctrl *rc, |
| 1565 | const struct sge_rspq *rspq) |
| 1566 | { |
| 1567 | return RSPD_GEN(rc->type_gen) == rspq->gen; |
| 1568 | } |
| 1569 | |
| 1570 | /** |
| 1571 | * restore_rx_bufs - put back a packet's RX buffers |
| 1572 | * @gl: the packet gather list |
| 1573 | * @fl: the SGE Free List |
| 1574 | * @nfrags: how many fragments in @si |
| 1575 | * |
| 1576 | * Called when we find out that the current packet, @si, can't be |
| 1577 | * processed right away for some reason. This is a very rare event and |
| 1578 | * there's no effort to make this suspension/resumption process |
| 1579 | * particularly efficient. |
| 1580 | * |
| 1581 | * We implement the suspension by putting all of the RX buffers associated |
| 1582 | * with the current packet back on the original Free List. The buffers |
| 1583 | * have already been unmapped and are left unmapped, we mark them as |
| 1584 | * unmapped in order to prevent further unmapping attempts. (Effectively |
| 1585 | * this function undoes the series of @unmap_rx_buf calls which were done |
| 1586 | * to create the current packet's gather list.) This leaves us ready to |
| 1587 | * restart processing of the packet the next time we start processing the |
| 1588 | * RX Queue ... |
| 1589 | */ |
| 1590 | static void restore_rx_bufs(const struct pkt_gl *gl, struct sge_fl *fl, |
| 1591 | int frags) |
| 1592 | { |
| 1593 | struct rx_sw_desc *sdesc; |
| 1594 | |
| 1595 | while (frags--) { |
| 1596 | if (fl->cidx == 0) |
| 1597 | fl->cidx = fl->size - 1; |
| 1598 | else |
| 1599 | fl->cidx--; |
| 1600 | sdesc = &fl->sdesc[fl->cidx]; |
| 1601 | sdesc->page = gl->frags[frags].page; |
| 1602 | sdesc->dma_addr |= RX_UNMAPPED_BUF; |
| 1603 | fl->avail++; |
| 1604 | } |
| 1605 | } |
| 1606 | |
| 1607 | /** |
| 1608 | * rspq_next - advance to the next entry in a response queue |
| 1609 | * @rspq: the queue |
| 1610 | * |
| 1611 | * Updates the state of a response queue to advance it to the next entry. |
| 1612 | */ |
| 1613 | static inline void rspq_next(struct sge_rspq *rspq) |
| 1614 | { |
| 1615 | rspq->cur_desc = (void *)rspq->cur_desc + rspq->iqe_len; |
| 1616 | if (unlikely(++rspq->cidx == rspq->size)) { |
| 1617 | rspq->cidx = 0; |
| 1618 | rspq->gen ^= 1; |
| 1619 | rspq->cur_desc = rspq->desc; |
| 1620 | } |
| 1621 | } |
| 1622 | |
| 1623 | /** |
| 1624 | * process_responses - process responses from an SGE response queue |
| 1625 | * @rspq: the ingress response queue to process |
| 1626 | * @budget: how many responses can be processed in this round |
| 1627 | * |
| 1628 | * Process responses from a Scatter Gather Engine response queue up to |
| 1629 | * the supplied budget. Responses include received packets as well as |
| 1630 | * control messages from firmware or hardware. |
| 1631 | * |
| 1632 | * Additionally choose the interrupt holdoff time for the next interrupt |
| 1633 | * on this queue. If the system is under memory shortage use a fairly |
| 1634 | * long delay to help recovery. |
| 1635 | */ |
| 1636 | int process_responses(struct sge_rspq *rspq, int budget) |
| 1637 | { |
| 1638 | struct sge_eth_rxq *rxq = container_of(rspq, struct sge_eth_rxq, rspq); |
| 1639 | int budget_left = budget; |
| 1640 | |
| 1641 | while (likely(budget_left)) { |
| 1642 | int ret, rsp_type; |
| 1643 | const struct rsp_ctrl *rc; |
| 1644 | |
| 1645 | rc = (void *)rspq->cur_desc + (rspq->iqe_len - sizeof(*rc)); |
| 1646 | if (!is_new_response(rc, rspq)) |
| 1647 | break; |
| 1648 | |
| 1649 | /* |
| 1650 | * Figure out what kind of response we've received from the |
| 1651 | * SGE. |
| 1652 | */ |
| 1653 | rmb(); |
| 1654 | rsp_type = RSPD_TYPE(rc->type_gen); |
| 1655 | if (likely(rsp_type == RSP_TYPE_FLBUF)) { |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1656 | struct page_frag *fp; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1657 | struct pkt_gl gl; |
| 1658 | const struct rx_sw_desc *sdesc; |
| 1659 | u32 bufsz, frag; |
| 1660 | u32 len = be32_to_cpu(rc->pldbuflen_qid); |
| 1661 | |
| 1662 | /* |
| 1663 | * If we get a "new buffer" message from the SGE we |
| 1664 | * need to move on to the next Free List buffer. |
| 1665 | */ |
| 1666 | if (len & RSPD_NEWBUF) { |
| 1667 | /* |
| 1668 | * We get one "new buffer" message when we |
| 1669 | * first start up a queue so we need to ignore |
| 1670 | * it when our offset into the buffer is 0. |
| 1671 | */ |
| 1672 | if (likely(rspq->offset > 0)) { |
| 1673 | free_rx_bufs(rspq->adapter, &rxq->fl, |
| 1674 | 1); |
| 1675 | rspq->offset = 0; |
| 1676 | } |
| 1677 | len = RSPD_LEN(len); |
| 1678 | } |
Casey Leedom | b94e72e | 2010-11-11 09:06:49 +0000 | [diff] [blame] | 1679 | gl.tot_len = len; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1680 | |
| 1681 | /* |
| 1682 | * Gather packet fragments. |
| 1683 | */ |
| 1684 | for (frag = 0, fp = gl.frags; /**/; frag++, fp++) { |
| 1685 | BUG_ON(frag >= MAX_SKB_FRAGS); |
| 1686 | BUG_ON(rxq->fl.avail == 0); |
| 1687 | sdesc = &rxq->fl.sdesc[rxq->fl.cidx]; |
| 1688 | bufsz = get_buf_size(sdesc); |
| 1689 | fp->page = sdesc->page; |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1690 | fp->offset = rspq->offset; |
| 1691 | fp->size = min(bufsz, len); |
| 1692 | len -= fp->size; |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1693 | if (!len) |
| 1694 | break; |
| 1695 | unmap_rx_buf(rspq->adapter, &rxq->fl); |
| 1696 | } |
| 1697 | gl.nfrags = frag+1; |
| 1698 | |
| 1699 | /* |
| 1700 | * Last buffer remains mapped so explicitly make it |
| 1701 | * coherent for CPU access and start preloading first |
| 1702 | * cache line ... |
| 1703 | */ |
| 1704 | dma_sync_single_for_cpu(rspq->adapter->pdev_dev, |
| 1705 | get_buf_addr(sdesc), |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1706 | fp->size, DMA_FROM_DEVICE); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1707 | gl.va = (page_address(gl.frags[0].page) + |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1708 | gl.frags[0].offset); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1709 | prefetch(gl.va); |
| 1710 | |
| 1711 | /* |
| 1712 | * Hand the new ingress packet to the handler for |
| 1713 | * this Response Queue. |
| 1714 | */ |
| 1715 | ret = rspq->handler(rspq, rspq->cur_desc, &gl); |
| 1716 | if (likely(ret == 0)) |
Ian Campbell | a0006a8 | 2011-10-19 23:01:47 +0000 | [diff] [blame] | 1717 | rspq->offset += ALIGN(fp->size, FL_ALIGN); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1718 | else |
| 1719 | restore_rx_bufs(&gl, &rxq->fl, frag); |
| 1720 | } else if (likely(rsp_type == RSP_TYPE_CPL)) { |
| 1721 | ret = rspq->handler(rspq, rspq->cur_desc, NULL); |
| 1722 | } else { |
| 1723 | WARN_ON(rsp_type > RSP_TYPE_CPL); |
| 1724 | ret = 0; |
| 1725 | } |
| 1726 | |
| 1727 | if (unlikely(ret)) { |
| 1728 | /* |
| 1729 | * Couldn't process descriptor, back off for recovery. |
| 1730 | * We use the SGE's last timer which has the longest |
| 1731 | * interrupt coalescing value ... |
| 1732 | */ |
| 1733 | const int NOMEM_TIMER_IDX = SGE_NTIMERS-1; |
| 1734 | rspq->next_intr_params = |
| 1735 | QINTR_TIMER_IDX(NOMEM_TIMER_IDX); |
| 1736 | break; |
| 1737 | } |
| 1738 | |
| 1739 | rspq_next(rspq); |
| 1740 | budget_left--; |
| 1741 | } |
| 1742 | |
| 1743 | /* |
| 1744 | * If this is a Response Queue with an associated Free List and |
| 1745 | * at least two Egress Queue units available in the Free List |
| 1746 | * for new buffer pointers, refill the Free List. |
| 1747 | */ |
| 1748 | if (rspq->offset >= 0 && |
| 1749 | rxq->fl.size - rxq->fl.avail >= 2*FL_PER_EQ_UNIT) |
| 1750 | __refill_fl(rspq->adapter, &rxq->fl); |
| 1751 | return budget - budget_left; |
| 1752 | } |
| 1753 | |
| 1754 | /** |
| 1755 | * napi_rx_handler - the NAPI handler for RX processing |
| 1756 | * @napi: the napi instance |
| 1757 | * @budget: how many packets we can process in this round |
| 1758 | * |
| 1759 | * Handler for new data events when using NAPI. This does not need any |
| 1760 | * locking or protection from interrupts as data interrupts are off at |
| 1761 | * this point and other adapter interrupts do not interfere (the latter |
| 1762 | * in not a concern at all with MSI-X as non-data interrupts then have |
| 1763 | * a separate handler). |
| 1764 | */ |
| 1765 | static int napi_rx_handler(struct napi_struct *napi, int budget) |
| 1766 | { |
| 1767 | unsigned int intr_params; |
| 1768 | struct sge_rspq *rspq = container_of(napi, struct sge_rspq, napi); |
| 1769 | int work_done = process_responses(rspq, budget); |
| 1770 | |
| 1771 | if (likely(work_done < budget)) { |
| 1772 | napi_complete(napi); |
| 1773 | intr_params = rspq->next_intr_params; |
| 1774 | rspq->next_intr_params = rspq->intr_params; |
| 1775 | } else |
| 1776 | intr_params = QINTR_TIMER_IDX(SGE_TIMER_UPD_CIDX); |
| 1777 | |
Casey Leedom | 68dc9d3 | 2010-07-08 10:05:48 -0700 | [diff] [blame] | 1778 | if (unlikely(work_done == 0)) |
| 1779 | rspq->unhandled_irqs++; |
| 1780 | |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 1781 | t4_write_reg(rspq->adapter, |
| 1782 | T4VF_SGE_BASE_ADDR + SGE_VF_GTS, |
| 1783 | CIDXINC(work_done) | |
| 1784 | INGRESSQID((u32)rspq->cntxt_id) | |
| 1785 | SEINTARM(intr_params)); |
| 1786 | return work_done; |
| 1787 | } |
| 1788 | |
| 1789 | /* |
| 1790 | * The MSI-X interrupt handler for an SGE response queue for the NAPI case |
| 1791 | * (i.e., response queue serviced by NAPI polling). |
| 1792 | */ |
| 1793 | irqreturn_t t4vf_sge_intr_msix(int irq, void *cookie) |
| 1794 | { |
| 1795 | struct sge_rspq *rspq = cookie; |
| 1796 | |
| 1797 | napi_schedule(&rspq->napi); |
| 1798 | return IRQ_HANDLED; |
| 1799 | } |
| 1800 | |
| 1801 | /* |
| 1802 | * Process the indirect interrupt entries in the interrupt queue and kick off |
| 1803 | * NAPI for each queue that has generated an entry. |
| 1804 | */ |
| 1805 | static unsigned int process_intrq(struct adapter *adapter) |
| 1806 | { |
| 1807 | struct sge *s = &adapter->sge; |
| 1808 | struct sge_rspq *intrq = &s->intrq; |
| 1809 | unsigned int work_done; |
| 1810 | |
| 1811 | spin_lock(&adapter->sge.intrq_lock); |
| 1812 | for (work_done = 0; ; work_done++) { |
| 1813 | const struct rsp_ctrl *rc; |
| 1814 | unsigned int qid, iq_idx; |
| 1815 | struct sge_rspq *rspq; |
| 1816 | |
| 1817 | /* |
| 1818 | * Grab the next response from the interrupt queue and bail |
| 1819 | * out if it's not a new response. |
| 1820 | */ |
| 1821 | rc = (void *)intrq->cur_desc + (intrq->iqe_len - sizeof(*rc)); |
| 1822 | if (!is_new_response(rc, intrq)) |
| 1823 | break; |
| 1824 | |
| 1825 | /* |
| 1826 | * If the response isn't a forwarded interrupt message issue a |
| 1827 | * error and go on to the next response message. This should |
| 1828 | * never happen ... |
| 1829 | */ |
| 1830 | rmb(); |
| 1831 | if (unlikely(RSPD_TYPE(rc->type_gen) != RSP_TYPE_INTR)) { |
| 1832 | dev_err(adapter->pdev_dev, |
| 1833 | "Unexpected INTRQ response type %d\n", |
| 1834 | RSPD_TYPE(rc->type_gen)); |
| 1835 | continue; |
| 1836 | } |
| 1837 | |
| 1838 | /* |
| 1839 | * Extract the Queue ID from the interrupt message and perform |
| 1840 | * sanity checking to make sure it really refers to one of our |
| 1841 | * Ingress Queues which is active and matches the queue's ID. |
| 1842 | * None of these error conditions should ever happen so we may |
| 1843 | * want to either make them fatal and/or conditionalized under |
| 1844 | * DEBUG. |
| 1845 | */ |
| 1846 | qid = RSPD_QID(be32_to_cpu(rc->pldbuflen_qid)); |
| 1847 | iq_idx = IQ_IDX(s, qid); |
| 1848 | if (unlikely(iq_idx >= MAX_INGQ)) { |
| 1849 | dev_err(adapter->pdev_dev, |
| 1850 | "Ingress QID %d out of range\n", qid); |
| 1851 | continue; |
| 1852 | } |
| 1853 | rspq = s->ingr_map[iq_idx]; |
| 1854 | if (unlikely(rspq == NULL)) { |
| 1855 | dev_err(adapter->pdev_dev, |
| 1856 | "Ingress QID %d RSPQ=NULL\n", qid); |
| 1857 | continue; |
| 1858 | } |
| 1859 | if (unlikely(rspq->abs_id != qid)) { |
| 1860 | dev_err(adapter->pdev_dev, |
| 1861 | "Ingress QID %d refers to RSPQ %d\n", |
| 1862 | qid, rspq->abs_id); |
| 1863 | continue; |
| 1864 | } |
| 1865 | |
| 1866 | /* |
| 1867 | * Schedule NAPI processing on the indicated Response Queue |
| 1868 | * and move on to the next entry in the Forwarded Interrupt |
| 1869 | * Queue. |
| 1870 | */ |
| 1871 | napi_schedule(&rspq->napi); |
| 1872 | rspq_next(intrq); |
| 1873 | } |
| 1874 | |
| 1875 | t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS, |
| 1876 | CIDXINC(work_done) | |
| 1877 | INGRESSQID(intrq->cntxt_id) | |
| 1878 | SEINTARM(intrq->intr_params)); |
| 1879 | |
| 1880 | spin_unlock(&adapter->sge.intrq_lock); |
| 1881 | |
| 1882 | return work_done; |
| 1883 | } |
| 1884 | |
| 1885 | /* |
| 1886 | * The MSI interrupt handler handles data events from SGE response queues as |
| 1887 | * well as error and other async events as they all use the same MSI vector. |
| 1888 | */ |
| 1889 | irqreturn_t t4vf_intr_msi(int irq, void *cookie) |
| 1890 | { |
| 1891 | struct adapter *adapter = cookie; |
| 1892 | |
| 1893 | process_intrq(adapter); |
| 1894 | return IRQ_HANDLED; |
| 1895 | } |
| 1896 | |
| 1897 | /** |
| 1898 | * t4vf_intr_handler - select the top-level interrupt handler |
| 1899 | * @adapter: the adapter |
| 1900 | * |
| 1901 | * Selects the top-level interrupt handler based on the type of interrupts |
| 1902 | * (MSI-X or MSI). |
| 1903 | */ |
| 1904 | irq_handler_t t4vf_intr_handler(struct adapter *adapter) |
| 1905 | { |
| 1906 | BUG_ON((adapter->flags & (USING_MSIX|USING_MSI)) == 0); |
| 1907 | if (adapter->flags & USING_MSIX) |
| 1908 | return t4vf_sge_intr_msix; |
| 1909 | else |
| 1910 | return t4vf_intr_msi; |
| 1911 | } |
| 1912 | |
| 1913 | /** |
| 1914 | * sge_rx_timer_cb - perform periodic maintenance of SGE RX queues |
| 1915 | * @data: the adapter |
| 1916 | * |
| 1917 | * Runs periodically from a timer to perform maintenance of SGE RX queues. |
| 1918 | * |
| 1919 | * a) Replenishes RX queues that have run out due to memory shortage. |
| 1920 | * Normally new RX buffers are added when existing ones are consumed but |
| 1921 | * when out of memory a queue can become empty. We schedule NAPI to do |
| 1922 | * the actual refill. |
| 1923 | */ |
| 1924 | static void sge_rx_timer_cb(unsigned long data) |
| 1925 | { |
| 1926 | struct adapter *adapter = (struct adapter *)data; |
| 1927 | struct sge *s = &adapter->sge; |
| 1928 | unsigned int i; |
| 1929 | |
| 1930 | /* |
| 1931 | * Scan the "Starving Free Lists" flag array looking for any Free |
| 1932 | * Lists in need of more free buffers. If we find one and it's not |
| 1933 | * being actively polled, then bump its "starving" counter and attempt |
| 1934 | * to refill it. If we're successful in adding enough buffers to push |
| 1935 | * the Free List over the starving threshold, then we can clear its |
| 1936 | * "starving" status. |
| 1937 | */ |
| 1938 | for (i = 0; i < ARRAY_SIZE(s->starving_fl); i++) { |
| 1939 | unsigned long m; |
| 1940 | |
| 1941 | for (m = s->starving_fl[i]; m; m &= m - 1) { |
| 1942 | unsigned int id = __ffs(m) + i * BITS_PER_LONG; |
| 1943 | struct sge_fl *fl = s->egr_map[id]; |
| 1944 | |
| 1945 | clear_bit(id, s->starving_fl); |
| 1946 | smp_mb__after_clear_bit(); |
| 1947 | |
| 1948 | /* |
| 1949 | * Since we are accessing fl without a lock there's a |
| 1950 | * small probability of a false positive where we |
| 1951 | * schedule napi but the FL is no longer starving. |
| 1952 | * No biggie. |
| 1953 | */ |
| 1954 | if (fl_starving(fl)) { |
| 1955 | struct sge_eth_rxq *rxq; |
| 1956 | |
| 1957 | rxq = container_of(fl, struct sge_eth_rxq, fl); |
| 1958 | if (napi_reschedule(&rxq->rspq.napi)) |
| 1959 | fl->starving++; |
| 1960 | else |
| 1961 | set_bit(id, s->starving_fl); |
| 1962 | } |
| 1963 | } |
| 1964 | } |
| 1965 | |
| 1966 | /* |
| 1967 | * Reschedule the next scan for starving Free Lists ... |
| 1968 | */ |
| 1969 | mod_timer(&s->rx_timer, jiffies + RX_QCHECK_PERIOD); |
| 1970 | } |
| 1971 | |
| 1972 | /** |
| 1973 | * sge_tx_timer_cb - perform periodic maintenance of SGE Tx queues |
| 1974 | * @data: the adapter |
| 1975 | * |
| 1976 | * Runs periodically from a timer to perform maintenance of SGE TX queues. |
| 1977 | * |
| 1978 | * b) Reclaims completed Tx packets for the Ethernet queues. Normally |
| 1979 | * packets are cleaned up by new Tx packets, this timer cleans up packets |
| 1980 | * when no new packets are being submitted. This is essential for pktgen, |
| 1981 | * at least. |
| 1982 | */ |
| 1983 | static void sge_tx_timer_cb(unsigned long data) |
| 1984 | { |
| 1985 | struct adapter *adapter = (struct adapter *)data; |
| 1986 | struct sge *s = &adapter->sge; |
| 1987 | unsigned int i, budget; |
| 1988 | |
| 1989 | budget = MAX_TIMER_TX_RECLAIM; |
| 1990 | i = s->ethtxq_rover; |
| 1991 | do { |
| 1992 | struct sge_eth_txq *txq = &s->ethtxq[i]; |
| 1993 | |
| 1994 | if (reclaimable(&txq->q) && __netif_tx_trylock(txq->txq)) { |
| 1995 | int avail = reclaimable(&txq->q); |
| 1996 | |
| 1997 | if (avail > budget) |
| 1998 | avail = budget; |
| 1999 | |
| 2000 | free_tx_desc(adapter, &txq->q, avail, true); |
| 2001 | txq->q.in_use -= avail; |
| 2002 | __netif_tx_unlock(txq->txq); |
| 2003 | |
| 2004 | budget -= avail; |
| 2005 | if (!budget) |
| 2006 | break; |
| 2007 | } |
| 2008 | |
| 2009 | i++; |
| 2010 | if (i >= s->ethqsets) |
| 2011 | i = 0; |
| 2012 | } while (i != s->ethtxq_rover); |
| 2013 | s->ethtxq_rover = i; |
| 2014 | |
| 2015 | /* |
| 2016 | * If we found too many reclaimable packets schedule a timer in the |
| 2017 | * near future to continue where we left off. Otherwise the next timer |
| 2018 | * will be at its normal interval. |
| 2019 | */ |
| 2020 | mod_timer(&s->tx_timer, jiffies + (budget ? TX_QCHECK_PERIOD : 2)); |
| 2021 | } |
| 2022 | |
| 2023 | /** |
| 2024 | * t4vf_sge_alloc_rxq - allocate an SGE RX Queue |
| 2025 | * @adapter: the adapter |
| 2026 | * @rspq: pointer to to the new rxq's Response Queue to be filled in |
| 2027 | * @iqasynch: if 0, a normal rspq; if 1, an asynchronous event queue |
| 2028 | * @dev: the network device associated with the new rspq |
| 2029 | * @intr_dest: MSI-X vector index (overriden in MSI mode) |
| 2030 | * @fl: pointer to the new rxq's Free List to be filled in |
| 2031 | * @hnd: the interrupt handler to invoke for the rspq |
| 2032 | */ |
| 2033 | int t4vf_sge_alloc_rxq(struct adapter *adapter, struct sge_rspq *rspq, |
| 2034 | bool iqasynch, struct net_device *dev, |
| 2035 | int intr_dest, |
| 2036 | struct sge_fl *fl, rspq_handler_t hnd) |
| 2037 | { |
| 2038 | struct port_info *pi = netdev_priv(dev); |
| 2039 | struct fw_iq_cmd cmd, rpl; |
| 2040 | int ret, iqandst, flsz = 0; |
| 2041 | |
| 2042 | /* |
| 2043 | * If we're using MSI interrupts and we're not initializing the |
| 2044 | * Forwarded Interrupt Queue itself, then set up this queue for |
| 2045 | * indirect interrupts to the Forwarded Interrupt Queue. Obviously |
| 2046 | * the Forwarded Interrupt Queue must be set up before any other |
| 2047 | * ingress queue ... |
| 2048 | */ |
| 2049 | if ((adapter->flags & USING_MSI) && rspq != &adapter->sge.intrq) { |
| 2050 | iqandst = SGE_INTRDST_IQ; |
| 2051 | intr_dest = adapter->sge.intrq.abs_id; |
| 2052 | } else |
| 2053 | iqandst = SGE_INTRDST_PCI; |
| 2054 | |
| 2055 | /* |
| 2056 | * Allocate the hardware ring for the Response Queue. The size needs |
| 2057 | * to be a multiple of 16 which includes the mandatory status entry |
| 2058 | * (regardless of whether the Status Page capabilities are enabled or |
| 2059 | * not). |
| 2060 | */ |
| 2061 | rspq->size = roundup(rspq->size, 16); |
| 2062 | rspq->desc = alloc_ring(adapter->pdev_dev, rspq->size, rspq->iqe_len, |
| 2063 | 0, &rspq->phys_addr, NULL, 0); |
| 2064 | if (!rspq->desc) |
| 2065 | return -ENOMEM; |
| 2066 | |
| 2067 | /* |
| 2068 | * Fill in the Ingress Queue Command. Note: Ideally this code would |
| 2069 | * be in t4vf_hw.c but there are so many parameters and dependencies |
| 2070 | * on our Linux SGE state that we would end up having to pass tons of |
| 2071 | * parameters. We'll have to think about how this might be migrated |
| 2072 | * into OS-independent common code ... |
| 2073 | */ |
| 2074 | memset(&cmd, 0, sizeof(cmd)); |
| 2075 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_IQ_CMD) | |
| 2076 | FW_CMD_REQUEST | |
| 2077 | FW_CMD_WRITE | |
| 2078 | FW_CMD_EXEC); |
| 2079 | cmd.alloc_to_len16 = cpu_to_be32(FW_IQ_CMD_ALLOC | |
| 2080 | FW_IQ_CMD_IQSTART(1) | |
| 2081 | FW_LEN16(cmd)); |
| 2082 | cmd.type_to_iqandstindex = |
| 2083 | cpu_to_be32(FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) | |
| 2084 | FW_IQ_CMD_IQASYNCH(iqasynch) | |
| 2085 | FW_IQ_CMD_VIID(pi->viid) | |
| 2086 | FW_IQ_CMD_IQANDST(iqandst) | |
| 2087 | FW_IQ_CMD_IQANUS(1) | |
| 2088 | FW_IQ_CMD_IQANUD(SGE_UPDATEDEL_INTR) | |
| 2089 | FW_IQ_CMD_IQANDSTINDEX(intr_dest)); |
| 2090 | cmd.iqdroprss_to_iqesize = |
| 2091 | cpu_to_be16(FW_IQ_CMD_IQPCIECH(pi->port_id) | |
| 2092 | FW_IQ_CMD_IQGTSMODE | |
| 2093 | FW_IQ_CMD_IQINTCNTTHRESH(rspq->pktcnt_idx) | |
| 2094 | FW_IQ_CMD_IQESIZE(ilog2(rspq->iqe_len) - 4)); |
| 2095 | cmd.iqsize = cpu_to_be16(rspq->size); |
| 2096 | cmd.iqaddr = cpu_to_be64(rspq->phys_addr); |
| 2097 | |
| 2098 | if (fl) { |
| 2099 | /* |
| 2100 | * Allocate the ring for the hardware free list (with space |
| 2101 | * for its status page) along with the associated software |
| 2102 | * descriptor ring. The free list size needs to be a multiple |
| 2103 | * of the Egress Queue Unit. |
| 2104 | */ |
| 2105 | fl->size = roundup(fl->size, FL_PER_EQ_UNIT); |
| 2106 | fl->desc = alloc_ring(adapter->pdev_dev, fl->size, |
| 2107 | sizeof(__be64), sizeof(struct rx_sw_desc), |
| 2108 | &fl->addr, &fl->sdesc, STAT_LEN); |
| 2109 | if (!fl->desc) { |
| 2110 | ret = -ENOMEM; |
| 2111 | goto err; |
| 2112 | } |
| 2113 | |
| 2114 | /* |
| 2115 | * Calculate the size of the hardware free list ring plus |
Casey Leedom | caedda3 | 2010-11-11 09:30:40 +0000 | [diff] [blame] | 2116 | * Status Page (which the SGE will place after the end of the |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2117 | * free list ring) in Egress Queue Units. |
| 2118 | */ |
| 2119 | flsz = (fl->size / FL_PER_EQ_UNIT + |
| 2120 | STAT_LEN / EQ_UNIT); |
| 2121 | |
| 2122 | /* |
| 2123 | * Fill in all the relevant firmware Ingress Queue Command |
| 2124 | * fields for the free list. |
| 2125 | */ |
| 2126 | cmd.iqns_to_fl0congen = |
| 2127 | cpu_to_be32( |
| 2128 | FW_IQ_CMD_FL0HOSTFCMODE(SGE_HOSTFCMODE_NONE) | |
Naresh Kumar Inna | ce91a92 | 2012-11-15 22:41:17 +0530 | [diff] [blame] | 2129 | FW_IQ_CMD_FL0PACKEN(1) | |
| 2130 | FW_IQ_CMD_FL0PADEN(1)); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2131 | cmd.fl0dcaen_to_fl0cidxfthresh = |
| 2132 | cpu_to_be16( |
| 2133 | FW_IQ_CMD_FL0FBMIN(SGE_FETCHBURSTMIN_64B) | |
| 2134 | FW_IQ_CMD_FL0FBMAX(SGE_FETCHBURSTMAX_512B)); |
| 2135 | cmd.fl0size = cpu_to_be16(flsz); |
| 2136 | cmd.fl0addr = cpu_to_be64(fl->addr); |
| 2137 | } |
| 2138 | |
| 2139 | /* |
| 2140 | * Issue the firmware Ingress Queue Command and extract the results if |
| 2141 | * it completes successfully. |
| 2142 | */ |
| 2143 | ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); |
| 2144 | if (ret) |
| 2145 | goto err; |
| 2146 | |
| 2147 | netif_napi_add(dev, &rspq->napi, napi_rx_handler, 64); |
| 2148 | rspq->cur_desc = rspq->desc; |
| 2149 | rspq->cidx = 0; |
| 2150 | rspq->gen = 1; |
| 2151 | rspq->next_intr_params = rspq->intr_params; |
| 2152 | rspq->cntxt_id = be16_to_cpu(rpl.iqid); |
| 2153 | rspq->abs_id = be16_to_cpu(rpl.physiqid); |
| 2154 | rspq->size--; /* subtract status entry */ |
| 2155 | rspq->adapter = adapter; |
| 2156 | rspq->netdev = dev; |
| 2157 | rspq->handler = hnd; |
| 2158 | |
| 2159 | /* set offset to -1 to distinguish ingress queues without FL */ |
| 2160 | rspq->offset = fl ? 0 : -1; |
| 2161 | |
| 2162 | if (fl) { |
| 2163 | fl->cntxt_id = be16_to_cpu(rpl.fl0id); |
| 2164 | fl->avail = 0; |
| 2165 | fl->pend_cred = 0; |
| 2166 | fl->pidx = 0; |
| 2167 | fl->cidx = 0; |
| 2168 | fl->alloc_failed = 0; |
| 2169 | fl->large_alloc_failed = 0; |
| 2170 | fl->starving = 0; |
| 2171 | refill_fl(adapter, fl, fl_cap(fl), GFP_KERNEL); |
| 2172 | } |
| 2173 | |
| 2174 | return 0; |
| 2175 | |
| 2176 | err: |
| 2177 | /* |
| 2178 | * An error occurred. Clean up our partial allocation state and |
| 2179 | * return the error. |
| 2180 | */ |
| 2181 | if (rspq->desc) { |
| 2182 | dma_free_coherent(adapter->pdev_dev, rspq->size * rspq->iqe_len, |
| 2183 | rspq->desc, rspq->phys_addr); |
| 2184 | rspq->desc = NULL; |
| 2185 | } |
| 2186 | if (fl && fl->desc) { |
| 2187 | kfree(fl->sdesc); |
| 2188 | fl->sdesc = NULL; |
| 2189 | dma_free_coherent(adapter->pdev_dev, flsz * EQ_UNIT, |
| 2190 | fl->desc, fl->addr); |
| 2191 | fl->desc = NULL; |
| 2192 | } |
| 2193 | return ret; |
| 2194 | } |
| 2195 | |
| 2196 | /** |
| 2197 | * t4vf_sge_alloc_eth_txq - allocate an SGE Ethernet TX Queue |
| 2198 | * @adapter: the adapter |
| 2199 | * @txq: pointer to the new txq to be filled in |
| 2200 | * @devq: the network TX queue associated with the new txq |
| 2201 | * @iqid: the relative ingress queue ID to which events relating to |
| 2202 | * the new txq should be directed |
| 2203 | */ |
| 2204 | int t4vf_sge_alloc_eth_txq(struct adapter *adapter, struct sge_eth_txq *txq, |
| 2205 | struct net_device *dev, struct netdev_queue *devq, |
| 2206 | unsigned int iqid) |
| 2207 | { |
| 2208 | int ret, nentries; |
| 2209 | struct fw_eq_eth_cmd cmd, rpl; |
| 2210 | struct port_info *pi = netdev_priv(dev); |
| 2211 | |
| 2212 | /* |
Casey Leedom | caedda3 | 2010-11-11 09:30:40 +0000 | [diff] [blame] | 2213 | * Calculate the size of the hardware TX Queue (including the Status |
| 2214 | * Page on the end of the TX Queue) in units of TX Descriptors. |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2215 | */ |
| 2216 | nentries = txq->q.size + STAT_LEN / sizeof(struct tx_desc); |
| 2217 | |
| 2218 | /* |
| 2219 | * Allocate the hardware ring for the TX ring (with space for its |
| 2220 | * status page) along with the associated software descriptor ring. |
| 2221 | */ |
| 2222 | txq->q.desc = alloc_ring(adapter->pdev_dev, txq->q.size, |
| 2223 | sizeof(struct tx_desc), |
| 2224 | sizeof(struct tx_sw_desc), |
| 2225 | &txq->q.phys_addr, &txq->q.sdesc, STAT_LEN); |
| 2226 | if (!txq->q.desc) |
| 2227 | return -ENOMEM; |
| 2228 | |
| 2229 | /* |
| 2230 | * Fill in the Egress Queue Command. Note: As with the direct use of |
| 2231 | * the firmware Ingress Queue COmmand above in our RXQ allocation |
| 2232 | * routine, ideally, this code would be in t4vf_hw.c. Again, we'll |
| 2233 | * have to see if there's some reasonable way to parameterize it |
| 2234 | * into the common code ... |
| 2235 | */ |
| 2236 | memset(&cmd, 0, sizeof(cmd)); |
| 2237 | cmd.op_to_vfn = cpu_to_be32(FW_CMD_OP(FW_EQ_ETH_CMD) | |
| 2238 | FW_CMD_REQUEST | |
| 2239 | FW_CMD_WRITE | |
| 2240 | FW_CMD_EXEC); |
| 2241 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_ALLOC | |
| 2242 | FW_EQ_ETH_CMD_EQSTART | |
| 2243 | FW_LEN16(cmd)); |
| 2244 | cmd.viid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_VIID(pi->viid)); |
| 2245 | cmd.fetchszm_to_iqid = |
| 2246 | cpu_to_be32(FW_EQ_ETH_CMD_HOSTFCMODE(SGE_HOSTFCMODE_STPG) | |
| 2247 | FW_EQ_ETH_CMD_PCIECHN(pi->port_id) | |
| 2248 | FW_EQ_ETH_CMD_IQID(iqid)); |
| 2249 | cmd.dcaen_to_eqsize = |
| 2250 | cpu_to_be32(FW_EQ_ETH_CMD_FBMIN(SGE_FETCHBURSTMIN_64B) | |
| 2251 | FW_EQ_ETH_CMD_FBMAX(SGE_FETCHBURSTMAX_512B) | |
| 2252 | FW_EQ_ETH_CMD_CIDXFTHRESH(SGE_CIDXFLUSHTHRESH_32) | |
| 2253 | FW_EQ_ETH_CMD_EQSIZE(nentries)); |
| 2254 | cmd.eqaddr = cpu_to_be64(txq->q.phys_addr); |
| 2255 | |
| 2256 | /* |
| 2257 | * Issue the firmware Egress Queue Command and extract the results if |
| 2258 | * it completes successfully. |
| 2259 | */ |
| 2260 | ret = t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), &rpl); |
| 2261 | if (ret) { |
| 2262 | /* |
| 2263 | * The girmware Ingress Queue Command failed for some reason. |
| 2264 | * Free up our partial allocation state and return the error. |
| 2265 | */ |
| 2266 | kfree(txq->q.sdesc); |
| 2267 | txq->q.sdesc = NULL; |
| 2268 | dma_free_coherent(adapter->pdev_dev, |
| 2269 | nentries * sizeof(struct tx_desc), |
| 2270 | txq->q.desc, txq->q.phys_addr); |
| 2271 | txq->q.desc = NULL; |
| 2272 | return ret; |
| 2273 | } |
| 2274 | |
| 2275 | txq->q.in_use = 0; |
| 2276 | txq->q.cidx = 0; |
| 2277 | txq->q.pidx = 0; |
| 2278 | txq->q.stat = (void *)&txq->q.desc[txq->q.size]; |
| 2279 | txq->q.cntxt_id = FW_EQ_ETH_CMD_EQID_GET(be32_to_cpu(rpl.eqid_pkd)); |
| 2280 | txq->q.abs_id = |
| 2281 | FW_EQ_ETH_CMD_PHYSEQID_GET(be32_to_cpu(rpl.physeqid_pkd)); |
| 2282 | txq->txq = devq; |
| 2283 | txq->tso = 0; |
| 2284 | txq->tx_cso = 0; |
| 2285 | txq->vlan_ins = 0; |
| 2286 | txq->q.stops = 0; |
| 2287 | txq->q.restarts = 0; |
| 2288 | txq->mapping_err = 0; |
| 2289 | return 0; |
| 2290 | } |
| 2291 | |
| 2292 | /* |
| 2293 | * Free the DMA map resources associated with a TX queue. |
| 2294 | */ |
| 2295 | static void free_txq(struct adapter *adapter, struct sge_txq *tq) |
| 2296 | { |
| 2297 | dma_free_coherent(adapter->pdev_dev, |
| 2298 | tq->size * sizeof(*tq->desc) + STAT_LEN, |
| 2299 | tq->desc, tq->phys_addr); |
| 2300 | tq->cntxt_id = 0; |
| 2301 | tq->sdesc = NULL; |
| 2302 | tq->desc = NULL; |
| 2303 | } |
| 2304 | |
| 2305 | /* |
| 2306 | * Free the resources associated with a response queue (possibly including a |
| 2307 | * free list). |
| 2308 | */ |
| 2309 | static void free_rspq_fl(struct adapter *adapter, struct sge_rspq *rspq, |
| 2310 | struct sge_fl *fl) |
| 2311 | { |
| 2312 | unsigned int flid = fl ? fl->cntxt_id : 0xffff; |
| 2313 | |
| 2314 | t4vf_iq_free(adapter, FW_IQ_TYPE_FL_INT_CAP, |
| 2315 | rspq->cntxt_id, flid, 0xffff); |
| 2316 | dma_free_coherent(adapter->pdev_dev, (rspq->size + 1) * rspq->iqe_len, |
| 2317 | rspq->desc, rspq->phys_addr); |
| 2318 | netif_napi_del(&rspq->napi); |
| 2319 | rspq->netdev = NULL; |
| 2320 | rspq->cntxt_id = 0; |
| 2321 | rspq->abs_id = 0; |
| 2322 | rspq->desc = NULL; |
| 2323 | |
| 2324 | if (fl) { |
| 2325 | free_rx_bufs(adapter, fl, fl->avail); |
| 2326 | dma_free_coherent(adapter->pdev_dev, |
| 2327 | fl->size * sizeof(*fl->desc) + STAT_LEN, |
| 2328 | fl->desc, fl->addr); |
| 2329 | kfree(fl->sdesc); |
| 2330 | fl->sdesc = NULL; |
| 2331 | fl->cntxt_id = 0; |
| 2332 | fl->desc = NULL; |
| 2333 | } |
| 2334 | } |
| 2335 | |
| 2336 | /** |
| 2337 | * t4vf_free_sge_resources - free SGE resources |
| 2338 | * @adapter: the adapter |
| 2339 | * |
| 2340 | * Frees resources used by the SGE queue sets. |
| 2341 | */ |
| 2342 | void t4vf_free_sge_resources(struct adapter *adapter) |
| 2343 | { |
| 2344 | struct sge *s = &adapter->sge; |
| 2345 | struct sge_eth_rxq *rxq = s->ethrxq; |
| 2346 | struct sge_eth_txq *txq = s->ethtxq; |
| 2347 | struct sge_rspq *evtq = &s->fw_evtq; |
| 2348 | struct sge_rspq *intrq = &s->intrq; |
| 2349 | int qs; |
| 2350 | |
Casey Leedom | b97d13a | 2010-07-15 22:47:06 -0700 | [diff] [blame] | 2351 | for (qs = 0; qs < adapter->sge.ethqsets; qs++, rxq++, txq++) { |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2352 | if (rxq->rspq.desc) |
| 2353 | free_rspq_fl(adapter, &rxq->rspq, &rxq->fl); |
| 2354 | if (txq->q.desc) { |
| 2355 | t4vf_eth_eq_free(adapter, txq->q.cntxt_id); |
| 2356 | free_tx_desc(adapter, &txq->q, txq->q.in_use, true); |
| 2357 | kfree(txq->q.sdesc); |
| 2358 | free_txq(adapter, &txq->q); |
| 2359 | } |
| 2360 | } |
| 2361 | if (evtq->desc) |
| 2362 | free_rspq_fl(adapter, evtq, NULL); |
| 2363 | if (intrq->desc) |
| 2364 | free_rspq_fl(adapter, intrq, NULL); |
| 2365 | } |
| 2366 | |
| 2367 | /** |
| 2368 | * t4vf_sge_start - enable SGE operation |
| 2369 | * @adapter: the adapter |
| 2370 | * |
| 2371 | * Start tasklets and timers associated with the DMA engine. |
| 2372 | */ |
| 2373 | void t4vf_sge_start(struct adapter *adapter) |
| 2374 | { |
| 2375 | adapter->sge.ethtxq_rover = 0; |
| 2376 | mod_timer(&adapter->sge.rx_timer, jiffies + RX_QCHECK_PERIOD); |
| 2377 | mod_timer(&adapter->sge.tx_timer, jiffies + TX_QCHECK_PERIOD); |
| 2378 | } |
| 2379 | |
| 2380 | /** |
| 2381 | * t4vf_sge_stop - disable SGE operation |
| 2382 | * @adapter: the adapter |
| 2383 | * |
| 2384 | * Stop tasklets and timers associated with the DMA engine. Note that |
| 2385 | * this is effective only if measures have been taken to disable any HW |
| 2386 | * events that may restart them. |
| 2387 | */ |
| 2388 | void t4vf_sge_stop(struct adapter *adapter) |
| 2389 | { |
| 2390 | struct sge *s = &adapter->sge; |
| 2391 | |
| 2392 | if (s->rx_timer.function) |
| 2393 | del_timer_sync(&s->rx_timer); |
| 2394 | if (s->tx_timer.function) |
| 2395 | del_timer_sync(&s->tx_timer); |
| 2396 | } |
| 2397 | |
| 2398 | /** |
| 2399 | * t4vf_sge_init - initialize SGE |
| 2400 | * @adapter: the adapter |
| 2401 | * |
| 2402 | * Performs SGE initialization needed every time after a chip reset. |
| 2403 | * We do not initialize any of the queue sets here, instead the driver |
| 2404 | * top-level must request those individually. We also do not enable DMA |
| 2405 | * here, that should be done after the queues have been set up. |
| 2406 | */ |
| 2407 | int t4vf_sge_init(struct adapter *adapter) |
| 2408 | { |
| 2409 | struct sge_params *sge_params = &adapter->params.sge; |
| 2410 | u32 fl0 = sge_params->sge_fl_buffer_size[0]; |
| 2411 | u32 fl1 = sge_params->sge_fl_buffer_size[1]; |
| 2412 | struct sge *s = &adapter->sge; |
| 2413 | |
| 2414 | /* |
| 2415 | * Start by vetting the basic SGE parameters which have been set up by |
| 2416 | * the Physical Function Driver. Ideally we should be able to deal |
| 2417 | * with _any_ configuration. Practice is different ... |
| 2418 | */ |
| 2419 | if (fl0 != PAGE_SIZE || (fl1 != 0 && fl1 <= fl0)) { |
| 2420 | dev_err(adapter->pdev_dev, "bad SGE FL buffer sizes [%d, %d]\n", |
| 2421 | fl0, fl1); |
| 2422 | return -EINVAL; |
| 2423 | } |
Vipul Pandya | 52367a7 | 2012-09-26 02:39:38 +0000 | [diff] [blame] | 2424 | if ((sge_params->sge_control & RXPKTCPLMODE_MASK) == 0) { |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2425 | dev_err(adapter->pdev_dev, "bad SGE CPL MODE\n"); |
| 2426 | return -EINVAL; |
| 2427 | } |
| 2428 | |
| 2429 | /* |
| 2430 | * Now translate the adapter parameters into our internal forms. |
| 2431 | */ |
| 2432 | if (fl1) |
| 2433 | FL_PG_ORDER = ilog2(fl1) - PAGE_SHIFT; |
Vipul Pandya | 52367a7 | 2012-09-26 02:39:38 +0000 | [diff] [blame] | 2434 | STAT_LEN = ((sge_params->sge_control & EGRSTATUSPAGESIZE_MASK) |
| 2435 | ? 128 : 64); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2436 | PKTSHIFT = PKTSHIFT_GET(sge_params->sge_control); |
| 2437 | FL_ALIGN = 1 << (INGPADBOUNDARY_GET(sge_params->sge_control) + |
Casey Leedom | b3003be | 2010-06-29 12:54:12 +0000 | [diff] [blame] | 2438 | SGE_INGPADBOUNDARY_SHIFT); |
Casey Leedom | c6e0d91 | 2010-06-25 12:13:28 +0000 | [diff] [blame] | 2439 | |
| 2440 | /* |
| 2441 | * Set up tasklet timers. |
| 2442 | */ |
| 2443 | setup_timer(&s->rx_timer, sge_rx_timer_cb, (unsigned long)adapter); |
| 2444 | setup_timer(&s->tx_timer, sge_tx_timer_cb, (unsigned long)adapter); |
| 2445 | |
| 2446 | /* |
| 2447 | * Initialize Forwarded Interrupt Queue lock. |
| 2448 | */ |
| 2449 | spin_lock_init(&s->intrq_lock); |
| 2450 | |
| 2451 | return 0; |
| 2452 | } |