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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: include/asm-blackfin/mach-bf537/blackfin.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Rev:
10 *
11 * Modified:
12 *
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; see the file COPYING.
28 * If not, write to the Free Software Foundation,
29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 */
31
32#ifndef _MACH_BLACKFIN_H_
33#define _MACH_BLACKFIN_H_
34
35#define BF537_FAMILY
36
37#include "bf537.h"
38#include "mem_map.h"
39#include "defBF534.h"
40#include "anomaly.h"
41
42#if defined(CONFIG_BF537) || defined(CONFIG_BF536)
43#include "defBF537.h"
44#endif
45
Mike Frysinger17082682007-07-25 11:50:42 +080046#if !defined(__ASSEMBLY__)
Bryan Wu1394f032007-05-06 14:50:22 -070047#include "cdefBF534.h"
48
49/* UART 0*/
50#define bfin_read_UART_THR() bfin_read_UART0_THR()
51#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
52#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
53#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
54#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
55#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
56#define bfin_read_UART_IER() bfin_read_UART0_IER()
57#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
58#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
59#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
60#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
61#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
62#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
63#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
64#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
65#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
66#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
67#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
68#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
69#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
70#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
71#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
72
73#if defined(CONFIG_BF537) || defined(CONFIG_BF536)
74#include "cdefBF537.h"
75#endif
76#endif
77
78/* MAP used DEFINES from BF533 to BF537 - so we don't need to change them in the driver, kernel, etc. */
79
80/* UART_IIR Register */
81#define STATUS(x) ((x << 1) & 0x06)
82#define STATUS_P1 0x02
83#define STATUS_P0 0x01
84
85/* UART 0*/
86
87/* DMA Channnel */
88#define bfin_read_CH_UART_RX() bfin_read_CH_UART0_RX()
89#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART0_RX(val)
90#define CH_UART_RX CH_UART0_RX
91#define bfin_read_CH_UART_TX() bfin_read_CH_UART0_TX()
92#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART0_TX(val)
93#define CH_UART_TX CH_UART0_TX
94
95/* System Interrupt Controller */
96#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART0_RX()
97#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART0_RX(val)
98#define IRQ_UART_RX IRQ_UART0_RX
99#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART0_TX()
100#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART0_TX(val)
101#define IRQ_UART_TX IRQ_UART0_TX
102#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART0_ERROR()
103#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART0_ERROR(val)
104#define IRQ_UART_ERROR IRQ_UART0_ERROR
105
106/* MMR Registers*/
107#define bfin_read_UART_THR() bfin_read_UART0_THR()
108#define bfin_write_UART_THR(val) bfin_write_UART0_THR(val)
109#define UART_THR UART0_THR
110#define bfin_read_UART_RBR() bfin_read_UART0_RBR()
111#define bfin_write_UART_RBR(val) bfin_write_UART0_RBR(val)
112#define UART_RBR UART0_RBR
113#define bfin_read_UART_DLL() bfin_read_UART0_DLL()
114#define bfin_write_UART_DLL(val) bfin_write_UART0_DLL(val)
115#define UART_DLL UART0_DLL
116#define bfin_read_UART_IER() bfin_read_UART0_IER()
117#define bfin_write_UART_IER(val) bfin_write_UART0_IER(val)
118#define UART_IER UART0_IER
119#define bfin_read_UART_DLH() bfin_read_UART0_DLH()
120#define bfin_write_UART_DLH(val) bfin_write_UART0_DLH(val)
121#define UART_DLH UART0_DLH
122#define bfin_read_UART_IIR() bfin_read_UART0_IIR()
123#define bfin_write_UART_IIR(val) bfin_write_UART0_IIR(val)
124#define UART_IIR UART0_IIR
125#define bfin_read_UART_LCR() bfin_read_UART0_LCR()
126#define bfin_write_UART_LCR(val) bfin_write_UART0_LCR(val)
127#define UART_LCR UART0_LCR
128#define bfin_read_UART_MCR() bfin_read_UART0_MCR()
129#define bfin_write_UART_MCR(val) bfin_write_UART0_MCR(val)
130#define UART_MCR UART0_MCR
131#define bfin_read_UART_LSR() bfin_read_UART0_LSR()
132#define bfin_write_UART_LSR(val) bfin_write_UART0_LSR(val)
133#define UART_LSR UART0_LSR
134#define bfin_read_UART_SCR() bfin_read_UART0_SCR()
135#define bfin_write_UART_SCR(val) bfin_write_UART0_SCR(val)
136#define UART_SCR UART0_SCR
137#define bfin_read_UART_GCTL() bfin_read_UART0_GCTL()
138#define bfin_write_UART_GCTL(val) bfin_write_UART0_GCTL(val)
139#define UART_GCTL UART0_GCTL
140
141/* DPMC*/
142#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
143#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)
144#define STOPCK_OFF STOPCK
145
Bryan Wu1394f032007-05-06 14:50:22 -0700146/* PLL_DIV Masks */
147#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */
148#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */
149#define CCLK_DIV4 CSEL_DIV4 /* CCLK = VCO / 4 */
150#define CCLK_DIV8 CSEL_DIV8 /* CCLK = VCO / 8 */
151
152#endif