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Marc Zyngieraa024c2f2013-01-20 18:28:13 -05001/*
2 * Copyright (C) 2012 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
Christoffer Dallcf5d31882014-10-16 17:00:18 +020018#include <linux/preempt.h>
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050019#include <linux/kvm_host.h>
20#include <linux/wait.h>
21
Marc Zyngier79c64882013-10-18 18:19:03 +010022#include <asm/cputype.h>
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050023#include <asm/kvm_emulate.h>
24#include <asm/kvm_psci.h>
Andre Przywara4429fc62014-06-02 15:37:13 +020025#include <asm/kvm_host.h>
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050026
27/*
28 * This is an implementation of the Power State Coordination Interface
29 * as described in ARM document number ARM DEN 0022A.
30 */
31
Anup Patele6bc13c2014-04-29 11:24:21 +053032#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
33
34static unsigned long psci_affinity_mask(unsigned long affinity_level)
35{
36 if (affinity_level <= 3)
37 return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
38
39 return 0;
40}
41
Anup Patelb376d022014-04-29 11:24:24 +053042static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
43{
44 /*
45 * NOTE: For simplicity, we make VCPU suspend emulation to be
46 * same-as WFI (Wait-for-interrupt) emulation.
47 *
48 * This means for KVM the wakeup events are interrupts and
49 * this is consistent with intended use of StateID as described
50 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
51 *
52 * Further, we also treat power-down request to be same as
53 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
54 * specification (ARM DEN 0022A). This means all suspend states
55 * for KVM will preserve the register state.
56 */
57 kvm_vcpu_block(vcpu);
58
59 return PSCI_RET_SUCCESS;
60}
61
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050062static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
63{
64 vcpu->arch.pause = true;
65}
66
67static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
68{
69 struct kvm *kvm = source_vcpu->kvm;
Andre Przywara4429fc62014-06-02 15:37:13 +020070 struct kvm_vcpu *vcpu = NULL;
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050071 wait_queue_head_t *wq;
72 unsigned long cpu_id;
Anup Patelaa8aeef2014-04-29 11:24:23 +053073 unsigned long context_id;
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050074 phys_addr_t target_pc;
75
Andre Przywara4429fc62014-06-02 15:37:13 +020076 cpu_id = *vcpu_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050077 if (vcpu_mode_is_32bit(source_vcpu))
78 cpu_id &= ~((u32) 0);
79
Andre Przywara4429fc62014-06-02 15:37:13 +020080 vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
Marc Zyngier79c64882013-10-18 18:19:03 +010081
Christoffer Dall478a8232013-11-19 17:43:19 -080082 /*
83 * Make sure the caller requested a valid CPU and that the CPU is
84 * turned off.
85 */
Anup Patelaa8aeef2014-04-29 11:24:23 +053086 if (!vcpu)
Anup Patel7d0f84a2014-04-29 11:24:16 +053087 return PSCI_RET_INVALID_PARAMS;
Anup Patelaa8aeef2014-04-29 11:24:23 +053088 if (!vcpu->arch.pause) {
89 if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
90 return PSCI_RET_ALREADY_ON;
91 else
92 return PSCI_RET_INVALID_PARAMS;
93 }
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050094
95 target_pc = *vcpu_reg(source_vcpu, 2);
Anup Patelaa8aeef2014-04-29 11:24:23 +053096 context_id = *vcpu_reg(source_vcpu, 3);
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050097
Marc Zyngieraa024c2f2013-01-20 18:28:13 -050098 kvm_reset_vcpu(vcpu);
99
100 /* Gracefully handle Thumb2 entry point */
101 if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
102 target_pc &= ~((phys_addr_t) 1);
103 vcpu_set_thumb(vcpu);
104 }
105
Marc Zyngierce94fe92013-11-05 14:12:15 +0000106 /* Propagate caller endianness */
107 if (kvm_vcpu_is_be(source_vcpu))
108 kvm_vcpu_set_be(vcpu);
109
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500110 *vcpu_pc(vcpu) = target_pc;
Anup Patelaa8aeef2014-04-29 11:24:23 +0530111 /*
112 * NOTE: We always update r0 (or x0) because for PSCI v0.1
113 * the general puspose registers are undefined upon CPU_ON.
114 */
115 *vcpu_reg(vcpu, 0) = context_id;
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500116 vcpu->arch.pause = false;
117 smp_mb(); /* Make sure the above is visible */
118
Christoffer Dall478a8232013-11-19 17:43:19 -0800119 wq = kvm_arch_vcpu_wq(vcpu);
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500120 wake_up_interruptible(wq);
121
Anup Patel7d0f84a2014-04-29 11:24:16 +0530122 return PSCI_RET_SUCCESS;
123}
124
Anup Patele6bc13c2014-04-29 11:24:21 +0530125static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
126{
127 int i;
128 unsigned long mpidr;
129 unsigned long target_affinity;
130 unsigned long target_affinity_mask;
131 unsigned long lowest_affinity_level;
132 struct kvm *kvm = vcpu->kvm;
133 struct kvm_vcpu *tmp;
134
135 target_affinity = *vcpu_reg(vcpu, 1);
136 lowest_affinity_level = *vcpu_reg(vcpu, 2);
137
138 /* Determine target affinity mask */
139 target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
140 if (!target_affinity_mask)
141 return PSCI_RET_INVALID_PARAMS;
142
143 /* Ignore other bits of target affinity */
144 target_affinity &= target_affinity_mask;
145
146 /*
147 * If one or more VCPU matching target affinity are running
148 * then ON else OFF
149 */
150 kvm_for_each_vcpu(i, tmp, kvm) {
Andre Przywara4429fc62014-06-02 15:37:13 +0200151 mpidr = kvm_vcpu_get_mpidr_aff(tmp);
Anup Patele6bc13c2014-04-29 11:24:21 +0530152 if (((mpidr & target_affinity_mask) == target_affinity) &&
153 !tmp->arch.pause) {
154 return PSCI_0_2_AFFINITY_LEVEL_ON;
155 }
156 }
157
158 return PSCI_0_2_AFFINITY_LEVEL_OFF;
159}
160
Anup Patel4b123822014-04-29 11:24:20 +0530161static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
162{
Christoffer Dallcf5d31882014-10-16 17:00:18 +0200163 int i;
164 struct kvm_vcpu *tmp;
165
166 /*
167 * The KVM ABI specifies that a system event exit may call KVM_RUN
168 * again and may perform shutdown/reboot at a later time that when the
169 * actual request is made. Since we are implementing PSCI and a
170 * caller of PSCI reboot and shutdown expects that the system shuts
171 * down or reboots immediately, let's make sure that VCPUs are not run
172 * after this call is handled and before the VCPUs have been
173 * re-initialized.
174 */
175 kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
176 tmp->arch.pause = true;
177 kvm_vcpu_kick(tmp);
178 }
179
Anup Patel4b123822014-04-29 11:24:20 +0530180 memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
181 vcpu->run->system_event.type = type;
182 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
183}
184
185static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
186{
187 kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
188}
189
190static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
191{
192 kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
193}
194
Anup Patel7d0f84a2014-04-29 11:24:16 +0530195int kvm_psci_version(struct kvm_vcpu *vcpu)
196{
197 if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
198 return KVM_ARM_PSCI_0_2;
199
200 return KVM_ARM_PSCI_0_1;
201}
202
Anup Patele8e7fcc2014-04-29 11:24:18 +0530203static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
Anup Patel7d0f84a2014-04-29 11:24:16 +0530204{
Anup Patel4b123822014-04-29 11:24:20 +0530205 int ret = 1;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530206 unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
207 unsigned long val;
208
209 switch (psci_fn) {
210 case PSCI_0_2_FN_PSCI_VERSION:
211 /*
212 * Bits[31:16] = Major Version = 0
213 * Bits[15:0] = Minor Version = 2
214 */
215 val = 2;
216 break;
Anup Patelb376d022014-04-29 11:24:24 +0530217 case PSCI_0_2_FN_CPU_SUSPEND:
218 case PSCI_0_2_FN64_CPU_SUSPEND:
219 val = kvm_psci_vcpu_suspend(vcpu);
220 break;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530221 case PSCI_0_2_FN_CPU_OFF:
222 kvm_psci_vcpu_off(vcpu);
223 val = PSCI_RET_SUCCESS;
224 break;
225 case PSCI_0_2_FN_CPU_ON:
226 case PSCI_0_2_FN64_CPU_ON:
227 val = kvm_psci_vcpu_on(vcpu);
228 break;
Anup Patele6bc13c2014-04-29 11:24:21 +0530229 case PSCI_0_2_FN_AFFINITY_INFO:
230 case PSCI_0_2_FN64_AFFINITY_INFO:
231 val = kvm_psci_vcpu_affinity_info(vcpu);
232 break;
Anup Patelbab0b4302014-04-29 11:24:22 +0530233 case PSCI_0_2_FN_MIGRATE:
234 case PSCI_0_2_FN64_MIGRATE:
235 val = PSCI_RET_NOT_SUPPORTED;
236 break;
237 case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
238 /*
239 * Trusted OS is MP hence does not require migration
240 * or
241 * Trusted OS is not present
242 */
243 val = PSCI_0_2_TOS_MP;
244 break;
245 case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
246 case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
247 val = PSCI_RET_NOT_SUPPORTED;
248 break;
Anup Patel4b123822014-04-29 11:24:20 +0530249 case PSCI_0_2_FN_SYSTEM_OFF:
250 kvm_psci_system_off(vcpu);
251 /*
252 * We should'nt be going back to guest VCPU after
253 * receiving SYSTEM_OFF request.
254 *
255 * If user space accidently/deliberately resumes
256 * guest VCPU after SYSTEM_OFF request then guest
257 * VCPU should see internal failure from PSCI return
258 * value. To achieve this, we preload r0 (or x0) with
259 * PSCI return value INTERNAL_FAILURE.
260 */
261 val = PSCI_RET_INTERNAL_FAILURE;
262 ret = 0;
263 break;
264 case PSCI_0_2_FN_SYSTEM_RESET:
265 kvm_psci_system_reset(vcpu);
266 /*
267 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
268 * with PSCI return value INTERNAL_FAILURE.
269 */
270 val = PSCI_RET_INTERNAL_FAILURE;
271 ret = 0;
272 break;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530273 default:
Anup Patele8e7fcc2014-04-29 11:24:18 +0530274 return -EINVAL;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530275 }
276
277 *vcpu_reg(vcpu, 0) = val;
Anup Patel4b123822014-04-29 11:24:20 +0530278 return ret;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530279}
280
Anup Patele8e7fcc2014-04-29 11:24:18 +0530281static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
Anup Patel7d0f84a2014-04-29 11:24:16 +0530282{
283 unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
284 unsigned long val;
285
286 switch (psci_fn) {
287 case KVM_PSCI_FN_CPU_OFF:
288 kvm_psci_vcpu_off(vcpu);
289 val = PSCI_RET_SUCCESS;
290 break;
291 case KVM_PSCI_FN_CPU_ON:
292 val = kvm_psci_vcpu_on(vcpu);
293 break;
294 case KVM_PSCI_FN_CPU_SUSPEND:
295 case KVM_PSCI_FN_MIGRATE:
296 val = PSCI_RET_NOT_SUPPORTED;
297 break;
298 default:
Anup Patele8e7fcc2014-04-29 11:24:18 +0530299 return -EINVAL;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530300 }
301
302 *vcpu_reg(vcpu, 0) = val;
Anup Patele8e7fcc2014-04-29 11:24:18 +0530303 return 1;
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500304}
305
306/**
307 * kvm_psci_call - handle PSCI call if r0 value is in range
308 * @vcpu: Pointer to the VCPU struct
309 *
Dave P Martin24a7f672013-05-01 17:49:28 +0100310 * Handle PSCI calls from guests through traps from HVC instructions.
Anup Patele8e7fcc2014-04-29 11:24:18 +0530311 * The calling convention is similar to SMC calls to the secure world
312 * where the function number is placed in r0.
313 *
314 * This function returns: > 0 (success), 0 (success but exit to user
315 * space), and < 0 (errors)
316 *
317 * Errors:
318 * -EINVAL: Unrecognized PSCI function
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500319 */
Anup Patele8e7fcc2014-04-29 11:24:18 +0530320int kvm_psci_call(struct kvm_vcpu *vcpu)
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500321{
Anup Patel7d0f84a2014-04-29 11:24:16 +0530322 switch (kvm_psci_version(vcpu)) {
323 case KVM_ARM_PSCI_0_2:
324 return kvm_psci_0_2_call(vcpu);
325 case KVM_ARM_PSCI_0_1:
326 return kvm_psci_0_1_call(vcpu);
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500327 default:
Anup Patele8e7fcc2014-04-29 11:24:18 +0530328 return -EINVAL;
Anup Patel7d0f84a2014-04-29 11:24:16 +0530329 };
Marc Zyngieraa024c2f2013-01-20 18:28:13 -0500330}