| Mike Frysinger | b03f203 | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 1 | /* mach/dma.h - arch-specific DMA defines |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 2 | * |
| Mike Frysinger | b03f203 | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 3 | * Copyright 2004-2008 Analog Devices Inc. |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 4 | * |
| Mike Frysinger | b03f203 | 2009-01-07 23:14:38 +0800 | [diff] [blame] | 5 | * Licensed under the GPL-2 or later. |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef _MACH_DMA_H_ |
| 9 | #define _MACH_DMA_H_ |
| 10 | |
| Mike Frysinger | 211daf9 | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 11 | #define MAX_DMA_CHANNELS 16 |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 12 | |
| 13 | #define CH_PPI 0 |
| 14 | #define CH_EMAC_RX 1 |
| 15 | #define CH_EMAC_TX 2 |
| 16 | #define CH_SPORT0_RX 3 |
| 17 | #define CH_SPORT0_TX 4 |
| 18 | #define CH_SPORT1_RX 5 |
| 19 | #define CH_SPORT1_TX 6 |
| 20 | #define CH_SPI 7 |
| 21 | #define CH_UART0_RX 8 |
| 22 | #define CH_UART0_TX 9 |
| 23 | #define CH_UART1_RX 10 |
| 24 | #define CH_UART1_TX 11 |
| 25 | |
| 26 | #define CH_MEM_STREAM0_DEST 12 /* TX */ |
| 27 | #define CH_MEM_STREAM0_SRC 13 /* RX */ |
| 28 | #define CH_MEM_STREAM1_DEST 14 /* TX */ |
| 29 | #define CH_MEM_STREAM1_SRC 15 /* RX */ |
| 30 | |
| Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 31 | #endif |