Thomas Petazzoni | 5a714d3 | 2014-12-31 10:11:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * FB driver for the HX8353D LCD Controller |
| 3 | * |
| 4 | * Copyright (c) 2014 Petr Olivka |
| 5 | * Copyright (c) 2013 Noralf Tronnes |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/delay.h> |
| 26 | |
| 27 | #include "fbtft.h" |
| 28 | |
| 29 | #define DRVNAME "fb_hx8353d" |
| 30 | #define DEFAULT_GAMMA "50 77 40 08 BF 00 03 0F 00 01 73 00 72 03 B0 0F 08 00 0F" |
| 31 | |
| 32 | static int init_display(struct fbtft_par *par) |
| 33 | { |
| 34 | |
| 35 | fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); |
| 36 | |
| 37 | par->fbtftops.reset(par); |
| 38 | mdelay(150); |
| 39 | |
| 40 | /* SETEXTC */ |
| 41 | write_reg(par, 0xB9, 0xFF, 0x83, 0x53); |
| 42 | |
| 43 | /* RADJ */ |
| 44 | write_reg(par, 0xB0, 0x3C, 0x01); |
| 45 | |
| 46 | /* VCOM */ |
| 47 | write_reg(par, 0xB6, 0x94, 0x6C, 0x50); |
| 48 | |
| 49 | /* PWR */ |
| 50 | write_reg(par, 0xB1, 0x00, 0x01, 0x1B, 0x03, 0x01, 0x08, 0x77, 0x89); |
| 51 | |
| 52 | /* COLMOD */ |
| 53 | write_reg(par, 0x3A, 0x05); |
| 54 | |
| 55 | /* MEM ACCESS */ |
| 56 | write_reg(par, 0x36, 0xC0); |
| 57 | |
| 58 | /* SLPOUT - Sleep out & booster on */ |
| 59 | write_reg(par, 0x11); |
| 60 | mdelay(150); |
| 61 | |
| 62 | /* DISPON - Display On */ |
| 63 | write_reg(par, 0x29); |
| 64 | |
| 65 | /* RGBSET */ |
| 66 | write_reg(par, 0x2D, |
| 67 | 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, |
| 68 | 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, |
| 69 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, |
| 70 | 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, |
| 71 | 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, |
| 72 | 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, |
| 73 | 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, |
| 74 | 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62); |
| 75 | |
| 76 | return 0; |
| 77 | }; |
| 78 | |
| 79 | static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) |
| 80 | { |
| 81 | fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par, |
| 82 | "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye); |
| 83 | |
| 84 | /* column address */ |
| 85 | write_reg(par, 0x2a, xs >> 8, xs & 0xff, xe >> 8, xe & 0xff); |
| 86 | |
Masanari Iida | 92def78 | 2015-03-21 11:48:37 +0900 | [diff] [blame] | 87 | /* Row address */ |
Thomas Petazzoni | 5a714d3 | 2014-12-31 10:11:14 +0100 | [diff] [blame] | 88 | write_reg(par, 0x2b, ys >> 8, ys & 0xff, ye >> 8, ye & 0xff); |
| 89 | |
| 90 | /* memory write */ |
| 91 | write_reg(par, 0x2c); |
| 92 | } |
| 93 | |
| 94 | #define my (1 << 7) |
| 95 | #define mx (1 << 6) |
| 96 | #define mv (1 << 5) |
| 97 | static int set_var(struct fbtft_par *par) |
| 98 | { |
| 99 | fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); |
| 100 | |
| 101 | /* madctl - memory data access control |
| 102 | rgb/bgr: |
| 103 | 1. mode selection pin srgb |
| 104 | rgb h/w pin for color filter setting: 0=rgb, 1=bgr |
| 105 | 2. madctl rgb bit |
| 106 | rgb-bgr order color filter panel: 0=rgb, 1=bgr */ |
| 107 | switch (par->info->var.rotate) { |
| 108 | case 0: |
| 109 | write_reg(par, 0x36, mx | my | (par->bgr << 3)); |
| 110 | break; |
| 111 | case 270: |
| 112 | write_reg(par, 0x36, my | mv | (par->bgr << 3)); |
| 113 | break; |
| 114 | case 180: |
Aya Mahfouz | 53ce1c0 | 2015-03-10 19:05:52 +0200 | [diff] [blame] | 115 | write_reg(par, 0x36, par->bgr << 3); |
Thomas Petazzoni | 5a714d3 | 2014-12-31 10:11:14 +0100 | [diff] [blame] | 116 | break; |
| 117 | case 90: |
| 118 | write_reg(par, 0x36, mx | mv | (par->bgr << 3)); |
| 119 | break; |
| 120 | } |
| 121 | |
| 122 | return 0; |
| 123 | } |
| 124 | |
| 125 | /* |
| 126 | gamma string format: |
| 127 | */ |
| 128 | static int set_gamma(struct fbtft_par *par, unsigned long *curves) |
| 129 | { |
| 130 | fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__); |
| 131 | |
| 132 | write_reg(par, 0xE0, |
| 133 | curves[0], curves[1], curves[2], curves[3], |
| 134 | curves[4], curves[5], curves[6], curves[7], |
| 135 | curves[8], curves[9], curves[10], curves[11], |
| 136 | curves[12], curves[13], curves[14], curves[15], |
| 137 | curves[16], curves[17], curves[18]); |
| 138 | |
| 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | |
| 143 | static struct fbtft_display display = { |
| 144 | .regwidth = 8, |
| 145 | .width = 128, |
| 146 | .height = 160, |
| 147 | .gamma_num = 1, |
| 148 | .gamma_len = 19, |
| 149 | .gamma = DEFAULT_GAMMA, |
| 150 | .fbtftops = { |
| 151 | .init_display = init_display, |
| 152 | .set_addr_win = set_addr_win, |
| 153 | .set_var = set_var, |
| 154 | .set_gamma = set_gamma, |
| 155 | }, |
| 156 | }; |
| 157 | FBTFT_REGISTER_DRIVER(DRVNAME, "himax,hx8353d", &display); |
| 158 | |
| 159 | MODULE_ALIAS("spi:" DRVNAME); |
| 160 | MODULE_ALIAS("platform:" DRVNAME); |
| 161 | MODULE_ALIAS("spi:hx8353d"); |
| 162 | MODULE_ALIAS("platform:hx8353d"); |
| 163 | |
| 164 | MODULE_DESCRIPTION("FB driver for the HX8353D LCD Controller"); |
| 165 | MODULE_AUTHOR("Petr Olivka"); |
| 166 | MODULE_LICENSE("GPL"); |