blob: 03dd4012043eb29a39b7abcf9e0d8bee92c77562 [file] [log] [blame]
Hartley Sweeten1cb17e22011-10-08 23:04:34 +01001/*
2 * arch/arm/mach-ep93xx/vision_ep9307.c
3 * Vision Engraving Systems EP9307 SoM support.
4 *
5 * Copyright (C) 2008-2011 Vision Engraving Systems
6 * H Hartley Sweeten <hsweeten@visionengravers.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or (at
11 * your option) any later version.
12 */
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/irq.h>
20#include <linux/gpio.h>
21#include <linux/fb.h>
22#include <linux/io.h>
23#include <linux/mtd/partitions.h>
24#include <linux/i2c.h>
25#include <linux/i2c-gpio.h>
26#include <linux/i2c/pca953x.h>
27#include <linux/spi/spi.h>
28#include <linux/spi/flash.h>
29#include <linux/spi/mmc_spi.h>
30#include <linux/mmc/host.h>
31
32#include <mach/hardware.h>
33#include <mach/fb.h>
34#include <mach/ep93xx_spi.h>
35
36#include <asm/mach-types.h>
37#include <asm/mach/map.h>
38#include <asm/mach/arch.h>
39
40/*************************************************************************
41 * Static I/O mappings for the FPGA
42 *************************************************************************/
43#define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE
44#define VISION_VIRT_BASE 0xfebff000
45
46static struct map_desc vision_io_desc[] __initdata = {
47 {
48 .virtual = VISION_VIRT_BASE,
49 .pfn = __phys_to_pfn(VISION_PHYS_BASE),
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52 },
53};
54
55static void __init vision_map_io(void)
56{
57 ep93xx_map_io();
58
59 iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc));
60}
61
62/*************************************************************************
63 * Ethernet
64 *************************************************************************/
65static struct ep93xx_eth_data vision_eth_data __initdata = {
66 .phy_id = 1,
67};
68
69/*************************************************************************
70 * Framebuffer
71 *************************************************************************/
72#define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1
73
74static int vision_lcd_setup(struct platform_device *pdev)
75{
76 int err;
77
78 err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH,
79 dev_name(&pdev->dev));
80 if (err)
81 return err;
82
83 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS |
84 EP93XX_SYSCON_DEVCFG_RASONP3 |
85 EP93XX_SYSCON_DEVCFG_EXVC);
86
87 return 0;
88}
89
90static void vision_lcd_teardown(struct platform_device *pdev)
91{
92 gpio_free(VISION_LCD_ENABLE);
93}
94
95static void vision_lcd_blank(int blank_mode, struct fb_info *info)
96{
97 if (blank_mode)
98 gpio_set_value(VISION_LCD_ENABLE, 0);
99 else
100 gpio_set_value(VISION_LCD_ENABLE, 1);
101}
102
103static struct ep93xxfb_mach_info ep93xxfb_info __initdata = {
104 .num_modes = EP93XXFB_USE_MODEDB,
105 .bpp = 16,
106 .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
107 .setup = vision_lcd_setup,
108 .teardown = vision_lcd_teardown,
109 .blank = vision_lcd_blank,
110};
111
112
113/*************************************************************************
114 * GPIO Expanders
115 *************************************************************************/
116#define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1)
117#define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16)
118#define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16)
119#define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16)
120
121static struct pca953x_platform_data pca953x_74_gpio_data = {
122 .gpio_base = PCA9539_74_GPIO_BASE,
123 .irq_base = EP93XX_BOARD_IRQ(0),
124};
125
126static struct pca953x_platform_data pca953x_75_gpio_data = {
127 .gpio_base = PCA9539_75_GPIO_BASE,
128 .irq_base = -1,
129};
130
131static struct pca953x_platform_data pca953x_76_gpio_data = {
132 .gpio_base = PCA9539_76_GPIO_BASE,
133 .irq_base = -1,
134};
135
136static struct pca953x_platform_data pca953x_77_gpio_data = {
137 .gpio_base = PCA9539_77_GPIO_BASE,
138 .irq_base = -1,
139};
140
141/*************************************************************************
142 * I2C Bus
143 *************************************************************************/
144static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = {
145 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
146 .scl_pin = EP93XX_GPIO_LINE_EECLK,
147};
148
149static struct i2c_board_info vision_i2c_info[] __initdata = {
150 {
151 I2C_BOARD_INFO("isl1208", 0x6f),
152 .irq = IRQ_EP93XX_EXT1,
153 }, {
154 I2C_BOARD_INFO("pca9539", 0x74),
155 .platform_data = &pca953x_74_gpio_data,
156 .irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7)),
157 }, {
158 I2C_BOARD_INFO("pca9539", 0x75),
159 .platform_data = &pca953x_75_gpio_data,
160 }, {
161 I2C_BOARD_INFO("pca9539", 0x76),
162 .platform_data = &pca953x_76_gpio_data,
163 }, {
164 I2C_BOARD_INFO("pca9539", 0x77),
165 .platform_data = &pca953x_77_gpio_data,
166 },
167};
168
169/*************************************************************************
170 * SPI Flash
171 *************************************************************************/
172#define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7
173
174static struct mtd_partition vision_spi_flash_partitions[] = {
175 {
176 .name = "SPI bootstrap",
177 .offset = 0,
178 .size = SZ_4K,
179 }, {
180 .name = "Bootstrap config",
181 .offset = MTDPART_OFS_APPEND,
182 .size = SZ_4K,
183 }, {
184 .name = "System config",
185 .offset = MTDPART_OFS_APPEND,
186 .size = MTDPART_SIZ_FULL,
187 },
188};
189
190static struct flash_platform_data vision_spi_flash_data = {
191 .name = "SPI Flash",
192 .parts = vision_spi_flash_partitions,
193 .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions),
194};
195
196static int vision_spi_flash_hw_setup(struct spi_device *spi)
197{
198 return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH,
199 spi->modalias);
200}
201
202static void vision_spi_flash_hw_cleanup(struct spi_device *spi)
203{
204 gpio_free(VISION_SPI_FLASH_CS);
205}
206
207static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value)
208{
209 gpio_set_value(VISION_SPI_FLASH_CS, value);
210}
211
212static struct ep93xx_spi_chip_ops vision_spi_flash_hw = {
213 .setup = vision_spi_flash_hw_setup,
214 .cleanup = vision_spi_flash_hw_cleanup,
215 .cs_control = vision_spi_flash_hw_cs_control,
216};
217
218/*************************************************************************
219 * SPI SD/MMC host
220 *************************************************************************/
221#define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2)
222#define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0)
223#define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15
224
225static struct gpio vision_spi_mmc_gpios[] = {
226 { VISION_SPI_MMC_WP, GPIOF_DIR_IN, "mmc_spi:wp" },
227 { VISION_SPI_MMC_CD, GPIOF_DIR_IN, "mmc_spi:cd" },
228};
229
230static int vision_spi_mmc_init(struct device *pdev,
231 irqreturn_t (*func)(int, void *), void *pdata)
232{
233 int err;
234
235 err = gpio_request_array(vision_spi_mmc_gpios,
236 ARRAY_SIZE(vision_spi_mmc_gpios));
237 if (err)
238 return err;
239
240 err = gpio_set_debounce(VISION_SPI_MMC_CD, 1);
241 if (err)
242 goto exit_err;
243
244 err = request_irq(gpio_to_irq(VISION_SPI_MMC_CD), func,
245 IRQ_TYPE_EDGE_BOTH, "mmc_spi:cd", pdata);
246 if (err)
247 goto exit_err;
248
249 return 0;
250
251exit_err:
252 gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
253 return err;
254
255}
256
257static void vision_spi_mmc_exit(struct device *pdev, void *pdata)
258{
259 free_irq(gpio_to_irq(VISION_SPI_MMC_CD), pdata);
260 gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
261}
262
263static int vision_spi_mmc_get_ro(struct device *pdev)
264{
265 return !!gpio_get_value(VISION_SPI_MMC_WP);
266}
267
268static int vision_spi_mmc_get_cd(struct device *pdev)
269{
270 return !gpio_get_value(VISION_SPI_MMC_CD);
271}
272
273static struct mmc_spi_platform_data vision_spi_mmc_data = {
274 .init = vision_spi_mmc_init,
275 .exit = vision_spi_mmc_exit,
276 .get_ro = vision_spi_mmc_get_ro,
277 .get_cd = vision_spi_mmc_get_cd,
278 .detect_delay = 100,
279 .powerup_msecs = 100,
280 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
281};
282
283static int vision_spi_mmc_hw_setup(struct spi_device *spi)
284{
285 return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH,
286 spi->modalias);
287}
288
289static void vision_spi_mmc_hw_cleanup(struct spi_device *spi)
290{
291 gpio_free(VISION_SPI_MMC_CS);
292}
293
294static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value)
295{
296 gpio_set_value(VISION_SPI_MMC_CS, value);
297}
298
299static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = {
300 .setup = vision_spi_mmc_hw_setup,
301 .cleanup = vision_spi_mmc_hw_cleanup,
302 .cs_control = vision_spi_mmc_hw_cs_control,
303};
304
305/*************************************************************************
306 * SPI Bus
307 *************************************************************************/
308static struct spi_board_info vision_spi_board_info[] __initdata = {
309 {
310 .modalias = "sst25l",
311 .platform_data = &vision_spi_flash_data,
312 .controller_data = &vision_spi_flash_hw,
313 .max_speed_hz = 20000000,
314 .bus_num = 0,
315 .chip_select = 0,
316 .mode = SPI_MODE_3,
317 }, {
318 .modalias = "mmc_spi",
319 .platform_data = &vision_spi_mmc_data,
320 .controller_data = &vision_spi_mmc_hw,
321 .max_speed_hz = 20000000,
322 .bus_num = 0,
323 .chip_select = 1,
324 .mode = SPI_MODE_3,
325 },
326};
327
328static struct ep93xx_spi_info vision_spi_master __initdata = {
329 .num_chipselect = ARRAY_SIZE(vision_spi_board_info),
330};
331
332/*************************************************************************
333 * Machine Initialization
334 *************************************************************************/
335static void __init vision_init_machine(void)
336{
337 ep93xx_init_devices();
338 ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
339 ep93xx_register_eth(&vision_eth_data, 1);
340 ep93xx_register_fb(&ep93xxfb_info);
341 ep93xx_register_pwm(1, 0);
342
343 /*
344 * Request the gpio expander's interrupt gpio line now to prevent
345 * the kernel from doing a WARN in gpiolib:gpio_ensure_requested().
346 */
347 if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN,
348 "pca9539:74"))
349 pr_warn("cannot request interrupt gpio for pca9539:74\n");
350
351 ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
352 ARRAY_SIZE(vision_i2c_info));
353 ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
354 ARRAY_SIZE(vision_spi_board_info));
355}
356
357MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
358 /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
Arnd Bergmanna7fadac2011-10-31 23:58:06 +0100359 .atag_offset = 0x100,
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100360 .map_io = vision_map_io,
361 .init_irq = ep93xx_init_irq,
362 .timer = &ep93xx_timer,
363 .init_machine = vision_init_machine,
Russell King32751662011-11-05 09:54:14 +0000364 .restart = ep93xx_restart,
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100365MACHINE_END