Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1 | /* |
| 2 | * omap iommu: tlb and pagetable primitives |
| 3 | * |
Hiroshi DOYU | c127c7d | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 4 | * Copyright (C) 2008-2010 Nokia Corporation |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 5 | * |
| 6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, |
| 7 | * Paul Mundt and Toshihiro Kobayashi |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 16 | #include <linux/slab.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/ioport.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 19 | #include <linux/platform_device.h> |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 20 | #include <linux/iommu.h> |
Tony Lindgren | c8d35c8 | 2012-11-02 12:24:03 -0700 | [diff] [blame] | 21 | #include <linux/omap-iommu.h> |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 22 | #include <linux/mutex.h> |
| 23 | #include <linux/spinlock.h> |
Tony Lindgren | ed1c7de | 2012-11-02 12:24:06 -0700 | [diff] [blame] | 24 | #include <linux/io.h> |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 25 | #include <linux/pm_runtime.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 26 | |
| 27 | #include <asm/cacheflush.h> |
| 28 | |
Tony Lindgren | 2ab7c84 | 2012-11-02 12:24:14 -0700 | [diff] [blame] | 29 | #include <linux/platform_data/iommu-omap.h> |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 30 | |
Ido Yariv | 2f7702a | 2012-11-02 12:24:00 -0700 | [diff] [blame] | 31 | #include "omap-iopgtable.h" |
Tony Lindgren | ed1c7de | 2012-11-02 12:24:06 -0700 | [diff] [blame] | 32 | #include "omap-iommu.h" |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 33 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 34 | #define for_each_iotlb_cr(obj, n, __i, cr) \ |
| 35 | for (__i = 0; \ |
| 36 | (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \ |
| 37 | __i++) |
| 38 | |
Ohad Ben-Cohen | 66bc8cf | 2011-11-10 11:32:27 +0200 | [diff] [blame] | 39 | /* bitmap of the page sizes currently supported */ |
| 40 | #define OMAP_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M) |
| 41 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 42 | /** |
| 43 | * struct omap_iommu_domain - omap iommu domain |
| 44 | * @pgtable: the page table |
| 45 | * @iommu_dev: an omap iommu device attached to this domain. only a single |
| 46 | * iommu device can be attached for now. |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 47 | * @dev: Device using this domain. |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 48 | * @lock: domain lock, should be taken when attaching/detaching |
| 49 | */ |
| 50 | struct omap_iommu_domain { |
| 51 | u32 *pgtable; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 52 | struct omap_iommu *iommu_dev; |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 53 | struct device *dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 54 | spinlock_t lock; |
| 55 | }; |
| 56 | |
Ido Yariv | 7bd9e25 | 2012-11-02 12:24:09 -0700 | [diff] [blame] | 57 | #define MMU_LOCK_BASE_SHIFT 10 |
| 58 | #define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT) |
| 59 | #define MMU_LOCK_BASE(x) \ |
| 60 | ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT) |
| 61 | |
| 62 | #define MMU_LOCK_VICT_SHIFT 4 |
| 63 | #define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT) |
| 64 | #define MMU_LOCK_VICT(x) \ |
| 65 | ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT) |
| 66 | |
| 67 | struct iotlb_lock { |
| 68 | short base; |
| 69 | short vict; |
| 70 | }; |
| 71 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 72 | /* accommodate the difference between omap1 and omap2/3 */ |
| 73 | static const struct iommu_functions *arch_iommu; |
| 74 | |
| 75 | static struct platform_driver omap_iommu_driver; |
| 76 | static struct kmem_cache *iopte_cachep; |
| 77 | |
| 78 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 79 | * omap_install_iommu_arch - Install archtecure specific iommu functions |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 80 | * @ops: a pointer to architecture specific iommu functions |
| 81 | * |
| 82 | * There are several kind of iommu algorithm(tlb, pagetable) among |
| 83 | * omap series. This interface installs such an iommu algorighm. |
| 84 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 85 | int omap_install_iommu_arch(const struct iommu_functions *ops) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 86 | { |
| 87 | if (arch_iommu) |
| 88 | return -EBUSY; |
| 89 | |
| 90 | arch_iommu = ops; |
| 91 | return 0; |
| 92 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 93 | EXPORT_SYMBOL_GPL(omap_install_iommu_arch); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 94 | |
| 95 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 96 | * omap_uninstall_iommu_arch - Uninstall archtecure specific iommu functions |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 97 | * @ops: a pointer to architecture specific iommu functions |
| 98 | * |
| 99 | * This interface uninstalls the iommu algorighm installed previously. |
| 100 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 101 | void omap_uninstall_iommu_arch(const struct iommu_functions *ops) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 102 | { |
| 103 | if (arch_iommu != ops) |
| 104 | pr_err("%s: not your arch\n", __func__); |
| 105 | |
| 106 | arch_iommu = NULL; |
| 107 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 108 | EXPORT_SYMBOL_GPL(omap_uninstall_iommu_arch); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 109 | |
| 110 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 111 | * omap_iommu_save_ctx - Save registers for pm off-mode support |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 112 | * @dev: client device |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 113 | **/ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 114 | void omap_iommu_save_ctx(struct device *dev) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 115 | { |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 116 | struct omap_iommu *obj = dev_to_omap_iommu(dev); |
| 117 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 118 | arch_iommu->save_ctx(obj); |
| 119 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 120 | EXPORT_SYMBOL_GPL(omap_iommu_save_ctx); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 121 | |
| 122 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 123 | * omap_iommu_restore_ctx - Restore registers for pm off-mode support |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 124 | * @dev: client device |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 125 | **/ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 126 | void omap_iommu_restore_ctx(struct device *dev) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 127 | { |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 128 | struct omap_iommu *obj = dev_to_omap_iommu(dev); |
| 129 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 130 | arch_iommu->restore_ctx(obj); |
| 131 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 132 | EXPORT_SYMBOL_GPL(omap_iommu_restore_ctx); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 133 | |
| 134 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 135 | * omap_iommu_arch_version - Return running iommu arch version |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 136 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 137 | u32 omap_iommu_arch_version(void) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 138 | { |
| 139 | return arch_iommu->version; |
| 140 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 141 | EXPORT_SYMBOL_GPL(omap_iommu_arch_version); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 142 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 143 | static int iommu_enable(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 144 | { |
| 145 | int err; |
Omar Ramirez Luna | 72b15b6 | 2012-11-19 19:05:50 -0600 | [diff] [blame] | 146 | struct platform_device *pdev = to_platform_device(obj->dev); |
| 147 | struct iommu_platform_data *pdata = pdev->dev.platform_data; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 148 | |
Martin Hostettler | ef4815a | 2011-02-24 12:51:31 -0800 | [diff] [blame] | 149 | if (!arch_iommu) |
| 150 | return -ENODEV; |
| 151 | |
Florian Vaussard | 90e569c | 2014-02-28 14:42:34 -0600 | [diff] [blame^] | 152 | if (pdata && pdata->deassert_reset) { |
Omar Ramirez Luna | 72b15b6 | 2012-11-19 19:05:50 -0600 | [diff] [blame] | 153 | err = pdata->deassert_reset(pdev, pdata->reset_name); |
| 154 | if (err) { |
| 155 | dev_err(obj->dev, "deassert_reset failed: %d\n", err); |
| 156 | return err; |
| 157 | } |
| 158 | } |
| 159 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 160 | pm_runtime_get_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 161 | |
| 162 | err = arch_iommu->enable(obj); |
| 163 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 164 | return err; |
| 165 | } |
| 166 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 167 | static void iommu_disable(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 168 | { |
Omar Ramirez Luna | 72b15b6 | 2012-11-19 19:05:50 -0600 | [diff] [blame] | 169 | struct platform_device *pdev = to_platform_device(obj->dev); |
| 170 | struct iommu_platform_data *pdata = pdev->dev.platform_data; |
| 171 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 172 | arch_iommu->disable(obj); |
| 173 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 174 | pm_runtime_put_sync(obj->dev); |
Omar Ramirez Luna | 72b15b6 | 2012-11-19 19:05:50 -0600 | [diff] [blame] | 175 | |
Florian Vaussard | 90e569c | 2014-02-28 14:42:34 -0600 | [diff] [blame^] | 176 | if (pdata && pdata->assert_reset) |
Omar Ramirez Luna | 72b15b6 | 2012-11-19 19:05:50 -0600 | [diff] [blame] | 177 | pdata->assert_reset(pdev, pdata->reset_name); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 178 | } |
| 179 | |
| 180 | /* |
| 181 | * TLB operations |
| 182 | */ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 183 | void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 184 | { |
| 185 | BUG_ON(!cr || !e); |
| 186 | |
| 187 | arch_iommu->cr_to_e(cr, e); |
| 188 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 189 | EXPORT_SYMBOL_GPL(omap_iotlb_cr_to_e); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 190 | |
| 191 | static inline int iotlb_cr_valid(struct cr_regs *cr) |
| 192 | { |
| 193 | if (!cr) |
| 194 | return -EINVAL; |
| 195 | |
| 196 | return arch_iommu->cr_valid(cr); |
| 197 | } |
| 198 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 199 | static inline struct cr_regs *iotlb_alloc_cr(struct omap_iommu *obj, |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 200 | struct iotlb_entry *e) |
| 201 | { |
| 202 | if (!e) |
| 203 | return NULL; |
| 204 | |
| 205 | return arch_iommu->alloc_cr(obj, e); |
| 206 | } |
| 207 | |
Ohad Ben-Cohen | e1f2381 | 2011-08-16 14:58:14 +0300 | [diff] [blame] | 208 | static u32 iotlb_cr_to_virt(struct cr_regs *cr) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 209 | { |
| 210 | return arch_iommu->cr_to_virt(cr); |
| 211 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 212 | |
| 213 | static u32 get_iopte_attr(struct iotlb_entry *e) |
| 214 | { |
| 215 | return arch_iommu->get_pte_attr(e); |
| 216 | } |
| 217 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 218 | static u32 iommu_report_fault(struct omap_iommu *obj, u32 *da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 219 | { |
| 220 | return arch_iommu->fault_isr(obj, da); |
| 221 | } |
| 222 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 223 | static void iotlb_lock_get(struct omap_iommu *obj, struct iotlb_lock *l) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 224 | { |
| 225 | u32 val; |
| 226 | |
| 227 | val = iommu_read_reg(obj, MMU_LOCK); |
| 228 | |
| 229 | l->base = MMU_LOCK_BASE(val); |
| 230 | l->vict = MMU_LOCK_VICT(val); |
| 231 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 232 | } |
| 233 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 234 | static void iotlb_lock_set(struct omap_iommu *obj, struct iotlb_lock *l) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 235 | { |
| 236 | u32 val; |
| 237 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 238 | val = (l->base << MMU_LOCK_BASE_SHIFT); |
| 239 | val |= (l->vict << MMU_LOCK_VICT_SHIFT); |
| 240 | |
| 241 | iommu_write_reg(obj, val, MMU_LOCK); |
| 242 | } |
| 243 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 244 | static void iotlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 245 | { |
| 246 | arch_iommu->tlb_read_cr(obj, cr); |
| 247 | } |
| 248 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 249 | static void iotlb_load_cr(struct omap_iommu *obj, struct cr_regs *cr) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 250 | { |
| 251 | arch_iommu->tlb_load_cr(obj, cr); |
| 252 | |
| 253 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); |
| 254 | iommu_write_reg(obj, 1, MMU_LD_TLB); |
| 255 | } |
| 256 | |
| 257 | /** |
| 258 | * iotlb_dump_cr - Dump an iommu tlb entry into buf |
| 259 | * @obj: target iommu |
| 260 | * @cr: contents of cam and ram register |
| 261 | * @buf: output buffer |
| 262 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 263 | static inline ssize_t iotlb_dump_cr(struct omap_iommu *obj, struct cr_regs *cr, |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 264 | char *buf) |
| 265 | { |
| 266 | BUG_ON(!cr || !buf); |
| 267 | |
| 268 | return arch_iommu->dump_cr(obj, cr, buf); |
| 269 | } |
| 270 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 271 | /* only used in iotlb iteration for-loop */ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 272 | static struct cr_regs __iotlb_read_cr(struct omap_iommu *obj, int n) |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 273 | { |
| 274 | struct cr_regs cr; |
| 275 | struct iotlb_lock l; |
| 276 | |
| 277 | iotlb_lock_get(obj, &l); |
| 278 | l.vict = n; |
| 279 | iotlb_lock_set(obj, &l); |
| 280 | iotlb_read_cr(obj, &cr); |
| 281 | |
| 282 | return cr; |
| 283 | } |
| 284 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 285 | /** |
| 286 | * load_iotlb_entry - Set an iommu tlb entry |
| 287 | * @obj: target iommu |
| 288 | * @e: an iommu tlb entry info |
| 289 | **/ |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 290 | #ifdef PREFETCH_IOTLB |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 291 | static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 292 | { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 293 | int err = 0; |
| 294 | struct iotlb_lock l; |
| 295 | struct cr_regs *cr; |
| 296 | |
| 297 | if (!obj || !obj->nr_tlb_entries || !e) |
| 298 | return -EINVAL; |
| 299 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 300 | pm_runtime_get_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 301 | |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 302 | iotlb_lock_get(obj, &l); |
| 303 | if (l.base == obj->nr_tlb_entries) { |
| 304 | dev_warn(obj->dev, "%s: preserve entries full\n", __func__); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 305 | err = -EBUSY; |
| 306 | goto out; |
| 307 | } |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 308 | if (!e->prsvd) { |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 309 | int i; |
| 310 | struct cr_regs tmp; |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 311 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 312 | for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp) |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 313 | if (!iotlb_cr_valid(&tmp)) |
| 314 | break; |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 315 | |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 316 | if (i == obj->nr_tlb_entries) { |
| 317 | dev_dbg(obj->dev, "%s: full: no entry\n", __func__); |
| 318 | err = -EBUSY; |
| 319 | goto out; |
| 320 | } |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 321 | |
| 322 | iotlb_lock_get(obj, &l); |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 323 | } else { |
| 324 | l.vict = l.base; |
| 325 | iotlb_lock_set(obj, &l); |
| 326 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 327 | |
| 328 | cr = iotlb_alloc_cr(obj, e); |
| 329 | if (IS_ERR(cr)) { |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 330 | pm_runtime_put_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 331 | return PTR_ERR(cr); |
| 332 | } |
| 333 | |
| 334 | iotlb_load_cr(obj, cr); |
| 335 | kfree(cr); |
| 336 | |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 337 | if (e->prsvd) |
| 338 | l.base++; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 339 | /* increment victim for next tlb load */ |
| 340 | if (++l.vict == obj->nr_tlb_entries) |
Kanigeri, Hari | be6d802 | 2010-04-22 23:26:11 +0000 | [diff] [blame] | 341 | l.vict = l.base; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 342 | iotlb_lock_set(obj, &l); |
| 343 | out: |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 344 | pm_runtime_put_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 345 | return err; |
| 346 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 347 | |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 348 | #else /* !PREFETCH_IOTLB */ |
| 349 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 350 | static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 351 | { |
| 352 | return 0; |
| 353 | } |
| 354 | |
| 355 | #endif /* !PREFETCH_IOTLB */ |
| 356 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 357 | static int prefetch_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 358 | { |
| 359 | return load_iotlb_entry(obj, e); |
| 360 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 361 | |
| 362 | /** |
| 363 | * flush_iotlb_page - Clear an iommu tlb entry |
| 364 | * @obj: target iommu |
| 365 | * @da: iommu device virtual address |
| 366 | * |
| 367 | * Clear an iommu tlb entry which includes 'da' address. |
| 368 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 369 | static void flush_iotlb_page(struct omap_iommu *obj, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 370 | { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 371 | int i; |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 372 | struct cr_regs cr; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 373 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 374 | pm_runtime_get_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 375 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 376 | for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 377 | u32 start; |
| 378 | size_t bytes; |
| 379 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 380 | if (!iotlb_cr_valid(&cr)) |
| 381 | continue; |
| 382 | |
| 383 | start = iotlb_cr_to_virt(&cr); |
| 384 | bytes = iopgsz_to_bytes(cr.cam & 3); |
| 385 | |
| 386 | if ((start <= da) && (da < start + bytes)) { |
| 387 | dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n", |
| 388 | __func__, start, da, bytes); |
Hari Kanigeri | 0fa035e | 2010-08-20 13:50:18 +0000 | [diff] [blame] | 389 | iotlb_load_cr(obj, &cr); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 390 | iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY); |
| 391 | } |
| 392 | } |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 393 | pm_runtime_put_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 394 | |
| 395 | if (i == obj->nr_tlb_entries) |
| 396 | dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da); |
| 397 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 398 | |
| 399 | /** |
| 400 | * flush_iotlb_all - Clear all iommu tlb entries |
| 401 | * @obj: target iommu |
| 402 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 403 | static void flush_iotlb_all(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 404 | { |
| 405 | struct iotlb_lock l; |
| 406 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 407 | pm_runtime_get_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 408 | |
| 409 | l.base = 0; |
| 410 | l.vict = 0; |
| 411 | iotlb_lock_set(obj, &l); |
| 412 | |
| 413 | iommu_write_reg(obj, 1, MMU_GFLUSH); |
| 414 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 415 | pm_runtime_put_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 416 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 417 | |
Arnd Bergmann | e4efd94 | 2011-10-02 14:34:05 -0400 | [diff] [blame] | 418 | #if defined(CONFIG_OMAP_IOMMU_DEBUG) || defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE) |
Kanigeri, Hari | ddfa975 | 2010-05-24 02:01:51 +0000 | [diff] [blame] | 419 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 420 | ssize_t omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t bytes) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 421 | { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 422 | if (!obj || !buf) |
| 423 | return -EINVAL; |
| 424 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 425 | pm_runtime_get_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 426 | |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 427 | bytes = arch_iommu->dump_ctx(obj, buf, bytes); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 428 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 429 | pm_runtime_put_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 430 | |
| 431 | return bytes; |
| 432 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 433 | EXPORT_SYMBOL_GPL(omap_iommu_dump_ctx); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 434 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 435 | static int |
| 436 | __dump_tlb_entries(struct omap_iommu *obj, struct cr_regs *crs, int num) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 437 | { |
| 438 | int i; |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 439 | struct iotlb_lock saved; |
| 440 | struct cr_regs tmp; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 441 | struct cr_regs *p = crs; |
| 442 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 443 | pm_runtime_get_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 444 | iotlb_lock_get(obj, &saved); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 445 | |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 446 | for_each_iotlb_cr(obj, num, i, tmp) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 447 | if (!iotlb_cr_valid(&tmp)) |
| 448 | continue; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 449 | *p++ = tmp; |
| 450 | } |
Hiroshi DOYU | 37c2836 | 2010-04-27 05:37:12 +0000 | [diff] [blame] | 451 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 452 | iotlb_lock_set(obj, &saved); |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 453 | pm_runtime_put_sync(obj->dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 454 | |
| 455 | return p - crs; |
| 456 | } |
| 457 | |
| 458 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 459 | * omap_dump_tlb_entries - dump cr arrays to given buffer |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 460 | * @obj: target iommu |
| 461 | * @buf: output buffer |
| 462 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 463 | size_t omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t bytes) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 464 | { |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 465 | int i, num; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 466 | struct cr_regs *cr; |
| 467 | char *p = buf; |
| 468 | |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 469 | num = bytes / sizeof(*cr); |
| 470 | num = min(obj->nr_tlb_entries, num); |
| 471 | |
| 472 | cr = kcalloc(num, sizeof(*cr), GFP_KERNEL); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 473 | if (!cr) |
| 474 | return 0; |
| 475 | |
Hiroshi DOYU | 14e0e67 | 2009-08-28 10:54:41 -0700 | [diff] [blame] | 476 | num = __dump_tlb_entries(obj, cr, num); |
| 477 | for (i = 0; i < num; i++) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 478 | p += iotlb_dump_cr(obj, cr + i, p); |
| 479 | kfree(cr); |
| 480 | |
| 481 | return p - buf; |
| 482 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 483 | EXPORT_SYMBOL_GPL(omap_dump_tlb_entries); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 484 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 485 | int omap_foreach_iommu_device(void *data, int (*fn)(struct device *, void *)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 486 | { |
| 487 | return driver_for_each_device(&omap_iommu_driver.driver, |
| 488 | NULL, data, fn); |
| 489 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 490 | EXPORT_SYMBOL_GPL(omap_foreach_iommu_device); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 491 | |
| 492 | #endif /* CONFIG_OMAP_IOMMU_DEBUG_MODULE */ |
| 493 | |
| 494 | /* |
| 495 | * H/W pagetable operations |
| 496 | */ |
| 497 | static void flush_iopgd_range(u32 *first, u32 *last) |
| 498 | { |
| 499 | /* FIXME: L2 cache should be taken care of if it exists */ |
| 500 | do { |
| 501 | asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd" |
| 502 | : : "r" (first)); |
| 503 | first += L1_CACHE_BYTES / sizeof(*first); |
| 504 | } while (first <= last); |
| 505 | } |
| 506 | |
| 507 | static void flush_iopte_range(u32 *first, u32 *last) |
| 508 | { |
| 509 | /* FIXME: L2 cache should be taken care of if it exists */ |
| 510 | do { |
| 511 | asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte" |
| 512 | : : "r" (first)); |
| 513 | first += L1_CACHE_BYTES / sizeof(*first); |
| 514 | } while (first <= last); |
| 515 | } |
| 516 | |
| 517 | static void iopte_free(u32 *iopte) |
| 518 | { |
| 519 | /* Note: freed iopte's must be clean ready for re-use */ |
| 520 | kmem_cache_free(iopte_cachep, iopte); |
| 521 | } |
| 522 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 523 | static u32 *iopte_alloc(struct omap_iommu *obj, u32 *iopgd, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 524 | { |
| 525 | u32 *iopte; |
| 526 | |
| 527 | /* a table has already existed */ |
| 528 | if (*iopgd) |
| 529 | goto pte_ready; |
| 530 | |
| 531 | /* |
| 532 | * do the allocation outside the page table lock |
| 533 | */ |
| 534 | spin_unlock(&obj->page_table_lock); |
| 535 | iopte = kmem_cache_zalloc(iopte_cachep, GFP_KERNEL); |
| 536 | spin_lock(&obj->page_table_lock); |
| 537 | |
| 538 | if (!*iopgd) { |
| 539 | if (!iopte) |
| 540 | return ERR_PTR(-ENOMEM); |
| 541 | |
| 542 | *iopgd = virt_to_phys(iopte) | IOPGD_TABLE; |
| 543 | flush_iopgd_range(iopgd, iopgd); |
| 544 | |
| 545 | dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte); |
| 546 | } else { |
| 547 | /* We raced, free the reduniovant table */ |
| 548 | iopte_free(iopte); |
| 549 | } |
| 550 | |
| 551 | pte_ready: |
| 552 | iopte = iopte_offset(iopgd, da); |
| 553 | |
| 554 | dev_vdbg(obj->dev, |
| 555 | "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n", |
| 556 | __func__, da, iopgd, *iopgd, iopte, *iopte); |
| 557 | |
| 558 | return iopte; |
| 559 | } |
| 560 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 561 | static int iopgd_alloc_section(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 562 | { |
| 563 | u32 *iopgd = iopgd_offset(obj, da); |
| 564 | |
Hiroshi DOYU | 4abb761 | 2010-05-06 18:24:04 +0300 | [diff] [blame] | 565 | if ((da | pa) & ~IOSECTION_MASK) { |
| 566 | dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", |
| 567 | __func__, da, pa, IOSECTION_SIZE); |
| 568 | return -EINVAL; |
| 569 | } |
| 570 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 571 | *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION; |
| 572 | flush_iopgd_range(iopgd, iopgd); |
| 573 | return 0; |
| 574 | } |
| 575 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 576 | static int iopgd_alloc_super(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 577 | { |
| 578 | u32 *iopgd = iopgd_offset(obj, da); |
| 579 | int i; |
| 580 | |
Hiroshi DOYU | 4abb761 | 2010-05-06 18:24:04 +0300 | [diff] [blame] | 581 | if ((da | pa) & ~IOSUPER_MASK) { |
| 582 | dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", |
| 583 | __func__, da, pa, IOSUPER_SIZE); |
| 584 | return -EINVAL; |
| 585 | } |
| 586 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 587 | for (i = 0; i < 16; i++) |
| 588 | *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER; |
| 589 | flush_iopgd_range(iopgd, iopgd + 15); |
| 590 | return 0; |
| 591 | } |
| 592 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 593 | static int iopte_alloc_page(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 594 | { |
| 595 | u32 *iopgd = iopgd_offset(obj, da); |
| 596 | u32 *iopte = iopte_alloc(obj, iopgd, da); |
| 597 | |
| 598 | if (IS_ERR(iopte)) |
| 599 | return PTR_ERR(iopte); |
| 600 | |
| 601 | *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL; |
| 602 | flush_iopte_range(iopte, iopte); |
| 603 | |
| 604 | dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n", |
| 605 | __func__, da, pa, iopte, *iopte); |
| 606 | |
| 607 | return 0; |
| 608 | } |
| 609 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 610 | static int iopte_alloc_large(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 611 | { |
| 612 | u32 *iopgd = iopgd_offset(obj, da); |
| 613 | u32 *iopte = iopte_alloc(obj, iopgd, da); |
| 614 | int i; |
| 615 | |
Hiroshi DOYU | 4abb761 | 2010-05-06 18:24:04 +0300 | [diff] [blame] | 616 | if ((da | pa) & ~IOLARGE_MASK) { |
| 617 | dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n", |
| 618 | __func__, da, pa, IOLARGE_SIZE); |
| 619 | return -EINVAL; |
| 620 | } |
| 621 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 622 | if (IS_ERR(iopte)) |
| 623 | return PTR_ERR(iopte); |
| 624 | |
| 625 | for (i = 0; i < 16; i++) |
| 626 | *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE; |
| 627 | flush_iopte_range(iopte, iopte + 15); |
| 628 | return 0; |
| 629 | } |
| 630 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 631 | static int |
| 632 | iopgtable_store_entry_core(struct omap_iommu *obj, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 633 | { |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 634 | int (*fn)(struct omap_iommu *, u32, u32, u32); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 635 | u32 prot; |
| 636 | int err; |
| 637 | |
| 638 | if (!obj || !e) |
| 639 | return -EINVAL; |
| 640 | |
| 641 | switch (e->pgsz) { |
| 642 | case MMU_CAM_PGSZ_16M: |
| 643 | fn = iopgd_alloc_super; |
| 644 | break; |
| 645 | case MMU_CAM_PGSZ_1M: |
| 646 | fn = iopgd_alloc_section; |
| 647 | break; |
| 648 | case MMU_CAM_PGSZ_64K: |
| 649 | fn = iopte_alloc_large; |
| 650 | break; |
| 651 | case MMU_CAM_PGSZ_4K: |
| 652 | fn = iopte_alloc_page; |
| 653 | break; |
| 654 | default: |
| 655 | fn = NULL; |
| 656 | BUG(); |
| 657 | break; |
| 658 | } |
| 659 | |
| 660 | prot = get_iopte_attr(e); |
| 661 | |
| 662 | spin_lock(&obj->page_table_lock); |
| 663 | err = fn(obj, e->da, e->pa, prot); |
| 664 | spin_unlock(&obj->page_table_lock); |
| 665 | |
| 666 | return err; |
| 667 | } |
| 668 | |
| 669 | /** |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 670 | * omap_iopgtable_store_entry - Make an iommu pte entry |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 671 | * @obj: target iommu |
| 672 | * @e: an iommu tlb entry info |
| 673 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 674 | int omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 675 | { |
| 676 | int err; |
| 677 | |
| 678 | flush_iotlb_page(obj, e->da); |
| 679 | err = iopgtable_store_entry_core(obj, e); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 680 | if (!err) |
Ohad Ben-Cohen | 5da14a4 | 2011-08-16 15:19:10 +0300 | [diff] [blame] | 681 | prefetch_iotlb_entry(obj, e); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 682 | return err; |
| 683 | } |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 684 | EXPORT_SYMBOL_GPL(omap_iopgtable_store_entry); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 685 | |
| 686 | /** |
| 687 | * iopgtable_lookup_entry - Lookup an iommu pte entry |
| 688 | * @obj: target iommu |
| 689 | * @da: iommu device virtual address |
| 690 | * @ppgd: iommu pgd entry pointer to be returned |
| 691 | * @ppte: iommu pte entry pointer to be returned |
| 692 | **/ |
Ohad Ben-Cohen | e1f2381 | 2011-08-16 14:58:14 +0300 | [diff] [blame] | 693 | static void |
| 694 | iopgtable_lookup_entry(struct omap_iommu *obj, u32 da, u32 **ppgd, u32 **ppte) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 695 | { |
| 696 | u32 *iopgd, *iopte = NULL; |
| 697 | |
| 698 | iopgd = iopgd_offset(obj, da); |
| 699 | if (!*iopgd) |
| 700 | goto out; |
| 701 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 702 | if (iopgd_is_table(*iopgd)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 703 | iopte = iopte_offset(iopgd, da); |
| 704 | out: |
| 705 | *ppgd = iopgd; |
| 706 | *ppte = iopte; |
| 707 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 708 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 709 | static size_t iopgtable_clear_entry_core(struct omap_iommu *obj, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 710 | { |
| 711 | size_t bytes; |
| 712 | u32 *iopgd = iopgd_offset(obj, da); |
| 713 | int nent = 1; |
| 714 | |
| 715 | if (!*iopgd) |
| 716 | return 0; |
| 717 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 718 | if (iopgd_is_table(*iopgd)) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 719 | int i; |
| 720 | u32 *iopte = iopte_offset(iopgd, da); |
| 721 | |
| 722 | bytes = IOPTE_SIZE; |
| 723 | if (*iopte & IOPTE_LARGE) { |
| 724 | nent *= 16; |
| 725 | /* rewind to the 1st entry */ |
Hiroshi DOYU | c127c7d | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 726 | iopte = iopte_offset(iopgd, (da & IOLARGE_MASK)); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 727 | } |
| 728 | bytes *= nent; |
| 729 | memset(iopte, 0, nent * sizeof(*iopte)); |
| 730 | flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte)); |
| 731 | |
| 732 | /* |
| 733 | * do table walk to check if this table is necessary or not |
| 734 | */ |
| 735 | iopte = iopte_offset(iopgd, 0); |
| 736 | for (i = 0; i < PTRS_PER_IOPTE; i++) |
| 737 | if (iopte[i]) |
| 738 | goto out; |
| 739 | |
| 740 | iopte_free(iopte); |
| 741 | nent = 1; /* for the next L1 entry */ |
| 742 | } else { |
| 743 | bytes = IOPGD_SIZE; |
Hiroshi DOYU | dcc730d | 2009-10-22 14:46:32 -0700 | [diff] [blame] | 744 | if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) { |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 745 | nent *= 16; |
| 746 | /* rewind to the 1st entry */ |
Hiroshi DOYU | 8d33ea5 | 2010-02-15 10:03:32 -0800 | [diff] [blame] | 747 | iopgd = iopgd_offset(obj, (da & IOSUPER_MASK)); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 748 | } |
| 749 | bytes *= nent; |
| 750 | } |
| 751 | memset(iopgd, 0, nent * sizeof(*iopgd)); |
| 752 | flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd)); |
| 753 | out: |
| 754 | return bytes; |
| 755 | } |
| 756 | |
| 757 | /** |
| 758 | * iopgtable_clear_entry - Remove an iommu pte entry |
| 759 | * @obj: target iommu |
| 760 | * @da: iommu device virtual address |
| 761 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 762 | static size_t iopgtable_clear_entry(struct omap_iommu *obj, u32 da) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 763 | { |
| 764 | size_t bytes; |
| 765 | |
| 766 | spin_lock(&obj->page_table_lock); |
| 767 | |
| 768 | bytes = iopgtable_clear_entry_core(obj, da); |
| 769 | flush_iotlb_page(obj, da); |
| 770 | |
| 771 | spin_unlock(&obj->page_table_lock); |
| 772 | |
| 773 | return bytes; |
| 774 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 775 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 776 | static void iopgtable_clear_entry_all(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 777 | { |
| 778 | int i; |
| 779 | |
| 780 | spin_lock(&obj->page_table_lock); |
| 781 | |
| 782 | for (i = 0; i < PTRS_PER_IOPGD; i++) { |
| 783 | u32 da; |
| 784 | u32 *iopgd; |
| 785 | |
| 786 | da = i << IOPGD_SHIFT; |
| 787 | iopgd = iopgd_offset(obj, da); |
| 788 | |
| 789 | if (!*iopgd) |
| 790 | continue; |
| 791 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 792 | if (iopgd_is_table(*iopgd)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 793 | iopte_free(iopte_offset(iopgd, 0)); |
| 794 | |
| 795 | *iopgd = 0; |
| 796 | flush_iopgd_range(iopgd, iopgd); |
| 797 | } |
| 798 | |
| 799 | flush_iotlb_all(obj); |
| 800 | |
| 801 | spin_unlock(&obj->page_table_lock); |
| 802 | } |
| 803 | |
| 804 | /* |
| 805 | * Device IOMMU generic operations |
| 806 | */ |
| 807 | static irqreturn_t iommu_fault_handler(int irq, void *data) |
| 808 | { |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 809 | u32 da, errs; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 810 | u32 *iopgd, *iopte; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 811 | struct omap_iommu *obj = data; |
Ohad Ben-Cohen | e7f10f0 | 2011-09-13 15:26:29 -0400 | [diff] [blame] | 812 | struct iommu_domain *domain = obj->domain; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 813 | |
| 814 | if (!obj->refcount) |
| 815 | return IRQ_NONE; |
| 816 | |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 817 | errs = iommu_report_fault(obj, &da); |
Laurent Pinchart | c56b2dd | 2011-05-10 16:56:46 +0200 | [diff] [blame] | 818 | if (errs == 0) |
| 819 | return IRQ_HANDLED; |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 820 | |
| 821 | /* Fault callback or TLB/PTE Dynamic loading */ |
Ohad Ben-Cohen | e7f10f0 | 2011-09-13 15:26:29 -0400 | [diff] [blame] | 822 | if (!report_iommu_fault(domain, obj->dev, da, 0)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 823 | return IRQ_HANDLED; |
| 824 | |
Hiroshi DOYU | 37b2981 | 2010-05-24 02:01:52 +0000 | [diff] [blame] | 825 | iommu_disable(obj); |
| 826 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 827 | iopgd = iopgd_offset(obj, da); |
| 828 | |
Hiroshi DOYU | a1a5445 | 2010-05-13 09:45:35 +0300 | [diff] [blame] | 829 | if (!iopgd_is_table(*iopgd)) { |
Suman Anna | b6c2e09 | 2013-05-30 18:10:59 -0500 | [diff] [blame] | 830 | dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:px%08x\n", |
| 831 | obj->name, errs, da, iopgd, *iopgd); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 832 | return IRQ_NONE; |
| 833 | } |
| 834 | |
| 835 | iopte = iopte_offset(iopgd, da); |
| 836 | |
Suman Anna | b6c2e09 | 2013-05-30 18:10:59 -0500 | [diff] [blame] | 837 | dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x pte:0x%p *pte:0x%08x\n", |
| 838 | obj->name, errs, da, iopgd, *iopgd, iopte, *iopte); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 839 | |
| 840 | return IRQ_NONE; |
| 841 | } |
| 842 | |
| 843 | static int device_match_by_alias(struct device *dev, void *data) |
| 844 | { |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 845 | struct omap_iommu *obj = to_iommu(dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 846 | const char *name = data; |
| 847 | |
| 848 | pr_debug("%s: %s %s\n", __func__, obj->name, name); |
| 849 | |
| 850 | return strcmp(obj->name, name) == 0; |
| 851 | } |
| 852 | |
| 853 | /** |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 854 | * omap_iommu_attach() - attach iommu device to an iommu domain |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 855 | * @name: name of target omap iommu device |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 856 | * @iopgd: page table |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 857 | **/ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 858 | static struct omap_iommu *omap_iommu_attach(const char *name, u32 *iopgd) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 859 | { |
Suman Anna | 7ee08b9e | 2014-02-28 14:42:33 -0600 | [diff] [blame] | 860 | int err; |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 861 | struct device *dev; |
| 862 | struct omap_iommu *obj; |
| 863 | |
| 864 | dev = driver_find_device(&omap_iommu_driver.driver, NULL, |
| 865 | (void *)name, |
| 866 | device_match_by_alias); |
| 867 | if (!dev) |
Suman Anna | 7ee08b9e | 2014-02-28 14:42:33 -0600 | [diff] [blame] | 868 | return ERR_PTR(-ENODEV); |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 869 | |
| 870 | obj = to_iommu(dev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 871 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 872 | spin_lock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 873 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 874 | /* an iommu device can only be attached once */ |
| 875 | if (++obj->refcount > 1) { |
| 876 | dev_err(dev, "%s: already attached!\n", obj->name); |
| 877 | err = -EBUSY; |
| 878 | goto err_enable; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 879 | } |
| 880 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 881 | obj->iopgd = iopgd; |
| 882 | err = iommu_enable(obj); |
| 883 | if (err) |
| 884 | goto err_enable; |
| 885 | flush_iotlb_all(obj); |
| 886 | |
Suman Anna | 7ee08b9e | 2014-02-28 14:42:33 -0600 | [diff] [blame] | 887 | if (!try_module_get(obj->owner)) { |
| 888 | err = -ENODEV; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 889 | goto err_module; |
Suman Anna | 7ee08b9e | 2014-02-28 14:42:33 -0600 | [diff] [blame] | 890 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 891 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 892 | spin_unlock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 893 | |
| 894 | dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); |
| 895 | return obj; |
| 896 | |
| 897 | err_module: |
| 898 | if (obj->refcount == 1) |
| 899 | iommu_disable(obj); |
| 900 | err_enable: |
| 901 | obj->refcount--; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 902 | spin_unlock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 903 | return ERR_PTR(err); |
| 904 | } |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 905 | |
| 906 | /** |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 907 | * omap_iommu_detach - release iommu device |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 908 | * @obj: target iommu |
| 909 | **/ |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 910 | static void omap_iommu_detach(struct omap_iommu *obj) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 911 | { |
Roel Kluin | acf9d46 | 2010-01-08 10:29:05 -0800 | [diff] [blame] | 912 | if (!obj || IS_ERR(obj)) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 913 | return; |
| 914 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 915 | spin_lock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 916 | |
| 917 | if (--obj->refcount == 0) |
| 918 | iommu_disable(obj); |
| 919 | |
| 920 | module_put(obj->owner); |
| 921 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 922 | obj->iopgd = NULL; |
| 923 | |
| 924 | spin_unlock(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 925 | |
| 926 | dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name); |
| 927 | } |
David Cohen | d594f1f | 2011-02-16 19:35:51 +0000 | [diff] [blame] | 928 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 929 | /* |
| 930 | * OMAP Device MMU(IOMMU) detection |
| 931 | */ |
Greg Kroah-Hartman | d34d651 | 2012-12-21 15:05:21 -0800 | [diff] [blame] | 932 | static int omap_iommu_probe(struct platform_device *pdev) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 933 | { |
| 934 | int err = -ENODEV; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 935 | int irq; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 936 | struct omap_iommu *obj; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 937 | struct resource *res; |
| 938 | struct iommu_platform_data *pdata = pdev->dev.platform_data; |
| 939 | |
Suman Anna | f129b3d | 2014-02-28 14:42:32 -0600 | [diff] [blame] | 940 | obj = devm_kzalloc(&pdev->dev, sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 941 | if (!obj) |
| 942 | return -ENOMEM; |
| 943 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 944 | obj->nr_tlb_entries = pdata->nr_tlb_entries; |
| 945 | obj->name = pdata->name; |
| 946 | obj->dev = &pdev->dev; |
| 947 | obj->ctx = (void *)obj + sizeof(*obj); |
Guzman Lugo, Fernando | c7f4ab2 | 2010-12-15 00:54:03 +0000 | [diff] [blame] | 948 | obj->da_start = pdata->da_start; |
| 949 | obj->da_end = pdata->da_end; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 950 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 951 | spin_lock_init(&obj->iommu_lock); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 952 | mutex_init(&obj->mmap_lock); |
| 953 | spin_lock_init(&obj->page_table_lock); |
| 954 | INIT_LIST_HEAD(&obj->mmap); |
| 955 | |
| 956 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Suman Anna | f129b3d | 2014-02-28 14:42:32 -0600 | [diff] [blame] | 957 | obj->regbase = devm_ioremap_resource(obj->dev, res); |
| 958 | if (IS_ERR(obj->regbase)) |
| 959 | return PTR_ERR(obj->regbase); |
Aaro Koskinen | da4a0f7 | 2011-03-14 12:28:32 +0000 | [diff] [blame] | 960 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 961 | irq = platform_get_irq(pdev, 0); |
Suman Anna | f129b3d | 2014-02-28 14:42:32 -0600 | [diff] [blame] | 962 | if (irq < 0) |
| 963 | return -ENODEV; |
| 964 | |
| 965 | err = devm_request_irq(obj->dev, irq, iommu_fault_handler, IRQF_SHARED, |
| 966 | dev_name(obj->dev), obj); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 967 | if (err < 0) |
Suman Anna | f129b3d | 2014-02-28 14:42:32 -0600 | [diff] [blame] | 968 | return err; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 969 | platform_set_drvdata(pdev, obj); |
| 970 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 971 | pm_runtime_irq_safe(obj->dev); |
| 972 | pm_runtime_enable(obj->dev); |
| 973 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 974 | dev_info(&pdev->dev, "%s registered\n", obj->name); |
| 975 | return 0; |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 976 | } |
| 977 | |
Greg Kroah-Hartman | d34d651 | 2012-12-21 15:05:21 -0800 | [diff] [blame] | 978 | static int omap_iommu_remove(struct platform_device *pdev) |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 979 | { |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 980 | struct omap_iommu *obj = platform_get_drvdata(pdev); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 981 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 982 | iopgtable_clear_entry_all(obj); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 983 | |
Omar Ramirez Luna | ebf7cda | 2012-11-19 19:05:51 -0600 | [diff] [blame] | 984 | pm_runtime_disable(obj->dev); |
| 985 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 986 | dev_info(&pdev->dev, "%s removed\n", obj->name); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 987 | return 0; |
| 988 | } |
| 989 | |
| 990 | static struct platform_driver omap_iommu_driver = { |
| 991 | .probe = omap_iommu_probe, |
Greg Kroah-Hartman | d34d651 | 2012-12-21 15:05:21 -0800 | [diff] [blame] | 992 | .remove = omap_iommu_remove, |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 993 | .driver = { |
| 994 | .name = "omap-iommu", |
| 995 | }, |
| 996 | }; |
| 997 | |
| 998 | static void iopte_cachep_ctor(void *iopte) |
| 999 | { |
| 1000 | clean_dcache_area(iopte, IOPTE_TABLE_SIZE); |
| 1001 | } |
| 1002 | |
Tony Lindgren | ed1c7de | 2012-11-02 12:24:06 -0700 | [diff] [blame] | 1003 | static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, |
| 1004 | u32 flags) |
| 1005 | { |
| 1006 | memset(e, 0, sizeof(*e)); |
| 1007 | |
| 1008 | e->da = da; |
| 1009 | e->pa = pa; |
| 1010 | e->valid = 1; |
| 1011 | /* FIXME: add OMAP1 support */ |
| 1012 | e->pgsz = flags & MMU_CAM_PGSZ_MASK; |
| 1013 | e->endian = flags & MMU_RAM_ENDIAN_MASK; |
| 1014 | e->elsz = flags & MMU_RAM_ELSZ_MASK; |
| 1015 | e->mixed = flags & MMU_RAM_MIXED_MASK; |
| 1016 | |
| 1017 | return iopgsz_to_bytes(e->pgsz); |
| 1018 | } |
| 1019 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1020 | static int omap_iommu_map(struct iommu_domain *domain, unsigned long da, |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1021 | phys_addr_t pa, size_t bytes, int prot) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1022 | { |
| 1023 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1024 | struct omap_iommu *oiommu = omap_domain->iommu_dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1025 | struct device *dev = oiommu->dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1026 | struct iotlb_entry e; |
| 1027 | int omap_pgsz; |
| 1028 | u32 ret, flags; |
| 1029 | |
| 1030 | /* we only support mapping a single iommu page for now */ |
| 1031 | omap_pgsz = bytes_to_iopgsz(bytes); |
| 1032 | if (omap_pgsz < 0) { |
| 1033 | dev_err(dev, "invalid size to map: %d\n", bytes); |
| 1034 | return -EINVAL; |
| 1035 | } |
| 1036 | |
| 1037 | dev_dbg(dev, "mapping da 0x%lx to pa 0x%x size 0x%x\n", da, pa, bytes); |
| 1038 | |
| 1039 | flags = omap_pgsz | prot; |
| 1040 | |
| 1041 | iotlb_init_entry(&e, da, pa, flags); |
| 1042 | |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1043 | ret = omap_iopgtable_store_entry(oiommu, &e); |
Ohad Ben-Cohen | b4550d4 | 2011-09-02 13:32:31 -0400 | [diff] [blame] | 1044 | if (ret) |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1045 | dev_err(dev, "omap_iopgtable_store_entry failed: %d\n", ret); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1046 | |
Ohad Ben-Cohen | b4550d4 | 2011-09-02 13:32:31 -0400 | [diff] [blame] | 1047 | return ret; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1048 | } |
| 1049 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1050 | static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da, |
| 1051 | size_t size) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1052 | { |
| 1053 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1054 | struct omap_iommu *oiommu = omap_domain->iommu_dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1055 | struct device *dev = oiommu->dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1056 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1057 | dev_dbg(dev, "unmapping da 0x%lx size %u\n", da, size); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1058 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 1059 | return iopgtable_clear_entry(oiommu, da); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1060 | } |
| 1061 | |
| 1062 | static int |
| 1063 | omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) |
| 1064 | { |
| 1065 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1066 | struct omap_iommu *oiommu; |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1067 | struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1068 | int ret = 0; |
| 1069 | |
| 1070 | spin_lock(&omap_domain->lock); |
| 1071 | |
| 1072 | /* only a single device is supported per domain for now */ |
| 1073 | if (omap_domain->iommu_dev) { |
| 1074 | dev_err(dev, "iommu domain is already attached\n"); |
| 1075 | ret = -EBUSY; |
| 1076 | goto out; |
| 1077 | } |
| 1078 | |
| 1079 | /* get a handle to and enable the omap iommu */ |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1080 | oiommu = omap_iommu_attach(arch_data->name, omap_domain->pgtable); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1081 | if (IS_ERR(oiommu)) { |
| 1082 | ret = PTR_ERR(oiommu); |
| 1083 | dev_err(dev, "can't get omap iommu: %d\n", ret); |
| 1084 | goto out; |
| 1085 | } |
| 1086 | |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1087 | omap_domain->iommu_dev = arch_data->iommu_dev = oiommu; |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1088 | omap_domain->dev = dev; |
Ohad Ben-Cohen | e7f10f0 | 2011-09-13 15:26:29 -0400 | [diff] [blame] | 1089 | oiommu->domain = domain; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1090 | |
| 1091 | out: |
| 1092 | spin_unlock(&omap_domain->lock); |
| 1093 | return ret; |
| 1094 | } |
| 1095 | |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1096 | static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain, |
| 1097 | struct device *dev) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1098 | { |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1099 | struct omap_iommu *oiommu = dev_to_omap_iommu(dev); |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1100 | struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1101 | |
| 1102 | /* only a single device is supported per domain for now */ |
| 1103 | if (omap_domain->iommu_dev != oiommu) { |
| 1104 | dev_err(dev, "invalid iommu device\n"); |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1105 | return; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1106 | } |
| 1107 | |
| 1108 | iopgtable_clear_entry_all(oiommu); |
| 1109 | |
| 1110 | omap_iommu_detach(oiommu); |
| 1111 | |
Ohad Ben-Cohen | fabdbca | 2011-10-11 00:18:33 +0200 | [diff] [blame] | 1112 | omap_domain->iommu_dev = arch_data->iommu_dev = NULL; |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1113 | omap_domain->dev = NULL; |
| 1114 | } |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1115 | |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1116 | static void omap_iommu_detach_dev(struct iommu_domain *domain, |
| 1117 | struct device *dev) |
| 1118 | { |
| 1119 | struct omap_iommu_domain *omap_domain = domain->priv; |
| 1120 | |
| 1121 | spin_lock(&omap_domain->lock); |
| 1122 | _omap_iommu_detach_dev(omap_domain, dev); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1123 | spin_unlock(&omap_domain->lock); |
| 1124 | } |
| 1125 | |
| 1126 | static int omap_iommu_domain_init(struct iommu_domain *domain) |
| 1127 | { |
| 1128 | struct omap_iommu_domain *omap_domain; |
| 1129 | |
| 1130 | omap_domain = kzalloc(sizeof(*omap_domain), GFP_KERNEL); |
| 1131 | if (!omap_domain) { |
| 1132 | pr_err("kzalloc failed\n"); |
| 1133 | goto out; |
| 1134 | } |
| 1135 | |
| 1136 | omap_domain->pgtable = kzalloc(IOPGD_TABLE_SIZE, GFP_KERNEL); |
| 1137 | if (!omap_domain->pgtable) { |
| 1138 | pr_err("kzalloc failed\n"); |
| 1139 | goto fail_nomem; |
| 1140 | } |
| 1141 | |
| 1142 | /* |
| 1143 | * should never fail, but please keep this around to ensure |
| 1144 | * we keep the hardware happy |
| 1145 | */ |
| 1146 | BUG_ON(!IS_ALIGNED((long)omap_domain->pgtable, IOPGD_TABLE_SIZE)); |
| 1147 | |
| 1148 | clean_dcache_area(omap_domain->pgtable, IOPGD_TABLE_SIZE); |
| 1149 | spin_lock_init(&omap_domain->lock); |
| 1150 | |
| 1151 | domain->priv = omap_domain; |
| 1152 | |
Joerg Roedel | 2c6edb0 | 2012-01-26 19:40:55 +0100 | [diff] [blame] | 1153 | domain->geometry.aperture_start = 0; |
| 1154 | domain->geometry.aperture_end = (1ULL << 32) - 1; |
| 1155 | domain->geometry.force_aperture = true; |
| 1156 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1157 | return 0; |
| 1158 | |
| 1159 | fail_nomem: |
| 1160 | kfree(omap_domain); |
| 1161 | out: |
| 1162 | return -ENOMEM; |
| 1163 | } |
| 1164 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1165 | static void omap_iommu_domain_destroy(struct iommu_domain *domain) |
| 1166 | { |
| 1167 | struct omap_iommu_domain *omap_domain = domain->priv; |
| 1168 | |
| 1169 | domain->priv = NULL; |
| 1170 | |
Omar Ramirez Luna | 803b527 | 2012-04-18 13:09:41 -0500 | [diff] [blame] | 1171 | /* |
| 1172 | * An iommu device is still attached |
| 1173 | * (currently, only one device can be attached) ? |
| 1174 | */ |
| 1175 | if (omap_domain->iommu_dev) |
| 1176 | _omap_iommu_detach_dev(omap_domain, omap_domain->dev); |
| 1177 | |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1178 | kfree(omap_domain->pgtable); |
| 1179 | kfree(omap_domain); |
| 1180 | } |
| 1181 | |
| 1182 | static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain, |
Varun Sethi | bb5547ac | 2013-03-29 01:23:58 +0530 | [diff] [blame] | 1183 | dma_addr_t da) |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1184 | { |
| 1185 | struct omap_iommu_domain *omap_domain = domain->priv; |
Ohad Ben-Cohen | 6c32df4 | 2011-08-17 22:57:56 +0300 | [diff] [blame] | 1186 | struct omap_iommu *oiommu = omap_domain->iommu_dev; |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1187 | struct device *dev = oiommu->dev; |
| 1188 | u32 *pgd, *pte; |
| 1189 | phys_addr_t ret = 0; |
| 1190 | |
| 1191 | iopgtable_lookup_entry(oiommu, da, &pgd, &pte); |
| 1192 | |
| 1193 | if (pte) { |
| 1194 | if (iopte_is_small(*pte)) |
| 1195 | ret = omap_iommu_translate(*pte, da, IOPTE_MASK); |
| 1196 | else if (iopte_is_large(*pte)) |
| 1197 | ret = omap_iommu_translate(*pte, da, IOLARGE_MASK); |
| 1198 | else |
Suman Anna | 2abfcfb | 2013-05-30 18:10:38 -0500 | [diff] [blame] | 1199 | dev_err(dev, "bogus pte 0x%x, da 0x%llx", *pte, |
| 1200 | (unsigned long long)da); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1201 | } else { |
| 1202 | if (iopgd_is_section(*pgd)) |
| 1203 | ret = omap_iommu_translate(*pgd, da, IOSECTION_MASK); |
| 1204 | else if (iopgd_is_super(*pgd)) |
| 1205 | ret = omap_iommu_translate(*pgd, da, IOSUPER_MASK); |
| 1206 | else |
Suman Anna | 2abfcfb | 2013-05-30 18:10:38 -0500 | [diff] [blame] | 1207 | dev_err(dev, "bogus pgd 0x%x, da 0x%llx", *pgd, |
| 1208 | (unsigned long long)da); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1209 | } |
| 1210 | |
| 1211 | return ret; |
| 1212 | } |
| 1213 | |
| 1214 | static int omap_iommu_domain_has_cap(struct iommu_domain *domain, |
| 1215 | unsigned long cap) |
| 1216 | { |
| 1217 | return 0; |
| 1218 | } |
| 1219 | |
| 1220 | static struct iommu_ops omap_iommu_ops = { |
| 1221 | .domain_init = omap_iommu_domain_init, |
| 1222 | .domain_destroy = omap_iommu_domain_destroy, |
| 1223 | .attach_dev = omap_iommu_attach_dev, |
| 1224 | .detach_dev = omap_iommu_detach_dev, |
| 1225 | .map = omap_iommu_map, |
| 1226 | .unmap = omap_iommu_unmap, |
| 1227 | .iova_to_phys = omap_iommu_iova_to_phys, |
| 1228 | .domain_has_cap = omap_iommu_domain_has_cap, |
Ohad Ben-Cohen | 66bc8cf | 2011-11-10 11:32:27 +0200 | [diff] [blame] | 1229 | .pgsize_bitmap = OMAP_IOMMU_PGSIZES, |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1230 | }; |
| 1231 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1232 | static int __init omap_iommu_init(void) |
| 1233 | { |
| 1234 | struct kmem_cache *p; |
| 1235 | const unsigned long flags = SLAB_HWCACHE_ALIGN; |
| 1236 | size_t align = 1 << 10; /* L2 pagetable alignement */ |
| 1237 | |
| 1238 | p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags, |
| 1239 | iopte_cachep_ctor); |
| 1240 | if (!p) |
| 1241 | return -ENOMEM; |
| 1242 | iopte_cachep = p; |
| 1243 | |
Joerg Roedel | a65bc64 | 2011-09-06 17:56:07 +0200 | [diff] [blame] | 1244 | bus_set_iommu(&platform_bus_type, &omap_iommu_ops); |
Ohad Ben-Cohen | f626b52 | 2011-06-02 01:46:12 +0300 | [diff] [blame] | 1245 | |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1246 | return platform_driver_register(&omap_iommu_driver); |
| 1247 | } |
Ohad Ben-Cohen | 435792d | 2012-02-26 12:14:14 +0200 | [diff] [blame] | 1248 | /* must be ready before omap3isp is probed */ |
| 1249 | subsys_initcall(omap_iommu_init); |
Hiroshi DOYU | a9dcad5 | 2009-01-26 15:13:40 +0200 | [diff] [blame] | 1250 | |
| 1251 | static void __exit omap_iommu_exit(void) |
| 1252 | { |
| 1253 | kmem_cache_destroy(iopte_cachep); |
| 1254 | |
| 1255 | platform_driver_unregister(&omap_iommu_driver); |
| 1256 | } |
| 1257 | module_exit(omap_iommu_exit); |
| 1258 | |
| 1259 | MODULE_DESCRIPTION("omap iommu: tlb and pagetable primitives"); |
| 1260 | MODULE_ALIAS("platform:omap-iommu"); |
| 1261 | MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi"); |
| 1262 | MODULE_LICENSE("GPL v2"); |