Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> |
| 3 | * Copyright © 2006-2007 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | */ |
| 27 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 28 | #include <linux/slab.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 29 | #include <drm/drmP.h> |
| 30 | #include <drm/drm_crtc.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 31 | #include "intel_drv.h" |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 32 | #include <drm/i915_drm.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 33 | #include "i915_drv.h" |
| 34 | #include "dvo.h" |
| 35 | |
| 36 | #define SIL164_ADDR 0x38 |
| 37 | #define CH7xxx_ADDR 0x76 |
| 38 | #define TFP410_ADDR 0x38 |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 39 | #define NS2501_ADDR 0x38 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 40 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 41 | static const struct intel_dvo_device intel_dvo_devices[] = { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 42 | { |
| 43 | .type = INTEL_DVO_CHIP_TMDS, |
| 44 | .name = "sil164", |
| 45 | .dvo_reg = DVOC, |
| 46 | .slave_addr = SIL164_ADDR, |
| 47 | .dev_ops = &sil164_ops, |
| 48 | }, |
| 49 | { |
| 50 | .type = INTEL_DVO_CHIP_TMDS, |
| 51 | .name = "ch7xxx", |
| 52 | .dvo_reg = DVOC, |
| 53 | .slave_addr = CH7xxx_ADDR, |
| 54 | .dev_ops = &ch7xxx_ops, |
| 55 | }, |
| 56 | { |
braggle@free.fr | 98304ad | 2013-05-16 12:57:38 +0200 | [diff] [blame] | 57 | .type = INTEL_DVO_CHIP_TMDS, |
| 58 | .name = "ch7xxx", |
| 59 | .dvo_reg = DVOC, |
| 60 | .slave_addr = 0x75, /* For some ch7010 */ |
| 61 | .dev_ops = &ch7xxx_ops, |
| 62 | }, |
| 63 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 64 | .type = INTEL_DVO_CHIP_LVDS, |
| 65 | .name = "ivch", |
| 66 | .dvo_reg = DVOA, |
| 67 | .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */ |
| 68 | .dev_ops = &ivch_ops, |
| 69 | }, |
| 70 | { |
| 71 | .type = INTEL_DVO_CHIP_TMDS, |
| 72 | .name = "tfp410", |
| 73 | .dvo_reg = DVOC, |
| 74 | .slave_addr = TFP410_ADDR, |
| 75 | .dev_ops = &tfp410_ops, |
| 76 | }, |
| 77 | { |
| 78 | .type = INTEL_DVO_CHIP_LVDS, |
| 79 | .name = "ch7017", |
| 80 | .dvo_reg = DVOC, |
| 81 | .slave_addr = 0x75, |
Chris Wilson | a6b17b4 | 2010-09-21 12:34:25 +0100 | [diff] [blame] | 82 | .gpio = GMBUS_PORT_DPB, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 83 | .dev_ops = &ch7017_ops, |
Thomas Richter | 7434a25 | 2012-07-18 19:22:30 +0200 | [diff] [blame] | 84 | }, |
| 85 | { |
| 86 | .type = INTEL_DVO_CHIP_TMDS, |
| 87 | .name = "ns2501", |
| 88 | .dvo_reg = DVOC, |
| 89 | .slave_addr = NS2501_ADDR, |
| 90 | .dev_ops = &ns2501_ops, |
| 91 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 92 | }; |
| 93 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 94 | struct intel_dvo { |
| 95 | struct intel_encoder base; |
| 96 | |
| 97 | struct intel_dvo_device dev; |
| 98 | |
| 99 | struct drm_display_mode *panel_fixed_mode; |
| 100 | bool panel_wants_dither; |
| 101 | }; |
| 102 | |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 103 | static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder) |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 104 | { |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 105 | return container_of(encoder, struct intel_dvo, base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 106 | } |
| 107 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 108 | static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector) |
| 109 | { |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 110 | return enc_to_dvo(intel_attached_encoder(connector)); |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 111 | } |
| 112 | |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 113 | static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 114 | { |
Ville Syrjälä | f417c11 | 2014-06-05 19:15:52 +0300 | [diff] [blame] | 115 | struct drm_device *dev = connector->base.dev; |
| 116 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 117 | struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base); |
Ville Syrjälä | f417c11 | 2014-06-05 19:15:52 +0300 | [diff] [blame] | 118 | u32 tmp; |
| 119 | |
| 120 | tmp = I915_READ(intel_dvo->dev.dvo_reg); |
| 121 | |
| 122 | if (!(tmp & DVO_ENABLE)) |
| 123 | return false; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 124 | |
| 125 | return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev); |
| 126 | } |
| 127 | |
| 128 | static bool intel_dvo_get_hw_state(struct intel_encoder *encoder, |
| 129 | enum pipe *pipe) |
| 130 | { |
| 131 | struct drm_device *dev = encoder->base.dev; |
| 132 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 133 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 134 | u32 tmp; |
| 135 | |
| 136 | tmp = I915_READ(intel_dvo->dev.dvo_reg); |
| 137 | |
| 138 | if (!(tmp & DVO_ENABLE)) |
| 139 | return false; |
| 140 | |
| 141 | *pipe = PORT_TO_PIPE(tmp); |
| 142 | |
| 143 | return true; |
| 144 | } |
| 145 | |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 146 | static void intel_dvo_get_config(struct intel_encoder *encoder, |
| 147 | struct intel_crtc_config *pipe_config) |
| 148 | { |
| 149 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 150 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 151 | u32 tmp, flags = 0; |
| 152 | |
| 153 | tmp = I915_READ(intel_dvo->dev.dvo_reg); |
| 154 | if (tmp & DVO_HSYNC_ACTIVE_HIGH) |
| 155 | flags |= DRM_MODE_FLAG_PHSYNC; |
| 156 | else |
| 157 | flags |= DRM_MODE_FLAG_NHSYNC; |
| 158 | if (tmp & DVO_VSYNC_ACTIVE_HIGH) |
| 159 | flags |= DRM_MODE_FLAG_PVSYNC; |
| 160 | else |
| 161 | flags |= DRM_MODE_FLAG_NVSYNC; |
| 162 | |
| 163 | pipe_config->adjusted_mode.flags |= flags; |
Ville Syrjälä | 18442d0 | 2013-09-13 16:00:08 +0300 | [diff] [blame] | 164 | |
Damien Lespiau | 241bfc3 | 2013-09-25 16:45:37 +0100 | [diff] [blame] | 165 | pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 166 | } |
| 167 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 168 | static void intel_disable_dvo(struct intel_encoder *encoder) |
| 169 | { |
| 170 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 171 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 172 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 173 | u32 temp = I915_READ(dvo_reg); |
| 174 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 175 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); |
| 176 | I915_WRITE(dvo_reg, temp & ~DVO_ENABLE); |
| 177 | I915_READ(dvo_reg); |
| 178 | } |
| 179 | |
| 180 | static void intel_enable_dvo(struct intel_encoder *encoder) |
| 181 | { |
| 182 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 183 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 184 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 185 | u32 dvo_reg = intel_dvo->dev.dvo_reg; |
| 186 | u32 temp = I915_READ(dvo_reg); |
| 187 | |
| 188 | I915_WRITE(dvo_reg, temp | DVO_ENABLE); |
| 189 | I915_READ(dvo_reg); |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 190 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, |
| 191 | &crtc->config.requested_mode, |
| 192 | &crtc->config.adjusted_mode); |
| 193 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 194 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); |
| 195 | } |
| 196 | |
Jani Nikula | 6b1c087b | 2013-05-28 12:35:02 +0300 | [diff] [blame] | 197 | /* Special dpms function to support cloning between dvo/sdvo/crt. */ |
Daniel Vetter | b2cabb0 | 2012-07-01 22:42:24 +0200 | [diff] [blame] | 198 | static void intel_dvo_dpms(struct drm_connector *connector, int mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 199 | { |
Daniel Vetter | b2cabb0 | 2012-07-01 22:42:24 +0200 | [diff] [blame] | 200 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
| 201 | struct drm_crtc *crtc; |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 202 | struct intel_crtc_config *config; |
Daniel Vetter | b2cabb0 | 2012-07-01 22:42:24 +0200 | [diff] [blame] | 203 | |
| 204 | /* dvo supports only 2 dpms states. */ |
| 205 | if (mode != DRM_MODE_DPMS_ON) |
| 206 | mode = DRM_MODE_DPMS_OFF; |
| 207 | |
| 208 | if (mode == connector->dpms) |
| 209 | return; |
| 210 | |
| 211 | connector->dpms = mode; |
| 212 | |
| 213 | /* Only need to change hw state when actually enabled */ |
| 214 | crtc = intel_dvo->base.base.crtc; |
| 215 | if (!crtc) { |
| 216 | intel_dvo->base.connectors_active = false; |
| 217 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 218 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 219 | |
Jani Nikula | 6b1c087b | 2013-05-28 12:35:02 +0300 | [diff] [blame] | 220 | /* We call connector dpms manually below in case pipe dpms doesn't |
| 221 | * change due to cloning. */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 222 | if (mode == DRM_MODE_DPMS_ON) { |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 223 | config = &to_intel_crtc(crtc)->config; |
| 224 | |
Daniel Vetter | b2cabb0 | 2012-07-01 22:42:24 +0200 | [diff] [blame] | 225 | intel_dvo->base.connectors_active = true; |
| 226 | |
| 227 | intel_crtc_update_dpms(crtc); |
| 228 | |
Daniel Vetter | 48f34e1 | 2013-10-08 12:25:42 +0200 | [diff] [blame] | 229 | intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, |
| 230 | &config->requested_mode, |
| 231 | &config->adjusted_mode); |
| 232 | |
Daniel Vetter | fac3274 | 2012-08-12 19:27:12 +0200 | [diff] [blame] | 233 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 234 | } else { |
Daniel Vetter | fac3274 | 2012-08-12 19:27:12 +0200 | [diff] [blame] | 235 | intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); |
Daniel Vetter | b2cabb0 | 2012-07-01 22:42:24 +0200 | [diff] [blame] | 236 | |
| 237 | intel_dvo->base.connectors_active = false; |
| 238 | |
| 239 | intel_crtc_update_dpms(crtc); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 240 | } |
Daniel Vetter | 0a91ca2 | 2012-07-02 21:54:27 +0200 | [diff] [blame] | 241 | |
Daniel Vetter | b980514 | 2012-08-31 17:37:33 +0200 | [diff] [blame] | 242 | intel_modeset_check_state(connector->dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 243 | } |
| 244 | |
Damien Lespiau | c19de8e | 2013-11-28 15:29:18 +0000 | [diff] [blame] | 245 | static enum drm_mode_status |
| 246 | intel_dvo_mode_valid(struct drm_connector *connector, |
| 247 | struct drm_display_mode *mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 248 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 249 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 250 | |
| 251 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 252 | return MODE_NO_DBLESCAN; |
| 253 | |
| 254 | /* XXX: Validate clock range */ |
| 255 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 256 | if (intel_dvo->panel_fixed_mode) { |
| 257 | if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 258 | return MODE_PANEL; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 259 | if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 260 | return MODE_PANEL; |
| 261 | } |
| 262 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 263 | return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 264 | } |
| 265 | |
Daniel Vetter | a347037 | 2013-07-21 21:36:58 +0200 | [diff] [blame] | 266 | static bool intel_dvo_compute_config(struct intel_encoder *encoder, |
| 267 | struct intel_crtc_config *pipe_config) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 268 | { |
Daniel Vetter | a347037 | 2013-07-21 21:36:58 +0200 | [diff] [blame] | 269 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
| 270 | struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 271 | |
| 272 | /* If we have timings from the BIOS for the panel, put them in |
| 273 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 274 | * with the panel scaling set up to source from the H/VDisplay |
| 275 | * of the original mode. |
| 276 | */ |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 277 | if (intel_dvo->panel_fixed_mode != NULL) { |
| 278 | #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 279 | C(hdisplay); |
| 280 | C(hsync_start); |
| 281 | C(hsync_end); |
| 282 | C(htotal); |
| 283 | C(vdisplay); |
| 284 | C(vsync_start); |
| 285 | C(vsync_end); |
| 286 | C(vtotal); |
| 287 | C(clock); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 288 | #undef C |
Daniel Vetter | 0d97174 | 2013-09-11 09:58:50 +0200 | [diff] [blame] | 289 | |
| 290 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 291 | } |
| 292 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 293 | return true; |
| 294 | } |
| 295 | |
Daniel Vetter | 912b0e2 | 2014-04-24 23:54:38 +0200 | [diff] [blame] | 296 | static void intel_dvo_pre_enable(struct intel_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 297 | { |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 298 | struct drm_device *dev = encoder->base.dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 299 | struct drm_i915_private *dev_priv = dev->dev_private; |
Daniel Vetter | 79fde30 | 2013-07-21 21:37:00 +0200 | [diff] [blame] | 300 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); |
| 301 | struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode; |
| 302 | struct intel_dvo *intel_dvo = enc_to_dvo(encoder); |
| 303 | int pipe = crtc->pipe; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 304 | u32 dvo_val; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 305 | u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 306 | |
| 307 | switch (dvo_reg) { |
| 308 | case DVOA: |
| 309 | default: |
| 310 | dvo_srcdim_reg = DVOA_SRCDIM; |
| 311 | break; |
| 312 | case DVOB: |
| 313 | dvo_srcdim_reg = DVOB_SRCDIM; |
| 314 | break; |
| 315 | case DVOC: |
| 316 | dvo_srcdim_reg = DVOC_SRCDIM; |
| 317 | break; |
| 318 | } |
| 319 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 320 | /* Save the data order, since I don't know what it should be set to. */ |
| 321 | dvo_val = I915_READ(dvo_reg) & |
| 322 | (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG); |
| 323 | dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE | |
| 324 | DVO_BLANK_ACTIVE_HIGH; |
| 325 | |
| 326 | if (pipe == 1) |
| 327 | dvo_val |= DVO_PIPE_B_SELECT; |
| 328 | dvo_val |= DVO_PIPE_STALL; |
| 329 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
| 330 | dvo_val |= DVO_HSYNC_ACTIVE_HIGH; |
| 331 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 332 | dvo_val |= DVO_VSYNC_ACTIVE_HIGH; |
| 333 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 334 | /*I915_WRITE(DVOB_SRCDIM, |
| 335 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | |
| 336 | (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/ |
| 337 | I915_WRITE(dvo_srcdim_reg, |
| 338 | (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | |
| 339 | (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT)); |
| 340 | /*I915_WRITE(DVOB, dvo_val);*/ |
| 341 | I915_WRITE(dvo_reg, dvo_val); |
| 342 | } |
| 343 | |
| 344 | /** |
| 345 | * Detect the output connection on our DVO device. |
| 346 | * |
| 347 | * Unimplemented. |
| 348 | */ |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 349 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 350 | intel_dvo_detect(struct drm_connector *connector, bool force) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 351 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 352 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | 164c859 | 2013-07-20 20:27:08 +0100 | [diff] [blame] | 353 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
Jani Nikula | c23cc41 | 2014-06-03 14:56:17 +0300 | [diff] [blame] | 354 | connector->base.id, connector->name); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 355 | return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | static int intel_dvo_get_modes(struct drm_connector *connector) |
| 359 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 360 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 361 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 362 | |
| 363 | /* We should probably have an i2c driver get_modes function for those |
| 364 | * devices which will have a fixed set of modes determined by the chip |
| 365 | * (TV-out, for example), but for now with just TMDS and LVDS, |
| 366 | * that's not the case. |
| 367 | */ |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 368 | intel_ddc_get_modes(connector, |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 369 | intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 370 | if (!list_empty(&connector->probed_modes)) |
| 371 | return 1; |
| 372 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 373 | if (intel_dvo->panel_fixed_mode != NULL) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 374 | struct drm_display_mode *mode; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 375 | mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 376 | if (mode) { |
| 377 | drm_mode_probed_add(connector, mode); |
| 378 | return 1; |
| 379 | } |
| 380 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 381 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 382 | return 0; |
| 383 | } |
| 384 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 385 | static void intel_dvo_destroy(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 386 | { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 387 | drm_connector_cleanup(connector); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 388 | kfree(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 389 | } |
| 390 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 391 | static const struct drm_connector_funcs intel_dvo_connector_funcs = { |
Daniel Vetter | b2cabb0 | 2012-07-01 22:42:24 +0200 | [diff] [blame] | 392 | .dpms = intel_dvo_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 393 | .detect = intel_dvo_detect, |
| 394 | .destroy = intel_dvo_destroy, |
| 395 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 396 | }; |
| 397 | |
| 398 | static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = { |
| 399 | .mode_valid = intel_dvo_mode_valid, |
| 400 | .get_modes = intel_dvo_get_modes, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 401 | .best_encoder = intel_best_encoder, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 402 | }; |
| 403 | |
Hannes Eder | b358d0a | 2008-12-18 21:18:47 +0100 | [diff] [blame] | 404 | static void intel_dvo_enc_destroy(struct drm_encoder *encoder) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 405 | { |
Daniel Vetter | 69438e6 | 2013-07-21 21:36:57 +0200 | [diff] [blame] | 406 | struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder)); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 407 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 408 | if (intel_dvo->dev.dev_ops->destroy) |
| 409 | intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev); |
| 410 | |
| 411 | kfree(intel_dvo->panel_fixed_mode); |
| 412 | |
| 413 | intel_encoder_destroy(encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 414 | } |
| 415 | |
| 416 | static const struct drm_encoder_funcs intel_dvo_enc_funcs = { |
| 417 | .destroy = intel_dvo_enc_destroy, |
| 418 | }; |
| 419 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 420 | /** |
| 421 | * Attempts to get a fixed panel timing for LVDS (currently only the i830). |
| 422 | * |
| 423 | * Other chips with DVO LVDS will need to extend this to deal with the LVDS |
| 424 | * chip being on DVOB/C and having multiple pipes. |
| 425 | */ |
| 426 | static struct drm_display_mode * |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 427 | intel_dvo_get_current_mode(struct drm_connector *connector) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 428 | { |
| 429 | struct drm_device *dev = connector->dev; |
| 430 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 431 | struct intel_dvo *intel_dvo = intel_attached_dvo(connector); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 432 | uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 433 | struct drm_display_mode *mode = NULL; |
| 434 | |
| 435 | /* If the DVO port is active, that'll be the LVDS, so we can pull out |
| 436 | * its timings to get how the BIOS set up the panel. |
| 437 | */ |
| 438 | if (dvo_val & DVO_ENABLE) { |
| 439 | struct drm_crtc *crtc; |
| 440 | int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0; |
| 441 | |
Chris Wilson | f875c15 | 2010-09-09 15:44:14 +0100 | [diff] [blame] | 442 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 443 | if (crtc) { |
| 444 | mode = intel_crtc_mode_get(dev, crtc); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 445 | if (mode) { |
| 446 | mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 447 | if (dvo_val & DVO_HSYNC_ACTIVE_HIGH) |
| 448 | mode->flags |= DRM_MODE_FLAG_PHSYNC; |
| 449 | if (dvo_val & DVO_VSYNC_ACTIVE_HIGH) |
| 450 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
| 451 | } |
| 452 | } |
| 453 | } |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 454 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 455 | return mode; |
| 456 | } |
| 457 | |
| 458 | void intel_dvo_init(struct drm_device *dev) |
| 459 | { |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 460 | struct drm_i915_private *dev_priv = dev->dev_private; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 461 | struct intel_encoder *intel_encoder; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 462 | struct intel_dvo *intel_dvo; |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 463 | struct intel_connector *intel_connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 464 | int i; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 465 | int encoder_type = DRM_MODE_ENCODER_NONE; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 466 | |
Daniel Vetter | b14c567 | 2013-09-19 12:18:32 +0200 | [diff] [blame] | 467 | intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 468 | if (!intel_dvo) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 469 | return; |
| 470 | |
Daniel Vetter | b14c567 | 2013-09-19 12:18:32 +0200 | [diff] [blame] | 471 | intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 472 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 473 | kfree(intel_dvo); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 474 | return; |
| 475 | } |
| 476 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 477 | intel_encoder = &intel_dvo->base; |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 478 | drm_encoder_init(dev, &intel_encoder->base, |
| 479 | &intel_dvo_enc_funcs, encoder_type); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 480 | |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 481 | intel_encoder->disable = intel_disable_dvo; |
| 482 | intel_encoder->enable = intel_enable_dvo; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 483 | intel_encoder->get_hw_state = intel_dvo_get_hw_state; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 484 | intel_encoder->get_config = intel_dvo_get_config; |
Daniel Vetter | a347037 | 2013-07-21 21:36:58 +0200 | [diff] [blame] | 485 | intel_encoder->compute_config = intel_dvo_compute_config; |
Daniel Vetter | 912b0e2 | 2014-04-24 23:54:38 +0200 | [diff] [blame] | 486 | intel_encoder->pre_enable = intel_dvo_pre_enable; |
Daniel Vetter | 732ce74 | 2012-07-02 15:09:45 +0200 | [diff] [blame] | 487 | intel_connector->get_hw_state = intel_dvo_connector_get_hw_state; |
Imre Deak | 4932e2c | 2014-02-11 17:12:48 +0200 | [diff] [blame] | 488 | intel_connector->unregister = intel_connector_unregister; |
Daniel Vetter | 19c63fa | 2012-07-11 09:48:04 +0200 | [diff] [blame] | 489 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 490 | /* Now, try to find a controller */ |
| 491 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 492 | struct drm_connector *connector = &intel_connector->base; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 493 | const struct intel_dvo_device *dvo = &intel_dvo_devices[i]; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 494 | struct i2c_adapter *i2c; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 495 | int gpio; |
David Müller (ELSOFT AG) | e4bfff5 | 2013-04-19 10:41:50 +0200 | [diff] [blame] | 496 | bool dvoinit; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 497 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 498 | /* Allow the I2C driver info to specify the GPIO to be used in |
| 499 | * special cases, but otherwise default to what's defined |
| 500 | * in the spec. |
| 501 | */ |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 502 | if (intel_gmbus_is_port_valid(dvo->gpio)) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 503 | gpio = dvo->gpio; |
| 504 | else if (dvo->type == INTEL_DVO_CHIP_LVDS) |
Chris Wilson | f573c66 | 2010-09-28 23:34:44 +0100 | [diff] [blame] | 505 | gpio = GMBUS_PORT_SSC; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 506 | else |
Chris Wilson | a6b17b4 | 2010-09-21 12:34:25 +0100 | [diff] [blame] | 507 | gpio = GMBUS_PORT_DPB; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 508 | |
| 509 | /* Set up the I2C bus necessary for the chip we're probing. |
| 510 | * It appears that everything is on GPIOE except for panels |
| 511 | * on i830 laptops, which are on GPIOB (DVOA). |
| 512 | */ |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 513 | i2c = intel_gmbus_get_adapter(dev_priv, gpio); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 514 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 515 | intel_dvo->dev = *dvo; |
David Müller (ELSOFT AG) | e4bfff5 | 2013-04-19 10:41:50 +0200 | [diff] [blame] | 516 | |
| 517 | /* GMBUS NAK handling seems to be unstable, hence let the |
| 518 | * transmitter detection run in bit banging mode for now. |
| 519 | */ |
| 520 | intel_gmbus_force_bit(i2c, true); |
| 521 | |
| 522 | dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c); |
| 523 | |
| 524 | intel_gmbus_force_bit(i2c, false); |
| 525 | |
| 526 | if (!dvoinit) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 527 | continue; |
| 528 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 529 | intel_encoder->type = INTEL_OUTPUT_DVO; |
| 530 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 531 | switch (dvo->type) { |
| 532 | case INTEL_DVO_CHIP_TMDS: |
Ville Syrjälä | bc079e8 | 2014-03-03 16:15:28 +0200 | [diff] [blame] | 533 | intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) | |
| 534 | (1 << INTEL_OUTPUT_DVO); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 535 | drm_connector_init(dev, connector, |
| 536 | &intel_dvo_connector_funcs, |
| 537 | DRM_MODE_CONNECTOR_DVII); |
| 538 | encoder_type = DRM_MODE_ENCODER_TMDS; |
| 539 | break; |
| 540 | case INTEL_DVO_CHIP_LVDS: |
Ville Syrjälä | bc079e8 | 2014-03-03 16:15:28 +0200 | [diff] [blame] | 541 | intel_encoder->cloneable = 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 542 | drm_connector_init(dev, connector, |
| 543 | &intel_dvo_connector_funcs, |
| 544 | DRM_MODE_CONNECTOR_LVDS); |
| 545 | encoder_type = DRM_MODE_ENCODER_LVDS; |
| 546 | break; |
| 547 | } |
| 548 | |
| 549 | drm_connector_helper_add(connector, |
| 550 | &intel_dvo_connector_helper_funcs); |
| 551 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 552 | connector->interlace_allowed = false; |
| 553 | connector->doublescan_allowed = false; |
| 554 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 555 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 556 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { |
| 557 | /* For our LVDS chipsets, we should hopefully be able |
| 558 | * to dig the fixed panel mode out of the BIOS data. |
| 559 | * However, it's in a different format from the BIOS |
| 560 | * data on chipsets with integrated LVDS (stored in AIM |
| 561 | * headers, likely), so for now, just get the current |
| 562 | * mode being output through DVO. |
| 563 | */ |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 564 | intel_dvo->panel_fixed_mode = |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 565 | intel_dvo_get_current_mode(connector); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 566 | intel_dvo->panel_wants_dither = true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 567 | } |
| 568 | |
Thomas Wood | 34ea3d3 | 2014-05-29 16:57:41 +0100 | [diff] [blame] | 569 | drm_connector_register(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 570 | return; |
| 571 | } |
| 572 | |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 573 | drm_encoder_cleanup(&intel_encoder->base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 574 | kfree(intel_dvo); |
Zhenyu Wang | 599be16 | 2010-03-29 16:17:31 +0800 | [diff] [blame] | 575 | kfree(intel_connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 576 | } |