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Paul Mundt96de1a82008-02-26 14:52:45 +09001#ifndef __LINUX_SERIAL_SCI_H
2#define __LINUX_SERIAL_SCI_H
Paul Mundtecd95612006-09-27 17:32:30 +09003
4#include <linux/serial_core.h>
Paul Mundt14baf9d2010-05-24 16:31:08 +09005#include <linux/sh_dma.h>
Paul Mundtecd95612006-09-27 17:32:30 +09006
7/*
Paul Mundt96de1a82008-02-26 14:52:45 +09008 * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
Paul Mundtecd95612006-09-27 17:32:30 +09009 */
10
Paul Mundtdebf9502011-06-08 18:19:37 +090011#define SCIx_NOT_SUPPORTED (-1)
12
Paul Mundt26c92f32009-06-24 18:23:52 +090013enum {
14 SCBRR_ALGO_1, /* ((clk + 16 * bps) / (16 * bps) - 1) */
15 SCBRR_ALGO_2, /* ((clk + 16 * bps) / (32 * bps) - 1) */
16 SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
17 SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
18 SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */
19};
20
Paul Mundt00b9de92009-06-24 17:53:33 +090021#define SCSCR_TIE (1 << 7)
22#define SCSCR_RIE (1 << 6)
23#define SCSCR_TE (1 << 5)
24#define SCSCR_RE (1 << 4)
Paul Mundtf43dc232011-01-13 15:06:28 +090025#define SCSCR_REIE (1 << 3) /* not supported by all parts */
Paul Mundt00b9de92009-06-24 17:53:33 +090026#define SCSCR_TOIE (1 << 2) /* not supported by all parts */
27#define SCSCR_CKE1 (1 << 1)
28#define SCSCR_CKE0 (1 << 0)
29
Paul Mundtdebf9502011-06-08 18:19:37 +090030/* SCxSR SCI */
31#define SCI_TDRE 0x80
32#define SCI_RDRF 0x40
33#define SCI_ORER 0x20
34#define SCI_FER 0x10
35#define SCI_PER 0x08
36#define SCI_TEND 0x04
37
38#define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
39
40/* SCxSR SCIF */
41#define SCIF_ER 0x0080
42#define SCIF_TEND 0x0040
43#define SCIF_TDFE 0x0020
44#define SCIF_BRK 0x0010
45#define SCIF_FER 0x0008
46#define SCIF_PER 0x0004
47#define SCIF_RDF 0x0002
48#define SCIF_DR 0x0001
49
50#define SCIF_DEFAULT_ERROR_MASK (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
51
Paul Mundtecd95612006-09-27 17:32:30 +090052/* Offsets into the sci_port->irqs array */
53enum {
54 SCIx_ERI_IRQ,
55 SCIx_RXI_IRQ,
56 SCIx_TXI_IRQ,
57 SCIx_BRI_IRQ,
58 SCIx_NR_IRQS,
Paul Mundt9174fc82011-06-28 15:25:36 +090059
60 SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */
Paul Mundtecd95612006-09-27 17:32:30 +090061};
62
Paul Mundt61a69762011-06-14 12:40:19 +090063enum {
64 SCIx_PROBE_REGTYPE,
65
66 SCIx_SCI_REGTYPE,
67 SCIx_IRDA_REGTYPE,
68 SCIx_SCIFA_REGTYPE,
69 SCIx_SCIFB_REGTYPE,
70 SCIx_SH3_SCIF_REGTYPE,
71 SCIx_SH4_SCIF_REGTYPE,
72 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
73 SCIx_SH4_SCIF_FIFODATA_REGTYPE,
74 SCIx_SH7705_SCIF_REGTYPE,
75
76 SCIx_NR_REGTYPES,
77};
78
Paul Mundt22cc8372011-01-19 14:37:14 +090079#define SCIx_IRQ_MUXED(irq) \
80{ \
81 [SCIx_ERI_IRQ] = (irq), \
82 [SCIx_RXI_IRQ] = (irq), \
83 [SCIx_TXI_IRQ] = (irq), \
84 [SCIx_BRI_IRQ] = (irq), \
85}
86
Paul Mundt9174fc82011-06-28 15:25:36 +090087#define SCIx_IRQ_IS_MUXED(port) \
88 ((port)->cfg->irqs[SCIx_ERI_IRQ] == \
89 (port)->cfg->irqs[SCIx_RXI_IRQ]) || \
90 ((port)->cfg->irqs[SCIx_ERI_IRQ] && \
91 !(port)->cfg->irqs[SCIx_RXI_IRQ])
Paul Mundt61a69762011-06-14 12:40:19 +090092/*
93 * SCI register subset common for all port types.
94 * Not all registers will exist on all parts.
95 */
96enum {
97 SCSMR, SCBRR, SCSCR, SCxSR,
98 SCFCR, SCFDR, SCxTDR, SCxRDR,
99 SCLSR, SCTFDR, SCRFDR, SCSPTR,
100
101 SCIx_NR_REGS,
102};
103
Guennadi Liakhovetski73a19e42010-03-02 11:39:15 +0900104struct device;
105
Paul Mundt61a69762011-06-14 12:40:19 +0900106struct plat_sci_port_ops {
107 void (*init_pins)(struct uart_port *, unsigned int cflag);
108};
109
Paul Mundtecd95612006-09-27 17:32:30 +0900110/*
111 * Platform device specific platform_data struct
112 */
113struct plat_sci_port {
Paul Mundtecd95612006-09-27 17:32:30 +0900114 unsigned long mapbase; /* resource base */
115 unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */
116 unsigned int type; /* SCI / SCIF / IRDA */
117 upf_t flags; /* UPF_* flags */
Paul Mundt00b9de92009-06-24 17:53:33 +0900118
Paul Mundt26c92f32009-06-24 18:23:52 +0900119 unsigned int scbrr_algo_id; /* SCBRR calculation algo */
Paul Mundt00b9de92009-06-24 17:53:33 +0900120 unsigned int scscr; /* SCSCR initialization */
Paul Mundtf43dc232011-01-13 15:06:28 +0900121
Paul Mundtdebf9502011-06-08 18:19:37 +0900122 /*
123 * Platform overrides if necessary, defaults otherwise.
124 */
125 int overrun_bit;
126 unsigned int error_mask;
127
Paul Mundt514820e2011-06-08 18:51:32 +0900128 int port_reg;
Paul Mundt61a69762011-06-14 12:40:19 +0900129 unsigned char regshift;
130 unsigned char regtype;
131
132 struct plat_sci_port_ops *ops;
Paul Mundt514820e2011-06-08 18:51:32 +0900133
Guennadi Liakhovetski73a19e42010-03-02 11:39:15 +0900134 struct device *dma_dev;
Paul Mundtf43dc232011-01-13 15:06:28 +0900135
Paul Mundt27bd1072011-01-19 15:37:31 +0900136 unsigned int dma_slave_tx;
137 unsigned int dma_slave_rx;
Paul Mundtecd95612006-09-27 17:32:30 +0900138};
139
Paul Mundt96de1a82008-02-26 14:52:45 +0900140#endif /* __LINUX_SERIAL_SCI_H */