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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_SH_PGTABLE_H
2#define __ASM_SH_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6/*
7 * Copyright (C) 1999 Niibe Yutaka
8 * Copyright (C) 2002, 2003, 2004 Paul Mundt
9 */
10
11#include <linux/config.h>
12#include <asm/pgtable-2level.h>
13
14/*
15 * This file contains the functions and defines necessary to modify and use
16 * the SuperH page table tree.
17 */
18#ifndef __ASSEMBLY__
19#include <asm/processor.h>
20#include <asm/addrspace.h>
21#include <asm/fixmap.h>
22#include <linux/threads.h>
23
24extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
25extern void paging_init(void);
26
27/*
28 * Basically we have the same two-level (which is the logical three level
29 * Linux page table layout folded) page tables as the i386.
30 */
31
32/*
33 * ZERO_PAGE is a global shared page that is always zero: used
34 * for zero-mapped memory areas etc..
35 */
36extern unsigned long empty_zero_page[1024];
37#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
38
39#endif /* !__ASSEMBLY__ */
40
41#define PMD_SIZE (1UL << PMD_SHIFT)
42#define PMD_MASK (~(PMD_SIZE-1))
43#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
44#define PGDIR_MASK (~(PGDIR_SIZE-1))
45
46#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
Hugh Dickinsd455a362005-04-19 13:29:23 -070047#define FIRST_USER_ADDRESS 0
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
49#define PTE_PHYS_MASK 0x1ffff000
50
51#ifndef __ASSEMBLY__
52/*
53 * First 1MB map is used by fixed purpose.
54 * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
55 */
56#define VMALLOC_START (P3SEG+0x00100000)
57#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
58
59#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
60#define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */
61#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
62#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
63#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
64#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
65#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed */
66#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
67#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
68#define _PAGE_PROTNONE 0x200 /* software: if not present */
69#define _PAGE_ACCESSED 0x400 /* software: page referenced */
70#define _PAGE_U0_SHARED 0x800 /* software: page is shared in user space */
71
72#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
73
74/* software: moves to PTEA.TC (Timing Control) */
75#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
76#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
77
78/* software: moves to PTEA.SA[2:0] (Space Attributes) */
79#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
80#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
81#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
82#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
83#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
84#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
85#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
86
87
88/* Mask which drop software flags
89 * We also drop WT bit since it is used for _PAGE_FILE
90 * bit in this implementation.
91 */
92#define _PAGE_CLEAR_FLAGS (_PAGE_WT | _PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_U0_SHARED)
93
94#if defined(CONFIG_CPU_SH3)
95/*
96 * MMU on SH-3 has bug on SH-bit: We can't use it if MMUCR.IX=1.
97 * Work around: Just drop SH-bit.
98 */
99#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS | _PAGE_HW_SHARED))
100#else
101#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
102#endif
103
104/* Hardware flags: SZ0=1 (4k-byte) */
105#define _PAGE_FLAGS_HARD _PAGE_SZ0
106
107#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
108#define _PAGE_SZHUGE (_PAGE_SZ1)
109#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
110#define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
111#endif
112
113#define _PAGE_SHARED _PAGE_U0_SHARED
114
115#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
116#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
117#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED)
118
119#ifdef CONFIG_MMU
120#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
121#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_SHARED | _PAGE_FLAGS_HARD)
122#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
123#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
124#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
125#define PAGE_KERNEL_NOCACHE \
126 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
127#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
128#define PAGE_KERNEL_PCC(slot, type) \
129 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type))
130#else /* no mmu */
131#define PAGE_NONE __pgprot(0)
132#define PAGE_SHARED __pgprot(0)
133#define PAGE_COPY __pgprot(0)
134#define PAGE_READONLY __pgprot(0)
135#define PAGE_KERNEL __pgprot(0)
136#define PAGE_KERNEL_NOCACHE __pgprot(0)
137#define PAGE_KERNEL_RO __pgprot(0)
138#define PAGE_KERNEL_PCC __pgprot(0)
139#endif
140
141/*
142 * As i386 and MIPS, SuperH can't do page protection for execute, and
143 * considers that the same as a read. Also, write permissions imply
144 * read permissions. This is the closest we can get..
145 */
146
147#define __P000 PAGE_NONE
148#define __P001 PAGE_READONLY
149#define __P010 PAGE_COPY
150#define __P011 PAGE_COPY
151#define __P100 PAGE_READONLY
152#define __P101 PAGE_READONLY
153#define __P110 PAGE_COPY
154#define __P111 PAGE_COPY
155
156#define __S000 PAGE_NONE
157#define __S001 PAGE_READONLY
158#define __S010 PAGE_SHARED
159#define __S011 PAGE_SHARED
160#define __S100 PAGE_READONLY
161#define __S101 PAGE_READONLY
162#define __S110 PAGE_SHARED
163#define __S111 PAGE_SHARED
164
165#define pte_none(x) (!pte_val(x))
166#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
167#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
168
169#define pmd_none(x) (!pmd_val(x))
170#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
171#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
172#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
173
174#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
175#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK)
176
177/*
178 * The following only work if pte_present() is true.
179 * Undefined behaviour if not..
180 */
181static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
182static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
183static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; }
184static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; }
185static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
186static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; }
187static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); }
188
189static inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
190static inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
191static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
192static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
193static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
194static inline pte_t pte_mkread(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
195static inline pte_t pte_mkexec(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
196static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
197static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
198static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
David Gibson63551ae2005-06-21 17:14:44 -0700199static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200
201/*
202 * Macro and implementation to make a page protection as uncachable.
203 */
204#define pgprot_noncached pgprot_noncached
205
206static inline pgprot_t pgprot_noncached(pgprot_t _prot)
207{
208 unsigned long prot = pgprot_val(_prot);
209
210 prot &= ~_PAGE_CACHABLE;
211 return __pgprot(prot);
212}
213
214#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
215
216/*
217 * Conversion functions: convert a page and protection to a page entry,
218 * and a page entry and page directory to the page they refer to.
219 *
220 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
221 */
222#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
223
224static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
225{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
226
227#define page_pte(page) page_pte_prot(page, __pgprot(0))
228
229#define pmd_page_kernel(pmd) \
230((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
231
232#define pmd_page(pmd) \
233 (phys_to_page(pmd_val(pmd)))
234
235/* to find an entry in a page-table-directory. */
236#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
237#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
238
239/* to find an entry in a kernel page-table-directory */
240#define pgd_offset_k(address) pgd_offset(&init_mm, address)
241
242/* Find an entry in the third-level page table.. */
243#define pte_index(address) \
244 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
245#define pte_offset_kernel(dir, address) \
246 ((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
247#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
248#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
249#define pte_unmap(pte) do { } while (0)
250#define pte_unmap_nested(pte) do { } while (0)
251
252struct vm_area_struct;
253extern void update_mmu_cache(struct vm_area_struct * vma,
254 unsigned long address, pte_t pte);
255
256/* Encode and de-code a swap entry */
257/*
258 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
259 * and _PAGE_PROTNONE bits
260 */
261#define __swp_type(x) ((x).val & 0xff)
262#define __swp_offset(x) ((x).val >> 10)
263#define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) })
264#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
265#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
266
267/*
268 * Encode and decode a nonlinear file mapping entry
269 */
270#define PTE_FILE_MAX_BITS 29
271#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
272#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
273
274typedef pte_t *pte_addr_t;
275
276#endif /* !__ASSEMBLY__ */
277
278#define kern_addr_valid(addr) (1)
279
280#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
281 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
282
283#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
284 remap_pfn_range(vma, vaddr, pfn, size, prot)
285
286#define MK_IOSPACE_PFN(space, pfn) (pfn)
287#define GET_IOSPACE(pfn) 0
288#define GET_PFN(pfn) (pfn)
289
290/*
291 * No page table caches to initialise
292 */
293#define pgtable_cache_init() do { } while (0)
294
295#ifndef CONFIG_MMU
296extern unsigned int kobjsize(const void *objp);
297#endif /* !CONFIG_MMU */
298
299#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
300#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
301extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
302#endif
303
304#include <asm-generic/pgtable.h>
305
306#endif /* __ASM_SH_PAGE_H */
307