Beniamino Galvani | eae266a | 2014-06-21 16:22:07 +0200 | [diff] [blame] | 1 | Rockchip PWM controller |
| 2 | |
| 3 | Required properties: |
Caesar Wang | 695d49d | 2014-08-08 15:28:48 +0800 | [diff] [blame] | 4 | - compatible: should be "rockchip,<name>-pwm" |
| 5 | "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs |
| 6 | "rockchip,rk3288-pwm": found on RK3288 SoC |
| 7 | "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC |
Beniamino Galvani | eae266a | 2014-06-21 16:22:07 +0200 | [diff] [blame] | 8 | - reg: physical base address and length of the controller's registers |
| 9 | - clocks: phandle and clock specifier of the PWM reference clock |
Doug Anderson | 7264354 | 2014-08-25 15:59:25 -0700 | [diff] [blame] | 10 | - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory |
| 11 | for a description of the cell format. |
Beniamino Galvani | eae266a | 2014-06-21 16:22:07 +0200 | [diff] [blame] | 12 | |
| 13 | Example: |
| 14 | |
| 15 | pwm0: pwm@20030000 { |
| 16 | compatible = "rockchip,rk2928-pwm"; |
| 17 | reg = <0x20030000 0x10>; |
| 18 | clocks = <&cru PCLK_PWM01>; |
| 19 | #pwm-cells = <2>; |
| 20 | }; |