Michael Hennerich | 3322c7b | 2010-07-06 13:57:12 +0000 | [diff] [blame] | 1 | SPI Chip Select behavior: |
| 2 | |
| 3 | With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA |
| 4 | bit whether the Slave Select Line is controlled by hardware (CPHA=0) or |
| 5 | controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that |
| 6 | the Slave Select is always under software control and being asserted during |
| 7 | the entire SPI transfer. - And not just bits_per_word duration. |
| 8 | |
| 9 | In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this |
| 10 | behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2 |
| 11 | timing, you can utilize the GPIO controlled SPI Slave Select option instead. |
| 12 | |
| 13 | You can even use the same pin whose peripheral role is a SSEL, |
| 14 | but use it as a GPIO instead. |