Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG |
| 3 | * |
| 4 | * This is an 64bit optimized version that always keeps the full mmconfig |
| 5 | * space mapped. This allows lockless config space operation. |
| 6 | */ |
| 7 | |
| 8 | #include <linux/pci.h> |
| 9 | #include <linux/init.h> |
Greg Kroah-Hartman | 5454939 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 10 | #include <linux/acpi.h> |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 11 | #include <linux/bitmap.h> |
Arjan van de Ven | 946f2ee | 2006-04-07 19:49:30 +0200 | [diff] [blame^] | 12 | #include <asm/e820.h> |
| 13 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include "pci.h" |
| 15 | |
| 16 | #define MMCONFIG_APER_SIZE (256*1024*1024) |
| 17 | |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 18 | static DECLARE_BITMAP(fallback_slots, 32); |
| 19 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | /* Static virtual mapping of the MMCONFIG aperture */ |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 21 | struct mmcfg_virt { |
| 22 | struct acpi_table_mcfg_config *cfg; |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 23 | char __iomem *virt; |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 24 | }; |
| 25 | static struct mmcfg_virt *pci_mmcfg_virt; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 27 | static char __iomem *get_virt(unsigned int seg, unsigned bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | { |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 29 | int cfg_num = -1; |
| 30 | struct acpi_table_mcfg_config *cfg; |
| 31 | |
| 32 | while (1) { |
| 33 | ++cfg_num; |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 34 | if (cfg_num >= pci_mmcfg_config_num) |
| 35 | break; |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 36 | cfg = pci_mmcfg_virt[cfg_num].cfg; |
| 37 | if (cfg->pci_segment_group_number != seg) |
| 38 | continue; |
| 39 | if ((cfg->start_bus_number <= bus) && |
| 40 | (cfg->end_bus_number >= bus)) |
| 41 | return pci_mmcfg_virt[cfg_num].virt; |
| 42 | } |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 43 | |
| 44 | /* Handle more broken MCFG tables on Asus etc. |
| 45 | They only contain a single entry for bus 0-0. Assume |
| 46 | this applies to all busses. */ |
| 47 | cfg = &pci_mmcfg_config[0]; |
| 48 | if (pci_mmcfg_config_num == 1 && |
| 49 | cfg->pci_segment_group_number == 0 && |
| 50 | (cfg->start_bus_number | cfg->end_bus_number) == 0) |
Andi Kleen | 1de6bf3 | 2006-02-03 21:51:29 +0100 | [diff] [blame] | 51 | return pci_mmcfg_virt[0].virt; |
Andi Kleen | 3103039 | 2006-01-27 02:03:50 +0100 | [diff] [blame] | 52 | |
| 53 | /* Fall back to type 0 */ |
Al Viro | cc59853 | 2006-02-03 20:28:01 -0500 | [diff] [blame] | 54 | return NULL; |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 55 | } |
| 56 | |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 57 | static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 58 | { |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 59 | char __iomem *addr; |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 60 | if (seg == 0 && bus == 0 && test_bit(PCI_SLOT(devfn), fallback_slots)) |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 61 | return NULL; |
| 62 | addr = get_virt(seg, bus); |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 63 | if (!addr) |
| 64 | return NULL; |
| 65 | return addr + ((bus << 20) | (devfn << 12)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, |
| 69 | unsigned int devfn, int reg, int len, u32 *value) |
| 70 | { |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 71 | char __iomem *addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 73 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | if (unlikely(!value || (bus > 255) || (devfn > 255) || (reg > 4095))) |
| 75 | return -EINVAL; |
| 76 | |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 77 | addr = pci_dev_base(seg, bus, devfn); |
| 78 | if (!addr) |
| 79 | return pci_conf1_read(seg,bus,devfn,reg,len,value); |
| 80 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | switch (len) { |
| 82 | case 1: |
| 83 | *value = readb(addr + reg); |
| 84 | break; |
| 85 | case 2: |
| 86 | *value = readw(addr + reg); |
| 87 | break; |
| 88 | case 4: |
| 89 | *value = readl(addr + reg); |
| 90 | break; |
| 91 | } |
| 92 | |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, |
| 97 | unsigned int devfn, int reg, int len, u32 value) |
| 98 | { |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 99 | char __iomem *addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 101 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) |
| 103 | return -EINVAL; |
| 104 | |
Andi Kleen | 928cf8c | 2005-12-12 22:17:10 -0800 | [diff] [blame] | 105 | addr = pci_dev_base(seg, bus, devfn); |
| 106 | if (!addr) |
| 107 | return pci_conf1_write(seg,bus,devfn,reg,len,value); |
| 108 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | switch (len) { |
| 110 | case 1: |
| 111 | writeb(value, addr + reg); |
| 112 | break; |
| 113 | case 2: |
| 114 | writew(value, addr + reg); |
| 115 | break; |
| 116 | case 4: |
| 117 | writel(value, addr + reg); |
| 118 | break; |
| 119 | } |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | static struct pci_raw_ops pci_mmcfg = { |
| 125 | .read = pci_mmcfg_read, |
| 126 | .write = pci_mmcfg_write, |
| 127 | }; |
| 128 | |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 129 | /* K8 systems have some devices (typically in the builtin northbridge) |
| 130 | that are only accessible using type1 |
| 131 | Normally this can be expressed in the MCFG by not listing them |
| 132 | and assigning suitable _SEGs, but this isn't implemented in some BIOS. |
| 133 | Instead try to discover all devices on bus 0 that are unreachable using MM |
| 134 | and fallback for them. |
| 135 | We only do this for bus 0/seg 0 */ |
| 136 | static __init void unreachable_devices(void) |
| 137 | { |
| 138 | int i; |
| 139 | for (i = 0; i < 32; i++) { |
| 140 | u32 val1; |
Al Viro | 8b8a4e3 | 2005-12-15 09:17:44 +0000 | [diff] [blame] | 141 | char __iomem *addr; |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 142 | |
| 143 | pci_conf1_read(0, 0, PCI_DEVFN(i,0), 0, 4, &val1); |
| 144 | if (val1 == 0xffffffff) |
| 145 | continue; |
| 146 | addr = pci_dev_base(0, 0, PCI_DEVFN(i, 0)); |
| 147 | if (addr == NULL|| readl(addr) != val1) { |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 148 | set_bit(i, fallback_slots); |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 149 | } |
| 150 | } |
| 151 | } |
| 152 | |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 153 | void __init pci_mmcfg_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | { |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 155 | int i; |
| 156 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 158 | return; |
Greg Kroah-Hartman | 5454939 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 159 | |
| 160 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); |
| 161 | if ((pci_mmcfg_config_num == 0) || |
| 162 | (pci_mmcfg_config == NULL) || |
| 163 | (pci_mmcfg_config[0].base_address == 0)) |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 164 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | |
Arjan van de Ven | 946f2ee | 2006-04-07 19:49:30 +0200 | [diff] [blame^] | 166 | if (!e820_all_mapped(pci_mmcfg_config[0].base_address, |
| 167 | pci_mmcfg_config[0].base_address + MMCONFIG_APER_SIZE, |
| 168 | E820_RESERVED)) { |
| 169 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area is not E820-reserved\n"); |
| 170 | printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); |
| 171 | return; |
| 172 | } |
| 173 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | /* RED-PEN i386 doesn't do _nocache right now */ |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 175 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL); |
| 176 | if (pci_mmcfg_virt == NULL) { |
| 177 | printk("PCI: Can not allocate memory for mmconfig structures\n"); |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 178 | return; |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 179 | } |
| 180 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
| 181 | pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i]; |
| 182 | pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address, MMCONFIG_APER_SIZE); |
| 183 | if (!pci_mmcfg_virt[i].virt) { |
| 184 | printk("PCI: Cannot map mmconfig aperture for segment %d\n", |
| 185 | pci_mmcfg_config[i].pci_segment_group_number); |
Akinobu Mita | 3d1712c | 2006-03-24 03:15:11 -0800 | [diff] [blame] | 186 | return; |
Greg Kroah-Hartman | 1cde8a1 | 2005-06-23 17:35:56 -0700 | [diff] [blame] | 187 | } |
| 188 | printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address); |
| 189 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
Andi Kleen | d6ece54 | 2005-12-12 22:17:11 -0800 | [diff] [blame] | 191 | unreachable_devices(); |
| 192 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | raw_pci_ops = &pci_mmcfg; |
| 194 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | } |