blob: 122e0e4029fee9e42f4b1ba37f0439728f0d54a4 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Driver for 8250/16550-type serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Copyright (C) 2001 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Russell Kingbc49a662005-09-01 15:56:26 +010014#include <linux/serial_8250.h>
Yoshihiro YUNOMAEaef9a7b2014-07-16 01:19:36 +000015#include <linux/serial_reg.h>
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020016#include <linux/dmaengine.h>
17
Yegor Yefremov4ef03d32016-05-31 10:59:18 +020018#include "../serial_mctrl_gpio.h"
19
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020020struct uart_8250_dma {
Sebastian Andrzej Siewiorf1a297b2014-09-29 20:06:42 +020021 int (*tx_dma)(struct uart_8250_port *p);
Peter Hurley33d9b8b22016-04-09 22:14:36 -070022 int (*rx_dma)(struct uart_8250_port *p);
Sebastian Andrzej Siewiorf1a297b2014-09-29 20:06:42 +020023
Andy Shevchenko9a1870c2014-08-19 20:29:22 +030024 /* Filter function */
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020025 dma_filter_fn fn;
Andy Shevchenko9a1870c2014-08-19 20:29:22 +030026 /* Parameter to the filter function */
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020027 void *rx_param;
28 void *tx_param;
29
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020030 struct dma_slave_config rxconf;
31 struct dma_slave_config txconf;
32
33 struct dma_chan *rxchan;
34 struct dma_chan *txchan;
35
36 dma_addr_t rx_addr;
37 dma_addr_t tx_addr;
38
39 dma_cookie_t rx_cookie;
40 dma_cookie_t tx_cookie;
41
42 void *rx_buf;
43
44 size_t rx_size;
45 size_t tx_size;
46
John Ognesseafb9ee2015-08-14 18:01:02 +020047 unsigned char tx_running;
48 unsigned char tx_err;
49 unsigned char rx_running;
Heikki Krogerus9ee4b832013-01-10 11:25:11 +020050};
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
52struct old_serial_port {
53 unsigned int uart;
54 unsigned int baud_base;
55 unsigned int port;
56 unsigned int irq;
Andy Shevchenko079119a2015-03-11 13:52:53 +020057 upf_t flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -070058 unsigned char io_type;
Sudip Mukherjee7f1dc2f2014-10-16 14:16:22 +053059 unsigned char __iomem *iomem_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 unsigned short iomem_reg_shift;
61};
62
Linus Torvalds1da177e2005-04-16 15:20:36 -070063struct serial8250_config {
64 const char *name;
65 unsigned short fifo_size;
66 unsigned short tx_loadsz;
67 unsigned char fcr;
Yoshihiro YUNOMAEaef9a7b2014-07-16 01:19:36 +000068 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 unsigned int flags;
70};
71
72#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
73#define UART_CAP_EFR (1 << 9) /* UART has EFR */
74#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
75#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
76#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
Stephen Warren4539c242011-05-17 16:12:36 -060077#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
Stephen Hurdebebd492013-01-17 14:14:53 -080078#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
Sebastian Andrzej Siewiord74d5d12014-09-10 21:29:57 +020079#define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
Russell King4ba5e352005-06-23 10:43:04 +010081#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
Russell King55d3b282005-06-23 15:05:41 +010082#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
Pantelis Antoniou21c614a2005-11-06 09:07:03 +000083#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
Will Newton363f66f2008-09-02 14:35:44 -070084#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
Alan Coxeb26dfe2012-07-12 13:00:31 +010085#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
Russell King4ba5e352005-06-23 10:43:04 +010086
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
88#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
89#define SERIAL8250_SHARE_IRQS 1
90#else
91#define SERIAL8250_SHARE_IRQS 0
92#endif
93
Anton Wuerfelb3bd6662016-01-14 16:08:24 +010094#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
95 { \
96 .iobase = _base, \
97 .irq = _irq, \
98 .uartclk = 1843200, \
99 .iotype = UPIO_PORT, \
100 .flags = UPF_BOOT_AUTOCONF | (_flags), \
101 }
102
103#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
104
105
Paul Gortmaker3f0ab322012-03-08 19:12:09 -0500106static inline int serial_in(struct uart_8250_port *up, int offset)
107{
108 return up->port.serial_in(&up->port, offset);
109}
110
111static inline void serial_out(struct uart_8250_port *up, int offset, int value)
112{
113 up->port.serial_out(&up->port, offset, value);
114}
115
Sudhakar Mamillapalli0ad372b2012-04-10 14:10:58 -0700116void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
117
Magnus Dammcc419fa02012-05-02 21:46:51 +0900118static inline int serial_dl_read(struct uart_8250_port *up)
119{
120 return up->dl_read(up);
121}
122
123static inline void serial_dl_write(struct uart_8250_port *up, int value)
124{
125 up->dl_write(up, value);
126}
127
Sebastian Andrzej Siewiorae14a792014-09-05 21:02:36 +0200128struct uart_8250_port *serial8250_get_port(int line);
Sebastian Andrzej Siewior77285242014-09-29 20:06:48 +0200129void serial8250_rpm_get(struct uart_8250_port *p);
130void serial8250_rpm_put(struct uart_8250_port *p);
Matwey V. Kornilove490c912016-02-01 21:09:21 +0300131int serial8250_em485_init(struct uart_8250_port *p);
132void serial8250_em485_destroy(struct uart_8250_port *p);
Sebastian Andrzej Siewiorae14a792014-09-05 21:02:36 +0200133
Yegor Yefremov36fd95b2016-05-31 10:59:15 +0200134static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
135{
Yegor Yefremov4ef03d32016-05-31 10:59:18 +0200136 int mctrl_gpio = 0;
137
Yegor Yefremov36fd95b2016-05-31 10:59:15 +0200138 serial_out(up, UART_MCR, value);
Yegor Yefremov4ef03d32016-05-31 10:59:18 +0200139
140 if (value & UART_MCR_RTS)
141 mctrl_gpio |= TIOCM_RTS;
142 if (value & UART_MCR_DTR)
143 mctrl_gpio |= TIOCM_DTR;
144
145 mctrl_gpio_set(up->gpios, mctrl_gpio);
Yegor Yefremov36fd95b2016-05-31 10:59:15 +0200146}
147
148static inline int serial8250_in_MCR(struct uart_8250_port *up)
149{
Yegor Yefremov4ef03d32016-05-31 10:59:18 +0200150 int mctrl, mctrl_gpio = 0;
151
152 mctrl = serial_in(up, UART_MCR);
153
154 /* save current MCR values */
155 if (mctrl & UART_MCR_RTS)
156 mctrl_gpio |= TIOCM_RTS;
157 if (mctrl & UART_MCR_DTR)
158 mctrl_gpio |= TIOCM_DTR;
159
160 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
161
162 if (mctrl_gpio & TIOCM_RTS)
163 mctrl |= UART_MCR_RTS;
164 else
165 mctrl &= ~UART_MCR_RTS;
166
167 if (mctrl_gpio & TIOCM_DTR)
168 mctrl |= UART_MCR_DTR;
169 else
170 mctrl &= ~UART_MCR_DTR;
171
172 return mctrl;
Yegor Yefremov36fd95b2016-05-31 10:59:15 +0200173}
174
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175#if defined(__alpha__) && !defined(CONFIG_PCI)
176/*
177 * Digital did something really horribly wrong with the OUT1 and OUT2
178 * lines on at least some ALPHA's. The failure mode is that if either
179 * is cleared, the machine locks up with endless interrupts.
180 */
181#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182#else
183#define ALPHA_KLUDGE_MCR 0
184#endif
Sean Young835d8442012-09-07 19:06:23 +0100185
186#ifdef CONFIG_SERIAL_8250_PNP
187int serial8250_pnp_init(void);
188void serial8250_pnp_exit(void);
189#else
190static inline int serial8250_pnp_init(void) { return 0; }
191static inline void serial8250_pnp_exit(void) { }
192#endif
193
Ricardo Ribalda Delgadofa01e2c2016-04-27 10:40:10 +0200194#ifdef CONFIG_SERIAL_8250_FINTEK
195int fintek_8250_probe(struct uart_8250_port *uart);
196#else
197static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
198#endif
199
Tony Lindgren54ec52b2012-10-03 15:31:58 -0700200#ifdef CONFIG_ARCH_OMAP1
201static inline int is_omap1_8250(struct uart_8250_port *pt)
202{
203 int res;
204
205 switch (pt->port.mapbase) {
206 case OMAP1_UART1_BASE:
207 case OMAP1_UART2_BASE:
208 case OMAP1_UART3_BASE:
209 res = 1;
210 break;
211 default:
212 res = 0;
213 break;
214 }
215
216 return res;
217}
218
219static inline int is_omap1510_8250(struct uart_8250_port *pt)
220{
221 if (!cpu_is_omap1510())
222 return 0;
223
224 return is_omap1_8250(pt);
225}
226#else
227static inline int is_omap1_8250(struct uart_8250_port *pt)
228{
229 return 0;
230}
231static inline int is_omap1510_8250(struct uart_8250_port *pt)
232{
233 return 0;
234}
235#endif
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200236
237#ifdef CONFIG_SERIAL_8250_DMA
238extern int serial8250_tx_dma(struct uart_8250_port *);
Peter Hurley33d9b8b22016-04-09 22:14:36 -0700239extern int serial8250_rx_dma(struct uart_8250_port *);
240extern void serial8250_rx_dma_flush(struct uart_8250_port *);
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200241extern int serial8250_request_dma(struct uart_8250_port *);
242extern void serial8250_release_dma(struct uart_8250_port *);
243#else
244static inline int serial8250_tx_dma(struct uart_8250_port *p)
245{
246 return -1;
247}
Peter Hurley33d9b8b22016-04-09 22:14:36 -0700248static inline int serial8250_rx_dma(struct uart_8250_port *p)
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200249{
250 return -1;
251}
Peter Hurley33d9b8b22016-04-09 22:14:36 -0700252static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
Heikki Krogerus9ee4b832013-01-10 11:25:11 +0200253static inline int serial8250_request_dma(struct uart_8250_port *p)
254{
255 return -1;
256}
257static inline void serial8250_release_dma(struct uart_8250_port *p) { }
258#endif
Peter Hurleyd81e50f2015-02-24 14:25:04 -0500259
260static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
261{
262 unsigned char status;
263
264 status = serial_in(up, 0x04); /* EXCR2 */
265#define PRESL(x) ((x) & 0x30)
266 if (PRESL(status) == 0x10) {
267 /* already in high speed mode */
268 return 0;
269 } else {
270 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
271 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
272 serial_out(up, 0x04, status);
273 }
274 return 1;
275}
Peter Hurleyb6830f62015-06-27 09:19:00 -0400276
277static inline int serial_index(struct uart_port *port)
278{
279 return port->minor - 64;
280}