Greg Kroah-Hartman | 3c05bed | 2014-01-21 11:20:45 -0800 | [diff] [blame] | 1 | //============================================================ |
| 2 | // Description: |
| 3 | // |
| 4 | // This file is for 8192e1ant Co-exist mechanism |
| 5 | // |
| 6 | // History |
| 7 | // 2012/11/15 Cosa first check in. |
| 8 | // |
| 9 | //============================================================ |
| 10 | |
| 11 | //============================================================ |
| 12 | // include files |
| 13 | //============================================================ |
| 14 | #include "Mp_Precomp.h" |
| 15 | #if(BT_30_SUPPORT == 1) |
| 16 | //============================================================ |
| 17 | // Global variables, these are static variables |
| 18 | //============================================================ |
| 19 | static COEX_DM_8192E_1ANT GLCoexDm8192e1Ant; |
| 20 | static PCOEX_DM_8192E_1ANT pCoexDm=&GLCoexDm8192e1Ant; |
| 21 | static COEX_STA_8192E_1ANT GLCoexSta8192e1Ant; |
| 22 | static PCOEX_STA_8192E_1ANT pCoexSta=&GLCoexSta8192e1Ant; |
| 23 | |
| 24 | const char *const GLBtInfoSrc8192e1Ant[]={ |
| 25 | "BT Info[wifi fw]", |
| 26 | "BT Info[bt rsp]", |
| 27 | "BT Info[bt auto report]", |
| 28 | }; |
| 29 | |
| 30 | u4Byte GLCoexVerDate8192e1Ant=20130729; |
| 31 | u4Byte GLCoexVer8192e1Ant=0x10; |
| 32 | |
| 33 | //============================================================ |
| 34 | // local function proto type if needed |
| 35 | //============================================================ |
| 36 | //============================================================ |
| 37 | // local function start with halbtc8192e1ant_ |
| 38 | //============================================================ |
| 39 | u1Byte |
| 40 | halbtc8192e1ant_BtRssiState( |
| 41 | u1Byte levelNum, |
| 42 | u1Byte rssiThresh, |
| 43 | u1Byte rssiThresh1 |
| 44 | ) |
| 45 | { |
| 46 | s4Byte btRssi=0; |
| 47 | u1Byte btRssiState=pCoexSta->preBtRssiState; |
| 48 | |
| 49 | btRssi = pCoexSta->btRssi; |
| 50 | |
| 51 | if(levelNum == 2) |
| 52 | { |
| 53 | if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || |
| 54 | (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) |
| 55 | { |
| 56 | if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) |
| 57 | { |
| 58 | btRssiState = BTC_RSSI_STATE_HIGH; |
| 59 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n")); |
| 60 | } |
| 61 | else |
| 62 | { |
| 63 | btRssiState = BTC_RSSI_STATE_STAY_LOW; |
| 64 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n")); |
| 65 | } |
| 66 | } |
| 67 | else |
| 68 | { |
| 69 | if(btRssi < rssiThresh) |
| 70 | { |
| 71 | btRssiState = BTC_RSSI_STATE_LOW; |
| 72 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n")); |
| 73 | } |
| 74 | else |
| 75 | { |
| 76 | btRssiState = BTC_RSSI_STATE_STAY_HIGH; |
| 77 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n")); |
| 78 | } |
| 79 | } |
| 80 | } |
| 81 | else if(levelNum == 3) |
| 82 | { |
| 83 | if(rssiThresh > rssiThresh1) |
| 84 | { |
| 85 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi thresh error!!\n")); |
| 86 | return pCoexSta->preBtRssiState; |
| 87 | } |
| 88 | |
| 89 | if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || |
| 90 | (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) |
| 91 | { |
| 92 | if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) |
| 93 | { |
| 94 | btRssiState = BTC_RSSI_STATE_MEDIUM; |
| 95 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n")); |
| 96 | } |
| 97 | else |
| 98 | { |
| 99 | btRssiState = BTC_RSSI_STATE_STAY_LOW; |
| 100 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n")); |
| 101 | } |
| 102 | } |
| 103 | else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || |
| 104 | (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) |
| 105 | { |
| 106 | if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) |
| 107 | { |
| 108 | btRssiState = BTC_RSSI_STATE_HIGH; |
| 109 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n")); |
| 110 | } |
| 111 | else if(btRssi < rssiThresh) |
| 112 | { |
| 113 | btRssiState = BTC_RSSI_STATE_LOW; |
| 114 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n")); |
| 115 | } |
| 116 | else |
| 117 | { |
| 118 | btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; |
| 119 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Medium\n")); |
| 120 | } |
| 121 | } |
| 122 | else |
| 123 | { |
| 124 | if(btRssi < rssiThresh1) |
| 125 | { |
| 126 | btRssiState = BTC_RSSI_STATE_MEDIUM; |
| 127 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n")); |
| 128 | } |
| 129 | else |
| 130 | { |
| 131 | btRssiState = BTC_RSSI_STATE_STAY_HIGH; |
| 132 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n")); |
| 133 | } |
| 134 | } |
| 135 | } |
| 136 | |
| 137 | pCoexSta->preBtRssiState = btRssiState; |
| 138 | |
| 139 | return btRssiState; |
| 140 | } |
| 141 | |
| 142 | u1Byte |
| 143 | halbtc8192e1ant_WifiRssiState( |
| 144 | IN PBTC_COEXIST pBtCoexist, |
| 145 | IN u1Byte index, |
| 146 | IN u1Byte levelNum, |
| 147 | IN u1Byte rssiThresh, |
| 148 | IN u1Byte rssiThresh1 |
| 149 | ) |
| 150 | { |
| 151 | s4Byte wifiRssi=0; |
| 152 | u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; |
| 153 | |
| 154 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); |
| 155 | |
| 156 | if(levelNum == 2) |
| 157 | { |
| 158 | if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || |
| 159 | (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) |
| 160 | { |
| 161 | if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) |
| 162 | { |
| 163 | wifiRssiState = BTC_RSSI_STATE_HIGH; |
| 164 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n")); |
| 165 | } |
| 166 | else |
| 167 | { |
| 168 | wifiRssiState = BTC_RSSI_STATE_STAY_LOW; |
| 169 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n")); |
| 170 | } |
| 171 | } |
| 172 | else |
| 173 | { |
| 174 | if(wifiRssi < rssiThresh) |
| 175 | { |
| 176 | wifiRssiState = BTC_RSSI_STATE_LOW; |
| 177 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n")); |
| 178 | } |
| 179 | else |
| 180 | { |
| 181 | wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; |
| 182 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n")); |
| 183 | } |
| 184 | } |
| 185 | } |
| 186 | else if(levelNum == 3) |
| 187 | { |
| 188 | if(rssiThresh > rssiThresh1) |
| 189 | { |
| 190 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n")); |
| 191 | return pCoexSta->preWifiRssiState[index]; |
| 192 | } |
| 193 | |
| 194 | if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || |
| 195 | (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) |
| 196 | { |
| 197 | if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) |
| 198 | { |
| 199 | wifiRssiState = BTC_RSSI_STATE_MEDIUM; |
| 200 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n")); |
| 201 | } |
| 202 | else |
| 203 | { |
| 204 | wifiRssiState = BTC_RSSI_STATE_STAY_LOW; |
| 205 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n")); |
| 206 | } |
| 207 | } |
| 208 | else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || |
| 209 | (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) |
| 210 | { |
| 211 | if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT)) |
| 212 | { |
| 213 | wifiRssiState = BTC_RSSI_STATE_HIGH; |
| 214 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n")); |
| 215 | } |
| 216 | else if(wifiRssi < rssiThresh) |
| 217 | { |
| 218 | wifiRssiState = BTC_RSSI_STATE_LOW; |
| 219 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n")); |
| 220 | } |
| 221 | else |
| 222 | { |
| 223 | wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; |
| 224 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n")); |
| 225 | } |
| 226 | } |
| 227 | else |
| 228 | { |
| 229 | if(wifiRssi < rssiThresh1) |
| 230 | { |
| 231 | wifiRssiState = BTC_RSSI_STATE_MEDIUM; |
| 232 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n")); |
| 233 | } |
| 234 | else |
| 235 | { |
| 236 | wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; |
| 237 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n")); |
| 238 | } |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | pCoexSta->preWifiRssiState[index] = wifiRssiState; |
| 243 | |
| 244 | return wifiRssiState; |
| 245 | } |
| 246 | |
| 247 | VOID |
| 248 | halbtc8192e1ant_Updatera_mask( |
| 249 | IN PBTC_COEXIST pBtCoexist, |
| 250 | IN BOOLEAN bForceExec, |
| 251 | IN u1Byte type, |
| 252 | IN u4Byte rateMask |
| 253 | ) |
| 254 | { |
| 255 | if(BTC_RATE_DISABLE == type) |
| 256 | { |
| 257 | pCoexDm->curra_mask |= rateMask; // disable rate |
| 258 | } |
| 259 | else if(BTC_RATE_ENABLE == type) |
| 260 | { |
| 261 | pCoexDm->curra_mask &= ~rateMask; // enable rate |
| 262 | } |
| 263 | |
| 264 | if( bForceExec || (pCoexDm->prera_mask != pCoexDm->curra_mask)) |
| 265 | { |
| 266 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_UPDATE_ra_mask, &pCoexDm->curra_mask); |
| 267 | } |
| 268 | pCoexDm->prera_mask = pCoexDm->curra_mask; |
| 269 | } |
| 270 | |
| 271 | VOID |
| 272 | halbtc8192e1ant_MonitorBtCtr( |
| 273 | IN PBTC_COEXIST pBtCoexist |
| 274 | ) |
| 275 | { |
| 276 | u4Byte regHPTxRx, regLPTxRx, u4Tmp; |
| 277 | u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; |
| 278 | u1Byte u1Tmp; |
| 279 | |
| 280 | regHPTxRx = 0x770; |
| 281 | regLPTxRx = 0x774; |
| 282 | |
| 283 | u4Tmp = pBtCoexist->btc_read_4byte(pBtCoexist, regHPTxRx); |
| 284 | regHPTx = u4Tmp & MASKLWORD; |
| 285 | regHPRx = (u4Tmp & MASKHWORD)>>16; |
| 286 | |
| 287 | u4Tmp = pBtCoexist->btc_read_4byte(pBtCoexist, regLPTxRx); |
| 288 | regLPTx = u4Tmp & MASKLWORD; |
| 289 | regLPRx = (u4Tmp & MASKHWORD)>>16; |
| 290 | |
| 291 | pCoexSta->highPriorityTx = regHPTx; |
| 292 | pCoexSta->highPriorityRx = regHPRx; |
| 293 | pCoexSta->lowPriorityTx = regLPTx; |
| 294 | pCoexSta->lowPriorityRx = regLPRx; |
| 295 | |
| 296 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", |
| 297 | regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); |
| 298 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", |
| 299 | regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); |
| 300 | |
| 301 | // reset counter |
| 302 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x76e, 0xc); |
| 303 | } |
| 304 | |
| 305 | VOID |
| 306 | halbtc8192e1ant_QueryBtInfo( |
| 307 | IN PBTC_COEXIST pBtCoexist |
| 308 | ) |
| 309 | { |
| 310 | u1Byte H2C_Parameter[1] ={0}; |
| 311 | |
| 312 | pCoexSta->bC2hBtInfoReqSent = true; |
| 313 | |
| 314 | H2C_Parameter[0] |= BIT0; // trigger |
| 315 | |
| 316 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", |
| 317 | H2C_Parameter[0])); |
| 318 | |
| 319 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x61, 1, H2C_Parameter); |
| 320 | } |
| 321 | |
| 322 | BOOLEAN |
| 323 | halbtc8192e1ant_IsWifiStatusChanged( |
| 324 | IN PBTC_COEXIST pBtCoexist |
| 325 | ) |
| 326 | { |
| 327 | static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE; |
| 328 | BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE; |
| 329 | BOOLEAN bWifiConnected=FALSE; |
| 330 | |
| 331 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 332 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); |
| 333 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 334 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); |
| 335 | |
| 336 | if(bWifiConnected) |
| 337 | { |
| 338 | if(bWifiBusy != bPreWifiBusy) |
| 339 | { |
| 340 | bPreWifiBusy = bWifiBusy; |
| 341 | return true; |
| 342 | } |
| 343 | if(bUnder4way != bPreUnder4way) |
| 344 | { |
| 345 | bPreUnder4way = bUnder4way; |
| 346 | return true; |
| 347 | } |
| 348 | if(bBtHsOn != bPreBtHsOn) |
| 349 | { |
| 350 | bPreBtHsOn = bBtHsOn; |
| 351 | return true; |
| 352 | } |
| 353 | } |
| 354 | |
| 355 | return FALSE; |
| 356 | } |
| 357 | |
| 358 | VOID |
| 359 | halbtc8192e1ant_UpdateBtLinkInfo( |
| 360 | IN PBTC_COEXIST pBtCoexist |
| 361 | ) |
| 362 | { |
| 363 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 364 | |
| 365 | pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist; |
| 366 | pBtLinkInfo->bScoExist = pCoexSta->bScoExist; |
| 367 | pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist; |
| 368 | pBtLinkInfo->bPanExist = pCoexSta->bPanExist; |
| 369 | pBtLinkInfo->bHidExist = pCoexSta->bHidExist; |
| 370 | |
| 371 | // check if Sco only |
| 372 | if( pBtLinkInfo->bScoExist && |
| 373 | !pBtLinkInfo->bA2dpExist && |
| 374 | !pBtLinkInfo->bPanExist && |
| 375 | !pBtLinkInfo->bHidExist ) |
| 376 | pBtLinkInfo->bScoOnly = true; |
| 377 | else |
| 378 | pBtLinkInfo->bScoOnly = FALSE; |
| 379 | |
| 380 | // check if A2dp only |
| 381 | if( !pBtLinkInfo->bScoExist && |
| 382 | pBtLinkInfo->bA2dpExist && |
| 383 | !pBtLinkInfo->bPanExist && |
| 384 | !pBtLinkInfo->bHidExist ) |
| 385 | pBtLinkInfo->bA2dpOnly = true; |
| 386 | else |
| 387 | pBtLinkInfo->bA2dpOnly = FALSE; |
| 388 | |
| 389 | // check if Pan only |
| 390 | if( !pBtLinkInfo->bScoExist && |
| 391 | !pBtLinkInfo->bA2dpExist && |
| 392 | pBtLinkInfo->bPanExist && |
| 393 | !pBtLinkInfo->bHidExist ) |
| 394 | pBtLinkInfo->bPanOnly = true; |
| 395 | else |
| 396 | pBtLinkInfo->bPanOnly = FALSE; |
| 397 | |
| 398 | // check if Hid only |
| 399 | if( !pBtLinkInfo->bScoExist && |
| 400 | !pBtLinkInfo->bA2dpExist && |
| 401 | !pBtLinkInfo->bPanExist && |
| 402 | pBtLinkInfo->bHidExist ) |
| 403 | pBtLinkInfo->bHidOnly = true; |
| 404 | else |
| 405 | pBtLinkInfo->bHidOnly = FALSE; |
| 406 | } |
| 407 | |
| 408 | u1Byte |
| 409 | halbtc8192e1ant_ActionAlgorithm( |
| 410 | IN PBTC_COEXIST pBtCoexist |
| 411 | ) |
| 412 | { |
| 413 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 414 | BOOLEAN bBtHsOn=FALSE; |
| 415 | u1Byte algorithm=BT_8192E_1ANT_COEX_ALGO_UNDEFINED; |
| 416 | u1Byte numOfDiffProfile=0; |
| 417 | |
| 418 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 419 | |
| 420 | if(!pBtLinkInfo->bBtLinkExist) |
| 421 | { |
| 422 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No BT link exists!!!\n")); |
| 423 | return algorithm; |
| 424 | } |
| 425 | |
| 426 | if(pBtLinkInfo->bScoExist) |
| 427 | numOfDiffProfile++; |
| 428 | if(pBtLinkInfo->bHidExist) |
| 429 | numOfDiffProfile++; |
| 430 | if(pBtLinkInfo->bPanExist) |
| 431 | numOfDiffProfile++; |
| 432 | if(pBtLinkInfo->bA2dpExist) |
| 433 | numOfDiffProfile++; |
| 434 | |
| 435 | if(numOfDiffProfile == 1) |
| 436 | { |
| 437 | if(pBtLinkInfo->bScoExist) |
| 438 | { |
| 439 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO only\n")); |
| 440 | algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; |
| 441 | } |
| 442 | else |
| 443 | { |
| 444 | if(pBtLinkInfo->bHidExist) |
| 445 | { |
| 446 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n")); |
| 447 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID; |
| 448 | } |
| 449 | else if(pBtLinkInfo->bA2dpExist) |
| 450 | { |
| 451 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n")); |
| 452 | algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP; |
| 453 | } |
| 454 | else if(pBtLinkInfo->bPanExist) |
| 455 | { |
| 456 | if(bBtHsOn) |
| 457 | { |
| 458 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(HS) only\n")); |
| 459 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANHS; |
| 460 | } |
| 461 | else |
| 462 | { |
| 463 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(EDR) only\n")); |
| 464 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR; |
| 465 | } |
| 466 | } |
| 467 | } |
| 468 | } |
| 469 | else if(numOfDiffProfile == 2) |
| 470 | { |
| 471 | if(pBtLinkInfo->bScoExist) |
| 472 | { |
| 473 | if(pBtLinkInfo->bHidExist) |
| 474 | { |
| 475 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID\n")); |
| 476 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID; |
| 477 | } |
| 478 | else if(pBtLinkInfo->bA2dpExist) |
| 479 | { |
| 480 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP ==> SCO\n")); |
| 481 | algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; |
| 482 | } |
| 483 | else if(pBtLinkInfo->bPanExist) |
| 484 | { |
| 485 | if(bBtHsOn) |
| 486 | { |
| 487 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(HS)\n")); |
| 488 | algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; |
| 489 | } |
| 490 | else |
| 491 | { |
| 492 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(EDR)\n")); |
| 493 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; |
| 494 | } |
| 495 | } |
| 496 | } |
| 497 | else |
| 498 | { |
| 499 | if( pBtLinkInfo->bHidExist && |
| 500 | pBtLinkInfo->bA2dpExist ) |
| 501 | { |
| 502 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n")); |
| 503 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; |
| 504 | } |
| 505 | else if( pBtLinkInfo->bHidExist && |
| 506 | pBtLinkInfo->bPanExist ) |
| 507 | { |
| 508 | if(bBtHsOn) |
| 509 | { |
| 510 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(HS)\n")); |
| 511 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; |
| 512 | } |
| 513 | else |
| 514 | { |
| 515 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(EDR)\n")); |
| 516 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; |
| 517 | } |
| 518 | } |
| 519 | else if( pBtLinkInfo->bPanExist && |
| 520 | pBtLinkInfo->bA2dpExist ) |
| 521 | { |
| 522 | if(bBtHsOn) |
| 523 | { |
| 524 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(HS)\n")); |
| 525 | algorithm = BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS; |
| 526 | } |
| 527 | else |
| 528 | { |
| 529 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n")); |
| 530 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP; |
| 531 | } |
| 532 | } |
| 533 | } |
| 534 | } |
| 535 | else if(numOfDiffProfile == 3) |
| 536 | { |
| 537 | if(pBtLinkInfo->bScoExist) |
| 538 | { |
| 539 | if( pBtLinkInfo->bHidExist && |
| 540 | pBtLinkInfo->bA2dpExist ) |
| 541 | { |
| 542 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); |
| 543 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID; |
| 544 | } |
| 545 | else if( pBtLinkInfo->bHidExist && |
| 546 | pBtLinkInfo->bPanExist ) |
| 547 | { |
| 548 | if(bBtHsOn) |
| 549 | { |
| 550 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(HS)\n")); |
| 551 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; |
| 552 | } |
| 553 | else |
| 554 | { |
| 555 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(EDR)\n")); |
| 556 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; |
| 557 | } |
| 558 | } |
| 559 | else if( pBtLinkInfo->bPanExist && |
| 560 | pBtLinkInfo->bA2dpExist ) |
| 561 | { |
| 562 | if(bBtHsOn) |
| 563 | { |
| 564 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); |
| 565 | algorithm = BT_8192E_1ANT_COEX_ALGO_SCO; |
| 566 | } |
| 567 | else |
| 568 | { |
| 569 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); |
| 570 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; |
| 571 | } |
| 572 | } |
| 573 | } |
| 574 | else |
| 575 | { |
| 576 | if( pBtLinkInfo->bHidExist && |
| 577 | pBtLinkInfo->bPanExist && |
| 578 | pBtLinkInfo->bA2dpExist ) |
| 579 | { |
| 580 | if(bBtHsOn) |
| 581 | { |
| 582 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n")); |
| 583 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP; |
| 584 | } |
| 585 | else |
| 586 | { |
| 587 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); |
| 588 | algorithm = BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR; |
| 589 | } |
| 590 | } |
| 591 | } |
| 592 | } |
| 593 | else if(numOfDiffProfile >= 3) |
| 594 | { |
| 595 | if(pBtLinkInfo->bScoExist) |
| 596 | { |
| 597 | if( pBtLinkInfo->bHidExist && |
| 598 | pBtLinkInfo->bPanExist && |
| 599 | pBtLinkInfo->bA2dpExist ) |
| 600 | { |
| 601 | if(bBtHsOn) |
| 602 | { |
| 603 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); |
| 604 | |
| 605 | } |
| 606 | else |
| 607 | { |
| 608 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); |
| 609 | algorithm = BT_8192E_1ANT_COEX_ALGO_PANEDR_HID; |
| 610 | } |
| 611 | } |
| 612 | } |
| 613 | } |
| 614 | |
| 615 | return algorithm; |
| 616 | } |
| 617 | |
| 618 | VOID |
| 619 | halbtc8192e1ant_SetFwDacSwingLevel( |
| 620 | IN PBTC_COEXIST pBtCoexist, |
| 621 | IN u1Byte dacSwingLvl |
| 622 | ) |
| 623 | { |
| 624 | u1Byte H2C_Parameter[1] ={0}; |
| 625 | |
| 626 | // There are several type of dacswing |
| 627 | // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 |
| 628 | H2C_Parameter[0] = dacSwingLvl; |
| 629 | |
| 630 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); |
| 631 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); |
| 632 | |
| 633 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x64, 1, H2C_Parameter); |
| 634 | } |
| 635 | |
| 636 | VOID |
| 637 | halbtc8192e1ant_SetFwDecBtPwr( |
| 638 | IN PBTC_COEXIST pBtCoexist, |
| 639 | IN u1Byte decBtPwrLvl |
| 640 | ) |
| 641 | { |
| 642 | u1Byte H2C_Parameter[1] ={0}; |
| 643 | |
| 644 | H2C_Parameter[0] = decBtPwrLvl; |
| 645 | |
| 646 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n", |
| 647 | decBtPwrLvl, H2C_Parameter[0])); |
| 648 | |
| 649 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x62, 1, H2C_Parameter); |
| 650 | } |
| 651 | |
| 652 | VOID |
| 653 | halbtc8192e1ant_DecBtPwr( |
| 654 | IN PBTC_COEXIST pBtCoexist, |
| 655 | IN BOOLEAN bForceExec, |
| 656 | IN u1Byte decBtPwrLvl |
| 657 | ) |
| 658 | { |
| 659 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s Dec BT power level = %d\n", |
| 660 | (bForceExec? "force to":""), decBtPwrLvl)); |
| 661 | pCoexDm->curBtDecPwrLvl = decBtPwrLvl; |
| 662 | |
| 663 | if(!bForceExec) |
| 664 | { |
| 665 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], BtDecPwrLvl=%d, curBtDecPwrLvl=%d\n", |
| 666 | pCoexDm->preBtDecPwrLvl, pCoexDm->curBtDecPwrLvl)); |
| 667 | |
| 668 | if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl) |
| 669 | return; |
| 670 | } |
| 671 | halbtc8192e1ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl); |
| 672 | |
| 673 | pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl; |
| 674 | } |
| 675 | |
| 676 | VOID |
| 677 | halbtc8192e1ant_SetFwBtLnaConstrain( |
| 678 | IN PBTC_COEXIST pBtCoexist, |
| 679 | IN BOOLEAN bBtLnaConsOn |
| 680 | ) |
| 681 | { |
| 682 | u1Byte H2C_Parameter[2] ={0}; |
| 683 | |
| 684 | H2C_Parameter[0] = 0x3; // opCode, 0x3=BT_SET_LNA_CONSTRAIN |
| 685 | |
| 686 | if(bBtLnaConsOn) |
| 687 | { |
| 688 | H2C_Parameter[1] |= BIT0; |
| 689 | } |
| 690 | |
| 691 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set BT LNA Constrain: %s, FW write 0x69=0x%x\n", |
| 692 | (bBtLnaConsOn? "ON!!":"OFF!!"), |
| 693 | H2C_Parameter[0]<<8|H2C_Parameter[1])); |
| 694 | |
| 695 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x69, 2, H2C_Parameter); |
| 696 | } |
| 697 | |
| 698 | VOID |
| 699 | halbtc8192e1ant_SetBtLnaConstrain( |
| 700 | IN PBTC_COEXIST pBtCoexist, |
| 701 | IN BOOLEAN bForceExec, |
| 702 | IN BOOLEAN bBtLnaConsOn |
| 703 | ) |
| 704 | { |
| 705 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s BT Constrain = %s\n", |
| 706 | (bForceExec? "force":""), ((bBtLnaConsOn)? "ON":"OFF"))); |
| 707 | pCoexDm->bCurBtLnaConstrain = bBtLnaConsOn; |
| 708 | |
| 709 | if(!bForceExec) |
| 710 | { |
| 711 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBtLnaConstrain=%d, bCurBtLnaConstrain=%d\n", |
| 712 | pCoexDm->bPreBtLnaConstrain, pCoexDm->bCurBtLnaConstrain)); |
| 713 | |
| 714 | if(pCoexDm->bPreBtLnaConstrain == pCoexDm->bCurBtLnaConstrain) |
| 715 | return; |
| 716 | } |
| 717 | halbtc8192e1ant_SetFwBtLnaConstrain(pBtCoexist, pCoexDm->bCurBtLnaConstrain); |
| 718 | |
| 719 | pCoexDm->bPreBtLnaConstrain = pCoexDm->bCurBtLnaConstrain; |
| 720 | } |
| 721 | |
| 722 | VOID |
| 723 | halbtc8192e1ant_SetFwBtPsdMode( |
| 724 | IN PBTC_COEXIST pBtCoexist, |
| 725 | IN u1Byte btPsdMode |
| 726 | ) |
| 727 | { |
| 728 | u1Byte H2C_Parameter[2] ={0}; |
| 729 | |
| 730 | H2C_Parameter[0] = 0x2; // opCode, 0x2=BT_SET_PSD_MODE |
| 731 | |
| 732 | H2C_Parameter[1] = btPsdMode; |
| 733 | |
| 734 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set BT PSD mode=0x%x, FW write 0x69=0x%x\n", |
| 735 | H2C_Parameter[1], |
| 736 | H2C_Parameter[0]<<8|H2C_Parameter[1])); |
| 737 | |
| 738 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x69, 2, H2C_Parameter); |
| 739 | } |
| 740 | |
| 741 | |
| 742 | VOID |
| 743 | halbtc8192e1ant_SetBtPsdMode( |
| 744 | IN PBTC_COEXIST pBtCoexist, |
| 745 | IN BOOLEAN bForceExec, |
| 746 | IN u1Byte btPsdMode |
| 747 | ) |
| 748 | { |
| 749 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s BT PSD mode = 0x%x\n", |
| 750 | (bForceExec? "force":""), btPsdMode)); |
| 751 | pCoexDm->bCurBtPsdMode = btPsdMode; |
| 752 | |
| 753 | if(!bForceExec) |
| 754 | { |
| 755 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBtPsdMode=0x%x, bCurBtPsdMode=0x%x\n", |
| 756 | pCoexDm->bPreBtPsdMode, pCoexDm->bCurBtPsdMode)); |
| 757 | |
| 758 | if(pCoexDm->bPreBtPsdMode == pCoexDm->bCurBtPsdMode) |
| 759 | return; |
| 760 | } |
| 761 | halbtc8192e1ant_SetFwBtPsdMode(pBtCoexist, pCoexDm->bCurBtPsdMode); |
| 762 | |
| 763 | pCoexDm->bPreBtPsdMode = pCoexDm->bCurBtPsdMode; |
| 764 | } |
| 765 | |
| 766 | |
| 767 | VOID |
| 768 | halbtc8192e1ant_SetBtAutoReport( |
| 769 | IN PBTC_COEXIST pBtCoexist, |
| 770 | IN BOOLEAN bEnableAutoReport |
| 771 | ) |
| 772 | { |
| 773 | u1Byte H2C_Parameter[1] ={0}; |
| 774 | |
| 775 | H2C_Parameter[0] = 0; |
| 776 | |
| 777 | if(bEnableAutoReport) |
| 778 | { |
| 779 | H2C_Parameter[0] |= BIT0; |
| 780 | } |
| 781 | |
| 782 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", |
| 783 | (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); |
| 784 | |
| 785 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x68, 1, H2C_Parameter); |
| 786 | } |
| 787 | |
| 788 | VOID |
| 789 | halbtc8192e1ant_BtAutoReport( |
| 790 | IN PBTC_COEXIST pBtCoexist, |
| 791 | IN BOOLEAN bForceExec, |
| 792 | IN BOOLEAN bEnableAutoReport |
| 793 | ) |
| 794 | { |
| 795 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s BT Auto report = %s\n", |
| 796 | (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); |
| 797 | pCoexDm->bCurBtAutoReport = bEnableAutoReport; |
| 798 | |
| 799 | if(!bForceExec) |
| 800 | { |
| 801 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", |
| 802 | pCoexDm->bPreBtAutoReport, pCoexDm->bCurBtAutoReport)); |
| 803 | |
| 804 | if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) |
| 805 | return; |
| 806 | } |
| 807 | halbtc8192e1ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); |
| 808 | |
| 809 | pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; |
| 810 | } |
| 811 | |
| 812 | VOID |
| 813 | halbtc8192e1ant_FwDacSwingLvl( |
| 814 | IN PBTC_COEXIST pBtCoexist, |
| 815 | IN BOOLEAN bForceExec, |
| 816 | IN u1Byte fwDacSwingLvl |
| 817 | ) |
| 818 | { |
| 819 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set FW Dac Swing level = %d\n", |
| 820 | (bForceExec? "force to":""), fwDacSwingLvl)); |
| 821 | pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; |
| 822 | |
| 823 | if(!bForceExec) |
| 824 | { |
| 825 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", |
| 826 | pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl)); |
| 827 | |
| 828 | if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) |
| 829 | return; |
| 830 | } |
| 831 | |
| 832 | halbtc8192e1ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); |
| 833 | |
| 834 | pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; |
| 835 | } |
| 836 | |
| 837 | VOID |
| 838 | halbtc8192e1ant_SetSwRfRxLpfCorner( |
| 839 | IN PBTC_COEXIST pBtCoexist, |
| 840 | IN BOOLEAN bRxRfShrinkOn |
| 841 | ) |
| 842 | { |
| 843 | if(bRxRfShrinkOn) |
| 844 | { |
| 845 | //Shrink RF Rx LPF corner |
| 846 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); |
| 847 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xf0ff7); |
| 848 | } |
| 849 | else |
| 850 | { |
| 851 | //Resume RF Rx LPF corner |
| 852 | // After initialized, we can use pCoexDm->btRf0x1eBackup |
| 853 | if(pBtCoexist->initilized) |
| 854 | { |
| 855 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n")); |
| 856 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); |
| 857 | } |
| 858 | } |
| 859 | } |
| 860 | |
| 861 | VOID |
| 862 | halbtc8192e1ant_RfShrink( |
| 863 | IN PBTC_COEXIST pBtCoexist, |
| 864 | IN BOOLEAN bForceExec, |
| 865 | IN BOOLEAN bRxRfShrinkOn |
| 866 | ) |
| 867 | { |
| 868 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn Rx RF Shrink = %s\n", |
| 869 | (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); |
| 870 | pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; |
| 871 | |
| 872 | if(!bForceExec) |
| 873 | { |
| 874 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n", |
| 875 | pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink)); |
| 876 | |
| 877 | if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) |
| 878 | return; |
| 879 | } |
| 880 | halbtc8192e1ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); |
| 881 | |
| 882 | pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; |
| 883 | } |
| 884 | |
| 885 | VOID |
| 886 | halbtc8192e1ant_SetSwPenaltyTxRateAdaptive( |
| 887 | IN PBTC_COEXIST pBtCoexist, |
| 888 | IN BOOLEAN bLowPenaltyRa |
| 889 | ) |
| 890 | { |
| 891 | u1Byte tmpU1; |
| 892 | |
| 893 | tmpU1 = pBtCoexist->btc_read_1byte(pBtCoexist, 0x4fd); |
| 894 | tmpU1 |= BIT0; |
| 895 | if(bLowPenaltyRa) |
| 896 | { |
| 897 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Tx rate adaptive, set low penalty!!\n")); |
| 898 | tmpU1 &= ~BIT2; |
| 899 | } |
| 900 | else |
| 901 | { |
| 902 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Tx rate adaptive, set normal!!\n")); |
| 903 | tmpU1 |= BIT2; |
| 904 | } |
| 905 | |
| 906 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x4fd, tmpU1); |
| 907 | } |
| 908 | |
| 909 | VOID |
| 910 | halbtc8192e1ant_LowPenaltyRa( |
| 911 | IN PBTC_COEXIST pBtCoexist, |
| 912 | IN BOOLEAN bForceExec, |
| 913 | IN BOOLEAN bLowPenaltyRa |
| 914 | ) |
| 915 | { |
| 916 | return; |
| 917 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n", |
| 918 | (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); |
| 919 | pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; |
| 920 | |
| 921 | if(!bForceExec) |
| 922 | { |
| 923 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n", |
| 924 | pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa)); |
| 925 | |
| 926 | if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) |
| 927 | return; |
| 928 | } |
| 929 | halbtc8192e1ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); |
| 930 | |
| 931 | pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; |
| 932 | } |
| 933 | |
| 934 | VOID |
| 935 | halbtc8192e1ant_SetDacSwingReg( |
| 936 | IN PBTC_COEXIST pBtCoexist, |
| 937 | IN u4Byte level |
| 938 | ) |
| 939 | { |
| 940 | u1Byte val=(u1Byte)level; |
| 941 | |
| 942 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); |
| 943 | pBtCoexist->btc_write_1byte_bitmask(pBtCoexist, 0x883, 0x3e, val); |
| 944 | } |
| 945 | |
| 946 | VOID |
| 947 | halbtc8192e1ant_SetSwFullTimeDacSwing( |
| 948 | IN PBTC_COEXIST pBtCoexist, |
| 949 | IN BOOLEAN bSwDacSwingOn, |
| 950 | IN u4Byte swDacSwingLvl |
| 951 | ) |
| 952 | { |
| 953 | if(bSwDacSwingOn) |
| 954 | { |
| 955 | halbtc8192e1ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); |
| 956 | } |
| 957 | else |
| 958 | { |
| 959 | halbtc8192e1ant_SetDacSwingReg(pBtCoexist, 0x18); |
| 960 | } |
| 961 | } |
| 962 | |
| 963 | |
| 964 | VOID |
| 965 | halbtc8192e1ant_DacSwing( |
| 966 | IN PBTC_COEXIST pBtCoexist, |
| 967 | IN BOOLEAN bForceExec, |
| 968 | IN BOOLEAN bDacSwingOn, |
| 969 | IN u4Byte dacSwingLvl |
| 970 | ) |
| 971 | { |
| 972 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", |
| 973 | (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); |
| 974 | pCoexDm->bCurDacSwingOn = bDacSwingOn; |
| 975 | pCoexDm->curDacSwingLvl = dacSwingLvl; |
| 976 | |
| 977 | if(!bForceExec) |
| 978 | { |
| 979 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n", |
| 980 | pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl, |
| 981 | pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl)); |
| 982 | |
| 983 | if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && |
| 984 | (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) |
| 985 | return; |
| 986 | } |
| 987 | mdelay(30); |
| 988 | halbtc8192e1ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); |
| 989 | |
| 990 | pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; |
| 991 | pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; |
| 992 | } |
| 993 | |
| 994 | VOID |
| 995 | halbtc8192e1ant_SetAdcBackOff( |
| 996 | IN PBTC_COEXIST pBtCoexist, |
| 997 | IN BOOLEAN bAdcBackOff |
| 998 | ) |
| 999 | { |
| 1000 | if(bAdcBackOff) |
| 1001 | { |
| 1002 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level On!\n")); |
| 1003 | pBtCoexist->btc_write_1byte_bitmask(pBtCoexist, 0x8db, 0x60, 0x3); |
| 1004 | } |
| 1005 | else |
| 1006 | { |
| 1007 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level Off!\n")); |
| 1008 | pBtCoexist->btc_write_1byte_bitmask(pBtCoexist, 0x8db, 0x60, 0x1); |
| 1009 | } |
| 1010 | } |
| 1011 | |
| 1012 | VOID |
| 1013 | halbtc8192e1ant_AdcBackOff( |
| 1014 | IN PBTC_COEXIST pBtCoexist, |
| 1015 | IN BOOLEAN bForceExec, |
| 1016 | IN BOOLEAN bAdcBackOff |
| 1017 | ) |
| 1018 | { |
| 1019 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn AdcBackOff = %s\n", |
| 1020 | (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); |
| 1021 | pCoexDm->bCurAdcBackOff = bAdcBackOff; |
| 1022 | |
| 1023 | if(!bForceExec) |
| 1024 | { |
| 1025 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n", |
| 1026 | pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff)); |
| 1027 | |
| 1028 | if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) |
| 1029 | return; |
| 1030 | } |
| 1031 | halbtc8192e1ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); |
| 1032 | |
| 1033 | pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; |
| 1034 | } |
| 1035 | |
| 1036 | VOID |
| 1037 | halbtc8192e1ant_SetAgcTable( |
| 1038 | IN PBTC_COEXIST pBtCoexist, |
| 1039 | IN BOOLEAN bAgcTableEn |
| 1040 | ) |
| 1041 | { |
| 1042 | u1Byte rssiAdjustVal=0; |
| 1043 | |
| 1044 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); |
| 1045 | if(bAgcTableEn) |
| 1046 | { |
| 1047 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n")); |
| 1048 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x3fa58); |
| 1049 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x37a58); |
| 1050 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2fa58); |
| 1051 | rssiAdjustVal = 8; |
| 1052 | } |
| 1053 | else |
| 1054 | { |
| 1055 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n")); |
| 1056 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x39258); |
| 1057 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x31258); |
| 1058 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x29258); |
| 1059 | } |
| 1060 | pBtCoexist->btc_set_rf_reg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); |
| 1061 | |
| 1062 | // set rssiAdjustVal for wifi module. |
| 1063 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); |
| 1064 | } |
| 1065 | |
| 1066 | |
| 1067 | VOID |
| 1068 | halbtc8192e1ant_AgcTable( |
| 1069 | IN PBTC_COEXIST pBtCoexist, |
| 1070 | IN BOOLEAN bForceExec, |
| 1071 | IN BOOLEAN bAgcTableEn |
| 1072 | ) |
| 1073 | { |
| 1074 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s %s Agc Table\n", |
| 1075 | (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); |
| 1076 | pCoexDm->bCurAgcTableEn = bAgcTableEn; |
| 1077 | |
| 1078 | if(!bForceExec) |
| 1079 | { |
| 1080 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", |
| 1081 | pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn)); |
| 1082 | |
| 1083 | if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) |
| 1084 | return; |
| 1085 | } |
| 1086 | halbtc8192e1ant_SetAgcTable(pBtCoexist, bAgcTableEn); |
| 1087 | |
| 1088 | pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; |
| 1089 | } |
| 1090 | |
| 1091 | VOID |
| 1092 | halbtc8192e1ant_SetCoexTable( |
| 1093 | IN PBTC_COEXIST pBtCoexist, |
| 1094 | IN u4Byte val0x6c0, |
| 1095 | IN u4Byte val0x6c4, |
| 1096 | IN u4Byte val0x6c8, |
| 1097 | IN u1Byte val0x6cc |
| 1098 | ) |
| 1099 | { |
| 1100 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); |
| 1101 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x6c0, val0x6c0); |
| 1102 | |
| 1103 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); |
| 1104 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x6c4, val0x6c4); |
| 1105 | |
| 1106 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); |
| 1107 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x6c8, val0x6c8); |
| 1108 | |
| 1109 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); |
| 1110 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x6cc, val0x6cc); |
| 1111 | } |
| 1112 | |
| 1113 | VOID |
| 1114 | halbtc8192e1ant_CoexTable( |
| 1115 | IN PBTC_COEXIST pBtCoexist, |
| 1116 | IN BOOLEAN bForceExec, |
| 1117 | IN u4Byte val0x6c0, |
| 1118 | IN u4Byte val0x6c4, |
| 1119 | IN u4Byte val0x6c8, |
| 1120 | IN u1Byte val0x6cc |
| 1121 | ) |
| 1122 | { |
| 1123 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", |
| 1124 | (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); |
| 1125 | pCoexDm->curVal0x6c0 = val0x6c0; |
| 1126 | pCoexDm->curVal0x6c4 = val0x6c4; |
| 1127 | pCoexDm->curVal0x6c8 = val0x6c8; |
| 1128 | pCoexDm->curVal0x6cc = val0x6cc; |
| 1129 | |
| 1130 | if(!bForceExec) |
| 1131 | { |
| 1132 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n", |
| 1133 | pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc)); |
| 1134 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n", |
| 1135 | pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc)); |
| 1136 | |
| 1137 | if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && |
| 1138 | (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && |
| 1139 | (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && |
| 1140 | (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) |
| 1141 | return; |
| 1142 | } |
| 1143 | halbtc8192e1ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); |
| 1144 | |
| 1145 | pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; |
| 1146 | pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; |
| 1147 | pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; |
| 1148 | pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; |
| 1149 | } |
| 1150 | |
| 1151 | VOID |
| 1152 | halbtc8192e1ant_CoexTableWithType( |
| 1153 | IN PBTC_COEXIST pBtCoexist, |
| 1154 | IN BOOLEAN bForceExec, |
| 1155 | IN u1Byte type |
| 1156 | ) |
| 1157 | { |
| 1158 | switch(type) |
| 1159 | { |
| 1160 | case 0: |
| 1161 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3); |
| 1162 | break; |
| 1163 | case 1: |
| 1164 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); |
| 1165 | break; |
| 1166 | case 2: |
| 1167 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); |
| 1168 | break; |
| 1169 | case 3: |
| 1170 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); |
| 1171 | break; |
| 1172 | case 4: |
| 1173 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); |
| 1174 | break; |
| 1175 | case 5: |
| 1176 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); |
| 1177 | break; |
| 1178 | case 6: |
| 1179 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); |
| 1180 | break; |
| 1181 | case 7: |
| 1182 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0xddffddff, 0xddffddff, 0xffffff, 0x3); |
| 1183 | break; |
| 1184 | case 8: |
| 1185 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5afa5afa, 0xffffff, 0x3); |
| 1186 | break; |
| 1187 | case 9: |
| 1188 | halbtc8192e1ant_CoexTable(pBtCoexist, bForceExec, 0x5f5f5f5f, 0x5f5f5f5f, 0xffffff, 0x3); |
| 1189 | break; |
| 1190 | default: |
| 1191 | break; |
| 1192 | } |
| 1193 | } |
| 1194 | |
| 1195 | VOID |
| 1196 | halbtc8192e1ant_SetFwIgnoreWlanAct( |
| 1197 | IN PBTC_COEXIST pBtCoexist, |
| 1198 | IN BOOLEAN bEnable |
| 1199 | ) |
| 1200 | { |
| 1201 | u1Byte H2C_Parameter[1] ={0}; |
| 1202 | |
| 1203 | if(bEnable) |
| 1204 | { |
| 1205 | H2C_Parameter[0] |= BIT0; // function enable |
| 1206 | } |
| 1207 | |
| 1208 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", |
| 1209 | H2C_Parameter[0])); |
| 1210 | |
| 1211 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x63, 1, H2C_Parameter); |
| 1212 | } |
| 1213 | |
| 1214 | VOID |
| 1215 | halbtc8192e1ant_IgnoreWlanAct( |
| 1216 | IN PBTC_COEXIST pBtCoexist, |
| 1217 | IN BOOLEAN bForceExec, |
| 1218 | IN BOOLEAN bEnable |
| 1219 | ) |
| 1220 | { |
| 1221 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn Ignore WlanAct %s\n", |
| 1222 | (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); |
| 1223 | pCoexDm->bCurIgnoreWlanAct = bEnable; |
| 1224 | |
| 1225 | if(!bForceExec) |
| 1226 | { |
| 1227 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n", |
| 1228 | pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct)); |
| 1229 | |
| 1230 | if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) |
| 1231 | return; |
| 1232 | } |
| 1233 | halbtc8192e1ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); |
| 1234 | |
| 1235 | pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; |
| 1236 | } |
| 1237 | |
| 1238 | VOID |
| 1239 | halbtc8192e1ant_SetFwPstdma( |
| 1240 | IN PBTC_COEXIST pBtCoexist, |
| 1241 | IN u1Byte byte1, |
| 1242 | IN u1Byte byte2, |
| 1243 | IN u1Byte byte3, |
| 1244 | IN u1Byte byte4, |
| 1245 | IN u1Byte byte5 |
| 1246 | ) |
| 1247 | { |
| 1248 | u1Byte H2C_Parameter[5] ={0}; |
| 1249 | |
| 1250 | H2C_Parameter[0] = byte1; |
| 1251 | H2C_Parameter[1] = byte2; |
| 1252 | H2C_Parameter[2] = byte3; |
| 1253 | H2C_Parameter[3] = byte4; |
| 1254 | H2C_Parameter[4] = byte5; |
| 1255 | |
| 1256 | pCoexDm->psTdmaPara[0] = byte1; |
| 1257 | pCoexDm->psTdmaPara[1] = byte2; |
| 1258 | pCoexDm->psTdmaPara[2] = byte3; |
| 1259 | pCoexDm->psTdmaPara[3] = byte4; |
| 1260 | pCoexDm->psTdmaPara[4] = byte5; |
| 1261 | |
| 1262 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n", |
| 1263 | H2C_Parameter[0], |
| 1264 | H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); |
| 1265 | |
| 1266 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x60, 5, H2C_Parameter); |
| 1267 | } |
| 1268 | |
| 1269 | VOID |
| 1270 | halbtc8192e1ant_SetLpsRpwm( |
| 1271 | IN PBTC_COEXIST pBtCoexist, |
| 1272 | IN u1Byte lpsVal, |
| 1273 | IN u1Byte rpwmVal |
| 1274 | ) |
| 1275 | { |
| 1276 | u1Byte lps=lpsVal; |
| 1277 | u1Byte rpwm=rpwmVal; |
| 1278 | |
| 1279 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_U1_1ANT_LPS, &lps); |
| 1280 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_U1_1ANT_RPWM, &rpwm); |
| 1281 | } |
| 1282 | |
| 1283 | VOID |
| 1284 | halbtc8192e1ant_LpsRpwm( |
| 1285 | IN PBTC_COEXIST pBtCoexist, |
| 1286 | IN BOOLEAN bForceExec, |
| 1287 | IN u1Byte lpsVal, |
| 1288 | IN u1Byte rpwmVal |
| 1289 | ) |
| 1290 | { |
| 1291 | BOOLEAN bForceExecPwrCmd=FALSE; |
| 1292 | |
| 1293 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n", |
| 1294 | (bForceExec? "force to":""), lpsVal, rpwmVal)); |
| 1295 | pCoexDm->curLps = lpsVal; |
| 1296 | pCoexDm->curRpwm = rpwmVal; |
| 1297 | |
| 1298 | if(!bForceExec) |
| 1299 | { |
| 1300 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preLps/curLps=0x%x/0x%x, preRpwm/curRpwm=0x%x/0x%x!!\n", |
| 1301 | pCoexDm->preLps, pCoexDm->curLps, pCoexDm->preRpwm, pCoexDm->curRpwm)); |
| 1302 | |
| 1303 | if( (pCoexDm->preLps == pCoexDm->curLps) && |
| 1304 | (pCoexDm->preRpwm == pCoexDm->curRpwm) ) |
| 1305 | { |
| 1306 | return; |
| 1307 | } |
| 1308 | } |
| 1309 | halbtc8192e1ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal); |
| 1310 | |
| 1311 | pCoexDm->preLps = pCoexDm->curLps; |
| 1312 | pCoexDm->preRpwm = pCoexDm->curRpwm; |
| 1313 | } |
| 1314 | |
| 1315 | VOID |
| 1316 | halbtc8192e1ant_SwMechanism1( |
| 1317 | IN PBTC_COEXIST pBtCoexist, |
| 1318 | IN BOOLEAN bShrinkRxLPF, |
| 1319 | IN BOOLEAN bLowPenaltyRA, |
| 1320 | IN BOOLEAN limited_dig, |
| 1321 | IN BOOLEAN bBTLNAConstrain |
| 1322 | ) |
| 1323 | { |
| 1324 | //halbtc8192e1ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); |
| 1325 | //halbtc8192e1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); |
| 1326 | |
| 1327 | //no limited DIG |
| 1328 | //halbtc8192e1ant_SetBtLnaConstrain(pBtCoexist, NORMAL_EXEC, bBTLNAConstrain); |
| 1329 | } |
| 1330 | |
| 1331 | VOID |
| 1332 | halbtc8192e1ant_SwMechanism2( |
| 1333 | IN PBTC_COEXIST pBtCoexist, |
| 1334 | IN BOOLEAN bAGCTableShift, |
| 1335 | IN BOOLEAN bADCBackOff, |
| 1336 | IN BOOLEAN bSWDACSwing, |
| 1337 | IN u4Byte dacSwingLvl |
| 1338 | ) |
| 1339 | { |
| 1340 | //halbtc8192e1ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); |
| 1341 | //halbtc8192e1ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); |
| 1342 | //halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); |
| 1343 | } |
| 1344 | |
| 1345 | VOID |
| 1346 | halbtc8192e1ant_PsTdma( |
| 1347 | IN PBTC_COEXIST pBtCoexist, |
| 1348 | IN BOOLEAN bForceExec, |
| 1349 | IN BOOLEAN bTurnOn, |
| 1350 | IN u1Byte type |
| 1351 | ) |
| 1352 | { |
| 1353 | BOOLEAN bTurnOnByCnt=FALSE; |
| 1354 | u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; |
| 1355 | |
| 1356 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", |
| 1357 | (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); |
| 1358 | pCoexDm->bCurPsTdmaOn = bTurnOn; |
| 1359 | pCoexDm->curPsTdma = type; |
| 1360 | |
| 1361 | if(!bForceExec) |
| 1362 | { |
| 1363 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", |
| 1364 | pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn)); |
| 1365 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", |
| 1366 | pCoexDm->prePsTdma, pCoexDm->curPsTdma)); |
| 1367 | |
| 1368 | if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && |
| 1369 | (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) |
| 1370 | return; |
| 1371 | } |
| 1372 | if(bTurnOn) |
| 1373 | { |
| 1374 | switch(type) |
| 1375 | { |
| 1376 | default: |
| 1377 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x2c, 0x03, 0x10, 0x50); |
| 1378 | break; |
| 1379 | case 1: |
| 1380 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x2c, 0x03, 0x10, 0x50); |
| 1381 | rssiAdjustVal = 11; |
| 1382 | break; |
| 1383 | case 2: |
| 1384 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x25, 0x03, 0x10, 0x50); |
| 1385 | rssiAdjustVal = 14; |
| 1386 | break; |
| 1387 | case 3: |
| 1388 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x40); |
| 1389 | break; |
| 1390 | case 4: |
| 1391 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); |
| 1392 | rssiAdjustVal = 17; |
| 1393 | break; |
| 1394 | case 5: |
| 1395 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x31, 0x0); |
| 1396 | break; |
| 1397 | case 6: |
| 1398 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x0, 0x0); |
| 1399 | break; |
| 1400 | case 7: |
| 1401 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); |
| 1402 | break; |
| 1403 | case 8: |
| 1404 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); |
| 1405 | break; |
| 1406 | case 9: |
| 1407 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x1e, 0x03, 0x10, 0x50); |
| 1408 | rssiAdjustVal = 18; |
| 1409 | break; |
| 1410 | case 10: |
| 1411 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); |
| 1412 | break; |
| 1413 | case 11: |
| 1414 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x12, 0x03, 0x10, 0x50); |
| 1415 | rssiAdjustVal = 20; |
| 1416 | break; |
| 1417 | case 12: |
| 1418 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xeb, 0xa, 0x3, 0x31, 0x18); |
| 1419 | break; |
| 1420 | |
| 1421 | case 15: |
| 1422 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); |
| 1423 | break; |
| 1424 | case 16: |
| 1425 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); |
| 1426 | rssiAdjustVal = 18; |
| 1427 | break; |
| 1428 | |
| 1429 | case 18: |
| 1430 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); |
| 1431 | rssiAdjustVal = 14; |
| 1432 | break; |
| 1433 | |
| 1434 | case 20: |
| 1435 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0x25, 0x25, 0x0, 0x0); |
| 1436 | break; |
| 1437 | case 21: |
| 1438 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x20, 0x3, 0x10, 0x40); |
| 1439 | break; |
| 1440 | case 22: |
| 1441 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x13, 0x8, 0x8, 0x0, 0x40); |
| 1442 | break; |
| 1443 | case 23: |
| 1444 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); |
| 1445 | rssiAdjustVal = 22; |
| 1446 | break; |
| 1447 | case 24: |
| 1448 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); |
| 1449 | rssiAdjustVal = 22; |
| 1450 | break; |
| 1451 | case 25: |
| 1452 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); |
| 1453 | rssiAdjustVal = 22; |
| 1454 | break; |
| 1455 | case 26: |
| 1456 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); |
| 1457 | rssiAdjustVal = 22; |
| 1458 | break; |
| 1459 | case 27: |
| 1460 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); |
| 1461 | rssiAdjustVal = 22; |
| 1462 | break; |
| 1463 | case 28: |
| 1464 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); |
| 1465 | break; |
| 1466 | case 29: |
| 1467 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); |
| 1468 | break; |
| 1469 | case 30: |
| 1470 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); |
| 1471 | break; |
| 1472 | case 31: |
| 1473 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); |
| 1474 | break; |
| 1475 | case 32: |
| 1476 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xab, 0xa, 0x3, 0x31, 0x90); |
| 1477 | break; |
| 1478 | case 33: |
| 1479 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); |
| 1480 | break; |
| 1481 | case 34: |
| 1482 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0x0, 0x10); |
| 1483 | break; |
| 1484 | case 35: |
| 1485 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x0, 0x10); |
| 1486 | break; |
| 1487 | case 36: |
| 1488 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); |
| 1489 | break; |
| 1490 | case 37: |
| 1491 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x53, 0x25, 0x3, 0x10, 0x50); |
| 1492 | break; |
| 1493 | case 38: |
| 1494 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); |
| 1495 | break; |
| 1496 | } |
| 1497 | } |
| 1498 | else |
| 1499 | { |
| 1500 | // disable PS tdma |
| 1501 | switch(type) |
| 1502 | { |
| 1503 | case 8: //0x778 = 1, ant2PTA |
| 1504 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0); |
| 1505 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x92c, 0x4); |
| 1506 | break; |
| 1507 | case 0: //0x778 = 1, ant2BT |
| 1508 | default: |
| 1509 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); |
| 1510 | mdelay(5); |
| 1511 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x92c, 0x20); |
| 1512 | break; |
| 1513 | case 9: //0x778 = 1, ant2WIFI |
| 1514 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x0, 0x0); |
| 1515 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x92c, 0x4); |
| 1516 | break; |
| 1517 | case 10: //0x778 = 3, ant2BT |
| 1518 | halbtc8192e1ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0); |
| 1519 | mdelay(5); |
| 1520 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x92c, 0x20); |
| 1521 | break; |
| 1522 | } |
| 1523 | } |
| 1524 | rssiAdjustVal =0; |
| 1525 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); |
| 1526 | |
| 1527 | // update pre state |
| 1528 | pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; |
| 1529 | pCoexDm->prePsTdma = pCoexDm->curPsTdma; |
| 1530 | } |
| 1531 | |
| 1532 | VOID |
| 1533 | halbtc8192e1ant_SetSwitchSsType( |
| 1534 | IN PBTC_COEXIST pBtCoexist, |
| 1535 | IN u1Byte ssType |
| 1536 | ) |
| 1537 | { |
| 1538 | u1Byte mimoPs=BTC_MIMO_PS_DYNAMIC; |
| 1539 | |
| 1540 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], REAL set SS Type = %d\n", ssType)); |
| 1541 | |
| 1542 | if(ssType == 1) |
| 1543 | { |
| 1544 | halbtc8192e1ant_Updatera_mask(pBtCoexist, FORCE_EXEC, BTC_RATE_DISABLE, 0xfff00000); // disable 2ss |
| 1545 | halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); |
| 1546 | // switch ofdm path |
| 1547 | pBtCoexist->btc_write_1byte(pBtCoexist, 0xc04, 0x11); |
| 1548 | pBtCoexist->btc_write_1byte(pBtCoexist, 0xd04, 0x1); |
| 1549 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x90c, 0x81111111); |
| 1550 | // switch cck patch |
| 1551 | pBtCoexist->btc_write_1byte_bitmask(pBtCoexist, 0xe77, 0x4, 0x1); |
| 1552 | pBtCoexist->btc_write_1byte(pBtCoexist, 0xa07, 0x81); |
| 1553 | mimoPs=BTC_MIMO_PS_STATIC; |
| 1554 | } |
| 1555 | else if(ssType == 2) |
| 1556 | { |
| 1557 | halbtc8192e1ant_Updatera_mask(pBtCoexist, FORCE_EXEC, BTC_RATE_ENABLE, 0xfff00000); // enable 2ss |
| 1558 | halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); |
| 1559 | pBtCoexist->btc_write_1byte(pBtCoexist, 0xc04, 0x33); |
| 1560 | pBtCoexist->btc_write_1byte(pBtCoexist, 0xd04, 0x3); |
| 1561 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x90c, 0x81121313); |
| 1562 | pBtCoexist->btc_write_1byte_bitmask(pBtCoexist, 0xe77, 0x4, 0x0); |
| 1563 | pBtCoexist->btc_write_1byte(pBtCoexist, 0xa07, 0x41); |
| 1564 | mimoPs=BTC_MIMO_PS_DYNAMIC; |
| 1565 | } |
| 1566 | |
| 1567 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimoPs); // set rx 1ss or 2ss |
| 1568 | } |
| 1569 | |
| 1570 | VOID |
| 1571 | halbtc8192e1ant_SwitchSsType( |
| 1572 | IN PBTC_COEXIST pBtCoexist, |
| 1573 | IN BOOLEAN bForceExec, |
| 1574 | IN u1Byte newSsType |
| 1575 | ) |
| 1576 | { |
| 1577 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], %s Switch SS Type = %d\n", |
| 1578 | (bForceExec? "force to":""), newSsType)); |
| 1579 | pCoexDm->curSsType = newSsType; |
| 1580 | |
| 1581 | if(!bForceExec) |
| 1582 | { |
| 1583 | if(pCoexDm->preSsType == pCoexDm->curSsType) |
| 1584 | return; |
| 1585 | } |
| 1586 | halbtc8192e1ant_SetSwitchSsType(pBtCoexist, pCoexDm->curSsType); |
| 1587 | |
| 1588 | pCoexDm->preSsType = pCoexDm->curSsType; |
| 1589 | } |
| 1590 | |
| 1591 | VOID |
| 1592 | halbtc8192e1ant_CoexAllOff( |
| 1593 | IN PBTC_COEXIST pBtCoexist |
| 1594 | ) |
| 1595 | { |
| 1596 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 1597 | |
| 1598 | // sw all off |
| 1599 | halbtc8192e1ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); |
| 1600 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 1601 | |
| 1602 | |
| 1603 | // hw all off |
| 1604 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 1605 | } |
| 1606 | |
| 1607 | BOOLEAN |
| 1608 | halbtc8192e1ant_IsCommonAction( |
| 1609 | IN PBTC_COEXIST pBtCoexist |
| 1610 | ) |
| 1611 | { |
| 1612 | BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; |
| 1613 | |
| 1614 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 1615 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); |
| 1616 | |
| 1617 | if(!bWifiConnected && |
| 1618 | BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) |
| 1619 | { |
| 1620 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); |
| 1621 | halbtc8192e1ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); |
| 1622 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 1623 | |
| 1624 | bCommon = true; |
| 1625 | } |
| 1626 | else if(bWifiConnected && |
| 1627 | (BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ) |
| 1628 | { |
| 1629 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); |
| 1630 | halbtc8192e1ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); |
| 1631 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 1632 | |
| 1633 | bCommon = true; |
| 1634 | } |
| 1635 | else if(!bWifiConnected && |
| 1636 | (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) |
| 1637 | { |
| 1638 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); |
| 1639 | halbtc8192e1ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); |
| 1640 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 1641 | |
| 1642 | bCommon = true; |
| 1643 | } |
| 1644 | else if(bWifiConnected && |
| 1645 | (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) |
| 1646 | { |
| 1647 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); |
| 1648 | halbtc8192e1ant_SwMechanism1(pBtCoexist,true,true,true,true); |
| 1649 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 1650 | |
| 1651 | bCommon = true; |
| 1652 | } |
| 1653 | else if(!bWifiConnected && |
| 1654 | (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE != pCoexDm->btStatus) ) |
| 1655 | { |
| 1656 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); |
| 1657 | halbtc8192e1ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); |
| 1658 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 1659 | |
| 1660 | bCommon = true; |
| 1661 | } |
| 1662 | else |
| 1663 | { |
| 1664 | halbtc8192e1ant_SwMechanism1(pBtCoexist,true,true,true,true); |
| 1665 | |
| 1666 | bCommon = FALSE; |
| 1667 | } |
| 1668 | |
| 1669 | return bCommon; |
| 1670 | } |
| 1671 | |
| 1672 | |
| 1673 | VOID |
| 1674 | halbtc8192e1ant_TdmaDurationAdjustForAcl( |
| 1675 | IN PBTC_COEXIST pBtCoexist, |
| 1676 | IN u1Byte wifiStatus |
| 1677 | ) |
| 1678 | { |
| 1679 | static s4Byte up,dn,m,n,WaitCount; |
| 1680 | s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration |
| 1681 | u1Byte retryCount=0, btInfoExt; |
| 1682 | |
| 1683 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], TdmaDurationAdjustForAcl()\n")); |
| 1684 | |
| 1685 | if( (BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || |
| 1686 | (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || |
| 1687 | (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) |
| 1688 | { |
| 1689 | if( pCoexDm->curPsTdma != 1 && |
| 1690 | pCoexDm->curPsTdma != 2 && |
| 1691 | pCoexDm->curPsTdma != 3 && |
| 1692 | pCoexDm->curPsTdma != 9 ) |
| 1693 | { |
| 1694 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9); |
| 1695 | pCoexDm->psTdmaDuAdjType = 9; |
| 1696 | |
| 1697 | up = 0; |
| 1698 | dn = 0; |
| 1699 | m = 1; |
| 1700 | n= 3; |
| 1701 | result = 0; |
| 1702 | WaitCount = 0; |
| 1703 | } |
| 1704 | return; |
| 1705 | } |
| 1706 | |
| 1707 | if(!pCoexDm->bAutoTdmaAdjust) |
| 1708 | { |
| 1709 | pCoexDm->bAutoTdmaAdjust = true; |
| 1710 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); |
| 1711 | |
| 1712 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 2); |
| 1713 | pCoexDm->psTdmaDuAdjType = 2; |
| 1714 | //============ |
| 1715 | up = 0; |
| 1716 | dn = 0; |
| 1717 | m = 1; |
| 1718 | n= 3; |
| 1719 | result = 0; |
| 1720 | WaitCount = 0; |
| 1721 | } |
| 1722 | else |
| 1723 | { |
Masanari Iida | fc4d82c | 2014-02-25 23:54:41 +0900 | [diff] [blame] | 1724 | //acquire the BT TRx retry count from BT_Info byte2 |
Greg Kroah-Hartman | 3c05bed | 2014-01-21 11:20:45 -0800 | [diff] [blame] | 1725 | retryCount = pCoexSta->btRetryCnt; |
| 1726 | btInfoExt = pCoexSta->btInfoExt; |
| 1727 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount)); |
| 1728 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", |
| 1729 | up, dn, m, n, WaitCount)); |
| 1730 | result = 0; |
| 1731 | WaitCount++; |
| 1732 | |
| 1733 | if(retryCount == 0) // no retry in the last 2-second duration |
| 1734 | { |
| 1735 | up++; |
| 1736 | dn--; |
| 1737 | |
| 1738 | if (dn <= 0) |
| 1739 | dn = 0; |
| 1740 | |
| 1741 | if(up >= n) // if ³sÄò n Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration |
| 1742 | { |
| 1743 | WaitCount = 0; |
| 1744 | n = 3; |
| 1745 | up = 0; |
| 1746 | dn = 0; |
| 1747 | result = 1; |
| 1748 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Increase wifi duration!!\n")); |
| 1749 | } |
| 1750 | } |
| 1751 | else if (retryCount <= 3) // <=3 retry in the last 2-second duration |
| 1752 | { |
| 1753 | up--; |
| 1754 | dn++; |
| 1755 | |
| 1756 | if (up <= 0) |
| 1757 | up = 0; |
| 1758 | |
| 1759 | if (dn == 2) // if ³sÄò 2 Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration |
| 1760 | { |
| 1761 | if (WaitCount <= 2) |
| 1762 | m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^ |
| 1763 | else |
| 1764 | m = 1; |
| 1765 | |
| 1766 | if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. |
| 1767 | m = 20; |
| 1768 | |
| 1769 | n = 3*m; |
| 1770 | up = 0; |
| 1771 | dn = 0; |
| 1772 | WaitCount = 0; |
| 1773 | result = -1; |
| 1774 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); |
| 1775 | } |
| 1776 | } |
| 1777 | else //retry count > 3, ¥un1¦¸ retry count > 3, «h½Õ¯¶WiFi duration |
| 1778 | { |
| 1779 | if (WaitCount == 1) |
| 1780 | m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^ |
| 1781 | else |
| 1782 | m = 1; |
| 1783 | |
| 1784 | if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. |
| 1785 | m = 20; |
| 1786 | |
| 1787 | n = 3*m; |
| 1788 | up = 0; |
| 1789 | dn = 0; |
| 1790 | WaitCount = 0; |
| 1791 | result = -1; |
| 1792 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); |
| 1793 | } |
| 1794 | |
| 1795 | if(result == -1) |
| 1796 | { |
| 1797 | if( (BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(btInfoExt)) && |
| 1798 | ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) |
| 1799 | { |
| 1800 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9); |
| 1801 | pCoexDm->psTdmaDuAdjType = 9; |
| 1802 | } |
| 1803 | else if(pCoexDm->curPsTdma == 1) |
| 1804 | { |
| 1805 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 2); |
| 1806 | pCoexDm->psTdmaDuAdjType = 2; |
| 1807 | } |
| 1808 | else if(pCoexDm->curPsTdma == 2) |
| 1809 | { |
| 1810 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9); |
| 1811 | pCoexDm->psTdmaDuAdjType = 9; |
| 1812 | } |
| 1813 | else if(pCoexDm->curPsTdma == 9) |
| 1814 | { |
| 1815 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 11); |
| 1816 | pCoexDm->psTdmaDuAdjType = 11; |
| 1817 | } |
| 1818 | } |
| 1819 | else if(result == 1) |
| 1820 | { |
| 1821 | if( (BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(btInfoExt)) && |
| 1822 | ((pCoexDm->curPsTdma == 1) ||(pCoexDm->curPsTdma == 2)) ) |
| 1823 | { |
| 1824 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9); |
| 1825 | pCoexDm->psTdmaDuAdjType = 9; |
| 1826 | } |
| 1827 | else if(pCoexDm->curPsTdma == 11) |
| 1828 | { |
| 1829 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9); |
| 1830 | pCoexDm->psTdmaDuAdjType = 9; |
| 1831 | } |
| 1832 | else if(pCoexDm->curPsTdma == 9) |
| 1833 | { |
| 1834 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 2); |
| 1835 | pCoexDm->psTdmaDuAdjType = 2; |
| 1836 | } |
| 1837 | else if(pCoexDm->curPsTdma == 2) |
| 1838 | { |
| 1839 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 1); |
| 1840 | pCoexDm->psTdmaDuAdjType = 1; |
| 1841 | } |
| 1842 | } |
| 1843 | |
| 1844 | if( pCoexDm->curPsTdma != 1 && |
| 1845 | pCoexDm->curPsTdma != 2 && |
| 1846 | pCoexDm->curPsTdma != 9 && |
| 1847 | pCoexDm->curPsTdma != 11 ) |
| 1848 | { |
| 1849 | // recover to previous adjust type |
| 1850 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, pCoexDm->psTdmaDuAdjType); |
| 1851 | } |
| 1852 | } |
| 1853 | } |
| 1854 | |
| 1855 | u1Byte |
| 1856 | halbtc8192e1ant_PsTdmaTypeByWifiRssi( |
| 1857 | IN s4Byte wifiRssi, |
| 1858 | IN s4Byte preWifiRssi, |
| 1859 | IN u1Byte wifiRssiThresh |
| 1860 | ) |
| 1861 | { |
| 1862 | u1Byte psTdmaType=0; |
| 1863 | |
| 1864 | if(wifiRssi > preWifiRssi) |
| 1865 | { |
| 1866 | if(wifiRssi > (wifiRssiThresh+5)) |
| 1867 | { |
| 1868 | psTdmaType = 26; |
| 1869 | } |
| 1870 | else |
| 1871 | { |
| 1872 | psTdmaType = 25; |
| 1873 | } |
| 1874 | } |
| 1875 | else |
| 1876 | { |
| 1877 | if(wifiRssi > wifiRssiThresh) |
| 1878 | { |
| 1879 | psTdmaType = 26; |
| 1880 | } |
| 1881 | else |
| 1882 | { |
| 1883 | psTdmaType = 25; |
| 1884 | } |
| 1885 | } |
| 1886 | |
| 1887 | return psTdmaType; |
| 1888 | } |
| 1889 | |
| 1890 | VOID |
| 1891 | halbtc8192e1ant_PsTdmaCheckForPowerSaveState( |
| 1892 | IN PBTC_COEXIST pBtCoexist, |
| 1893 | IN BOOLEAN bNewPsState |
| 1894 | ) |
| 1895 | { |
| 1896 | u1Byte lpsMode=0x0; |
| 1897 | |
| 1898 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode); |
| 1899 | |
| 1900 | if(lpsMode) // already under LPS state |
| 1901 | { |
| 1902 | if(bNewPsState) |
| 1903 | { |
| 1904 | // keep state under LPS, do nothing. |
| 1905 | } |
| 1906 | else |
| 1907 | { |
| 1908 | // will leave LPS state, turn off psTdma first |
| 1909 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 1910 | } |
| 1911 | } |
| 1912 | else // NO PS state |
| 1913 | { |
| 1914 | if(bNewPsState) |
| 1915 | { |
| 1916 | // will enter LPS state, turn off psTdma first |
| 1917 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 1918 | } |
| 1919 | else |
| 1920 | { |
| 1921 | // keep state under NO PS state, do nothing. |
| 1922 | } |
| 1923 | } |
| 1924 | } |
| 1925 | |
| 1926 | VOID |
| 1927 | halbtc8192e1ant_PowerSaveState( |
| 1928 | IN PBTC_COEXIST pBtCoexist, |
| 1929 | IN u1Byte psType, |
| 1930 | IN u1Byte lpsVal, |
| 1931 | IN u1Byte rpwmVal |
| 1932 | ) |
| 1933 | { |
| 1934 | BOOLEAN bLowPwrDisable=FALSE; |
| 1935 | |
| 1936 | switch(psType) |
| 1937 | { |
| 1938 | case BTC_PS_WIFI_NATIVE: |
| 1939 | // recover to original 32k low power setting |
| 1940 | bLowPwrDisable = FALSE; |
| 1941 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); |
| 1942 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); |
| 1943 | break; |
| 1944 | case BTC_PS_LPS_ON: |
| 1945 | halbtc8192e1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, true); |
| 1946 | halbtc8192e1ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal); |
| 1947 | // when coex force to enter LPS, do not enter 32k low power. |
| 1948 | bLowPwrDisable = true; |
| 1949 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); |
| 1950 | // power save must executed before psTdma. |
| 1951 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); |
| 1952 | break; |
| 1953 | case BTC_PS_LPS_OFF: |
| 1954 | halbtc8192e1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); |
| 1955 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); |
| 1956 | break; |
| 1957 | default: |
| 1958 | break; |
| 1959 | } |
| 1960 | } |
| 1961 | |
| 1962 | |
| 1963 | VOID |
| 1964 | halbtc8192e1ant_ActionWifiOnly( |
| 1965 | IN PBTC_COEXIST pBtCoexist |
| 1966 | ) |
| 1967 | { |
| 1968 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 1969 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); |
| 1970 | } |
| 1971 | |
| 1972 | VOID |
| 1973 | halbtc8192e1ant_MonitorBtEnableDisable( |
| 1974 | IN PBTC_COEXIST pBtCoexist |
| 1975 | ) |
| 1976 | { |
| 1977 | static BOOLEAN bPreBtDisabled=FALSE; |
| 1978 | static u4Byte btDisableCnt=0; |
| 1979 | BOOLEAN bBtActive=true, bBtDisabled=FALSE; |
| 1980 | |
| 1981 | // This function check if bt is disabled |
| 1982 | |
| 1983 | if( pCoexSta->highPriorityTx == 0 && |
| 1984 | pCoexSta->highPriorityRx == 0 && |
| 1985 | pCoexSta->lowPriorityTx == 0 && |
| 1986 | pCoexSta->lowPriorityRx == 0) |
| 1987 | { |
| 1988 | bBtActive = FALSE; |
| 1989 | } |
| 1990 | if( pCoexSta->highPriorityTx == 0xffff && |
| 1991 | pCoexSta->highPriorityRx == 0xffff && |
| 1992 | pCoexSta->lowPriorityTx == 0xffff && |
| 1993 | pCoexSta->lowPriorityRx == 0xffff) |
| 1994 | { |
| 1995 | bBtActive = FALSE; |
| 1996 | } |
| 1997 | if(bBtActive) |
| 1998 | { |
| 1999 | btDisableCnt = 0; |
| 2000 | bBtDisabled = FALSE; |
| 2001 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); |
| 2002 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is enabled !!\n")); |
| 2003 | } |
| 2004 | else |
| 2005 | { |
| 2006 | btDisableCnt++; |
| 2007 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], bt all counters=0, %d times!!\n", |
| 2008 | btDisableCnt)); |
| 2009 | if(btDisableCnt >= 2) |
| 2010 | { |
| 2011 | bBtDisabled = true; |
| 2012 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); |
| 2013 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is disabled !!\n")); |
| 2014 | halbtc8192e1ant_ActionWifiOnly(pBtCoexist); |
| 2015 | } |
| 2016 | } |
| 2017 | if(bPreBtDisabled != bBtDisabled) |
| 2018 | { |
| 2019 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is from %s to %s!!\n", |
| 2020 | (bPreBtDisabled ? "disabled":"enabled"), |
| 2021 | (bBtDisabled ? "disabled":"enabled"))); |
| 2022 | bPreBtDisabled = bBtDisabled; |
| 2023 | if(!bBtDisabled) |
| 2024 | { |
| 2025 | } |
| 2026 | else |
| 2027 | { |
| 2028 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); |
| 2029 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); |
| 2030 | } |
| 2031 | } |
| 2032 | } |
| 2033 | |
| 2034 | //============================================= |
| 2035 | // |
| 2036 | // Software Coex Mechanism start |
| 2037 | // |
| 2038 | //============================================= |
| 2039 | |
| 2040 | // SCO only or SCO+PAN(HS) |
| 2041 | VOID |
| 2042 | halbtc8192e1ant_ActionSco( |
| 2043 | IN PBTC_COEXIST pBtCoexist |
| 2044 | ) |
| 2045 | { |
| 2046 | u1Byte wifiRssiState; |
| 2047 | u4Byte wifiBw; |
| 2048 | |
| 2049 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2050 | |
| 2051 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2052 | |
| 2053 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2054 | { |
| 2055 | // sw mechanism |
| 2056 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2057 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2058 | { |
| 2059 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2060 | } |
| 2061 | else |
| 2062 | { |
| 2063 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2064 | } |
| 2065 | } |
| 2066 | else |
| 2067 | { |
| 2068 | // sw mechanism |
| 2069 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2070 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2071 | { |
| 2072 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2073 | } |
| 2074 | else |
| 2075 | { |
| 2076 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2077 | } |
| 2078 | } |
| 2079 | } |
| 2080 | |
| 2081 | |
| 2082 | VOID |
| 2083 | halbtc8192e1ant_ActionHid( |
| 2084 | IN PBTC_COEXIST pBtCoexist |
| 2085 | ) |
| 2086 | { |
| 2087 | u1Byte wifiRssiState; |
| 2088 | u4Byte wifiBw; |
| 2089 | |
| 2090 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2091 | |
| 2092 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2093 | |
| 2094 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2095 | { |
| 2096 | // sw mechanism |
| 2097 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2098 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2099 | { |
| 2100 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,FALSE,FALSE,0x18); |
| 2101 | } |
| 2102 | else |
| 2103 | { |
| 2104 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2105 | } |
| 2106 | } |
| 2107 | else |
| 2108 | { |
| 2109 | // sw mechanism |
| 2110 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2111 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2112 | { |
| 2113 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2114 | } |
| 2115 | else |
| 2116 | { |
| 2117 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2118 | } |
| 2119 | } |
| 2120 | } |
| 2121 | |
| 2122 | //A2DP only / PAN(EDR) only/ A2DP+PAN(HS) |
| 2123 | VOID |
| 2124 | halbtc8192e1ant_ActionA2dp( |
| 2125 | IN PBTC_COEXIST pBtCoexist |
| 2126 | ) |
| 2127 | { |
| 2128 | u1Byte wifiRssiState; |
| 2129 | u4Byte wifiBw; |
| 2130 | |
| 2131 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2132 | |
| 2133 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2134 | |
| 2135 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2136 | { |
| 2137 | // sw mechanism |
| 2138 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2139 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2140 | { |
| 2141 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2142 | } |
| 2143 | else |
| 2144 | { |
| 2145 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2146 | } |
| 2147 | } |
| 2148 | else |
| 2149 | { |
| 2150 | // sw mechanism |
| 2151 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2152 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2153 | { |
| 2154 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2155 | } |
| 2156 | else |
| 2157 | { |
| 2158 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2159 | } |
| 2160 | } |
| 2161 | } |
| 2162 | |
| 2163 | VOID |
| 2164 | halbtc8192e1ant_ActionA2dpPanHs( |
| 2165 | IN PBTC_COEXIST pBtCoexist |
| 2166 | ) |
| 2167 | { |
| 2168 | u1Byte wifiRssiState, btInfoExt; |
| 2169 | u4Byte wifiBw; |
| 2170 | |
| 2171 | btInfoExt = pCoexSta->btInfoExt; |
| 2172 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2173 | |
| 2174 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2175 | |
| 2176 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2177 | { |
| 2178 | // sw mechanism |
| 2179 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2180 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2181 | { |
| 2182 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2183 | } |
| 2184 | else |
| 2185 | { |
| 2186 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2187 | } |
| 2188 | } |
| 2189 | else |
| 2190 | { |
| 2191 | // sw mechanism |
| 2192 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2193 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2194 | { |
| 2195 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2196 | } |
| 2197 | else |
| 2198 | { |
| 2199 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2200 | } |
| 2201 | } |
| 2202 | } |
| 2203 | |
| 2204 | VOID |
| 2205 | halbtc8192e1ant_ActionPanEdr( |
| 2206 | IN PBTC_COEXIST pBtCoexist |
| 2207 | ) |
| 2208 | { |
| 2209 | u1Byte wifiRssiState; |
| 2210 | u4Byte wifiBw; |
| 2211 | |
| 2212 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2213 | |
| 2214 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2215 | |
| 2216 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2217 | { |
| 2218 | // sw mechanism |
| 2219 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2220 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2221 | { |
| 2222 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2223 | } |
| 2224 | else |
| 2225 | { |
| 2226 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2227 | } |
| 2228 | } |
| 2229 | else |
| 2230 | { |
| 2231 | // sw mechanism |
| 2232 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2233 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2234 | { |
| 2235 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2236 | } |
| 2237 | else |
| 2238 | { |
| 2239 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2240 | } |
| 2241 | } |
| 2242 | } |
| 2243 | |
| 2244 | |
| 2245 | //PAN(HS) only |
| 2246 | VOID |
| 2247 | halbtc8192e1ant_ActionPanHs( |
| 2248 | IN PBTC_COEXIST pBtCoexist |
| 2249 | ) |
| 2250 | { |
| 2251 | u1Byte wifiRssiState; |
| 2252 | u4Byte wifiBw; |
| 2253 | |
| 2254 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2255 | |
| 2256 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2257 | |
| 2258 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2259 | { |
| 2260 | // sw mechanism |
| 2261 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2262 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2263 | { |
| 2264 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2265 | } |
| 2266 | else |
| 2267 | { |
| 2268 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2269 | } |
| 2270 | } |
| 2271 | else |
| 2272 | { |
| 2273 | // sw mechanism |
| 2274 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2275 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2276 | { |
| 2277 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2278 | } |
| 2279 | else |
| 2280 | { |
| 2281 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2282 | } |
| 2283 | } |
| 2284 | } |
| 2285 | |
| 2286 | //PAN(EDR)+A2DP |
| 2287 | VOID |
| 2288 | halbtc8192e1ant_ActionPanEdrA2dp( |
| 2289 | IN PBTC_COEXIST pBtCoexist |
| 2290 | ) |
| 2291 | { |
| 2292 | u1Byte wifiRssiState, btInfoExt; |
| 2293 | u4Byte wifiBw; |
| 2294 | |
| 2295 | btInfoExt = pCoexSta->btInfoExt; |
| 2296 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2297 | |
| 2298 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2299 | |
| 2300 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2301 | { |
| 2302 | // sw mechanism |
| 2303 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2304 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2305 | { |
| 2306 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2307 | } |
| 2308 | else |
| 2309 | { |
| 2310 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2311 | } |
| 2312 | } |
| 2313 | else |
| 2314 | { |
| 2315 | // sw mechanism |
| 2316 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2317 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2318 | { |
| 2319 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2320 | } |
| 2321 | else |
| 2322 | { |
| 2323 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2324 | } |
| 2325 | } |
| 2326 | } |
| 2327 | |
| 2328 | VOID |
| 2329 | halbtc8192e1ant_ActionPanEdrHid( |
| 2330 | IN PBTC_COEXIST pBtCoexist |
| 2331 | ) |
| 2332 | { |
| 2333 | u1Byte wifiRssiState; |
| 2334 | u4Byte wifiBw; |
| 2335 | |
| 2336 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2337 | |
| 2338 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2339 | |
| 2340 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2341 | { |
| 2342 | // sw mechanism |
| 2343 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2344 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2345 | { |
| 2346 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2347 | } |
| 2348 | else |
| 2349 | { |
| 2350 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2351 | } |
| 2352 | } |
| 2353 | else |
| 2354 | { |
| 2355 | // sw mechanism |
| 2356 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2357 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2358 | { |
| 2359 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2360 | } |
| 2361 | else |
| 2362 | { |
| 2363 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2364 | } |
| 2365 | } |
| 2366 | } |
| 2367 | |
| 2368 | // HID+A2DP+PAN(EDR) |
| 2369 | VOID |
| 2370 | halbtc8192e1ant_ActionHidA2dpPanEdr( |
| 2371 | IN PBTC_COEXIST pBtCoexist |
| 2372 | ) |
| 2373 | { |
| 2374 | u1Byte wifiRssiState, btInfoExt; |
| 2375 | u4Byte wifiBw; |
| 2376 | |
| 2377 | btInfoExt = pCoexSta->btInfoExt; |
| 2378 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2379 | |
| 2380 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2381 | |
| 2382 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2383 | { |
| 2384 | // sw mechanism |
| 2385 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2386 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2387 | { |
| 2388 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2389 | } |
| 2390 | else |
| 2391 | { |
| 2392 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2393 | } |
| 2394 | } |
| 2395 | else |
| 2396 | { |
| 2397 | // sw mechanism |
| 2398 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2399 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2400 | { |
| 2401 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2402 | } |
| 2403 | else |
| 2404 | { |
| 2405 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2406 | } |
| 2407 | } |
| 2408 | } |
| 2409 | |
| 2410 | VOID |
| 2411 | halbtc8192e1ant_ActionHidA2dp( |
| 2412 | IN PBTC_COEXIST pBtCoexist |
| 2413 | ) |
| 2414 | { |
| 2415 | u1Byte wifiRssiState, btInfoExt; |
| 2416 | u4Byte wifiBw; |
| 2417 | |
| 2418 | btInfoExt = pCoexSta->btInfoExt; |
| 2419 | wifiRssiState = halbtc8192e1ant_WifiRssiState(pBtCoexist, 0, 2, 25, 0); |
| 2420 | |
| 2421 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 2422 | |
| 2423 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 2424 | { |
| 2425 | // sw mechanism |
| 2426 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2427 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2428 | { |
| 2429 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2430 | } |
| 2431 | else |
| 2432 | { |
| 2433 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,true,FALSE,0x18); |
| 2434 | } |
| 2435 | } |
| 2436 | else |
| 2437 | { |
| 2438 | // sw mechanism |
| 2439 | if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || |
| 2440 | (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2441 | { |
| 2442 | halbtc8192e1ant_SwMechanism2(pBtCoexist,true,true,FALSE,0x18); |
| 2443 | } |
| 2444 | else |
| 2445 | { |
| 2446 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2447 | } |
| 2448 | } |
| 2449 | } |
| 2450 | |
| 2451 | //============================================= |
| 2452 | // |
| 2453 | // Non-Software Coex Mechanism start |
| 2454 | // |
| 2455 | //============================================= |
| 2456 | VOID |
| 2457 | halbtc8192e1ant_ActionBtInquiry( |
| 2458 | IN PBTC_COEXIST pBtCoexist |
| 2459 | ) |
| 2460 | { |
| 2461 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 2462 | BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; |
| 2463 | |
| 2464 | // Note: |
| 2465 | // Do not do DacSwing here, use original setting. |
| 2466 | |
| 2467 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 2468 | |
| 2469 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 2470 | if(bBtHsOn) |
| 2471 | return; |
| 2472 | |
| 2473 | if(!bWifiConnected) |
| 2474 | { |
| 2475 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2476 | |
| 2477 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2478 | |
| 2479 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2480 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2481 | } |
| 2482 | else if( (pBtLinkInfo->bScoExist) || |
| 2483 | (pBtLinkInfo->bHidOnly) ) |
| 2484 | { |
| 2485 | // SCO/HID-only busy |
| 2486 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2487 | |
| 2488 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2489 | |
| 2490 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 32); |
| 2491 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); |
| 2492 | } |
| 2493 | else |
| 2494 | { |
| 2495 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x0); |
| 2496 | |
| 2497 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2498 | |
| 2499 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 30); |
| 2500 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2501 | } |
| 2502 | } |
| 2503 | |
| 2504 | VOID |
| 2505 | halbtc8192e1ant_ActionBtScoHidOnlyBusy( |
| 2506 | IN PBTC_COEXIST pBtCoexist, |
| 2507 | IN u1Byte wifiStatus |
| 2508 | ) |
| 2509 | { |
| 2510 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 2511 | u1Byte btRssiState=BTC_RSSI_STATE_HIGH; |
| 2512 | |
| 2513 | if(BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) |
| 2514 | { |
| 2515 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2516 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2517 | |
| 2518 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2519 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2520 | } |
| 2521 | else |
| 2522 | { |
| 2523 | if(pBtLinkInfo->bHidOnly) |
| 2524 | { |
| 2525 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2526 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2527 | |
| 2528 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2529 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2530 | } |
| 2531 | else |
| 2532 | { |
| 2533 | // dec bt power for diff level |
| 2534 | btRssiState = halbtc8192e1ant_BtRssiState(3, 34, 42); |
| 2535 | if( (btRssiState == BTC_RSSI_STATE_LOW) || |
| 2536 | (btRssiState == BTC_RSSI_STATE_STAY_LOW) ) |
| 2537 | { |
| 2538 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2539 | } |
| 2540 | else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) || |
| 2541 | (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) ) |
| 2542 | { |
| 2543 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2); |
| 2544 | } |
| 2545 | else if( (btRssiState == BTC_RSSI_STATE_HIGH) || |
| 2546 | (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) |
| 2547 | { |
| 2548 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 6); |
| 2549 | } |
| 2550 | |
| 2551 | // sw dacSwing |
| 2552 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, true, 0xc); |
| 2553 | |
| 2554 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2555 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); |
| 2556 | } |
| 2557 | } |
| 2558 | } |
| 2559 | |
| 2560 | VOID |
| 2561 | halbtc8192e1ant_ActionHs( |
| 2562 | IN PBTC_COEXIST pBtCoexist |
| 2563 | ) |
| 2564 | { |
| 2565 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 2566 | |
| 2567 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action for HS!!!\n")); |
| 2568 | |
| 2569 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2570 | |
| 2571 | if(BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) |
| 2572 | { |
| 2573 | // error, should not be here |
| 2574 | pCoexDm->errorCondition = 1; |
| 2575 | } |
| 2576 | else if(BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) |
| 2577 | { |
| 2578 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2579 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, true, 6); |
| 2580 | |
| 2581 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 10); |
| 2582 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2583 | } |
| 2584 | else if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && |
| 2585 | !pBtCoexist->bt_link_info.bHidOnly) |
| 2586 | { |
| 2587 | if(pCoexDm->curSsType == 1) |
| 2588 | { |
| 2589 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2590 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, true, 6); |
| 2591 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 10); |
| 2592 | //halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 38); |
| 2593 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2594 | } |
| 2595 | } |
| 2596 | else |
| 2597 | { |
| 2598 | halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, |
| 2599 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); |
| 2600 | } |
| 2601 | } |
| 2602 | |
| 2603 | VOID |
| 2604 | halbtc8192e1ant_ActionWifiConnectedBtAclBusy( |
| 2605 | IN PBTC_COEXIST pBtCoexist, |
| 2606 | IN u1Byte wifiStatus |
| 2607 | ) |
| 2608 | { |
| 2609 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 2610 | |
| 2611 | if(pBtLinkInfo->bHidOnly) |
| 2612 | { |
| 2613 | halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); |
| 2614 | pCoexDm->bAutoTdmaAdjust = FALSE; |
| 2615 | return; |
| 2616 | } |
| 2617 | |
| 2618 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2619 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2620 | |
| 2621 | if( (pBtLinkInfo->bA2dpOnly) || |
| 2622 | (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) ) |
| 2623 | { |
| 2624 | halbtc8192e1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); |
| 2625 | } |
| 2626 | else if( (pBtLinkInfo->bPanOnly) || |
| 2627 | (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) |
| 2628 | { |
| 2629 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 3); |
| 2630 | pCoexDm->bAutoTdmaAdjust = FALSE; |
| 2631 | } |
| 2632 | else |
| 2633 | { |
| 2634 | if( (BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) || |
| 2635 | (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifiStatus) || |
| 2636 | (BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifiStatus) ) |
| 2637 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 9); |
| 2638 | else |
| 2639 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 11); |
| 2640 | pCoexDm->bAutoTdmaAdjust = FALSE; |
| 2641 | } |
| 2642 | |
| 2643 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); |
| 2644 | } |
| 2645 | |
| 2646 | |
| 2647 | VOID |
| 2648 | halbtc8192e1ant_ActionWifiNotConnected( |
| 2649 | IN PBTC_COEXIST pBtCoexist |
| 2650 | ) |
| 2651 | { |
| 2652 | // power save state |
| 2653 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2654 | |
| 2655 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2656 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2657 | |
| 2658 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2659 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2660 | } |
| 2661 | |
| 2662 | VOID |
| 2663 | halbtc8192e1ant_ActionWifiNotConnectedAssoAuthScan( |
| 2664 | IN PBTC_COEXIST pBtCoexist |
| 2665 | ) |
| 2666 | { |
| 2667 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2668 | |
| 2669 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2670 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2671 | |
| 2672 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2673 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); |
| 2674 | } |
| 2675 | |
| 2676 | VOID |
| 2677 | halbtc8192e1ant_ActionWifiConnectedScan( |
| 2678 | IN PBTC_COEXIST pBtCoexist |
| 2679 | ) |
| 2680 | { |
| 2681 | // power save state |
| 2682 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->bt_link_info.bHidOnly) |
| 2683 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x0); |
| 2684 | else |
| 2685 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2686 | |
| 2687 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) |
| 2688 | { |
| 2689 | halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, |
| 2690 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); |
| 2691 | } |
| 2692 | else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || |
| 2693 | (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) |
| 2694 | { |
| 2695 | halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, |
| 2696 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN); |
| 2697 | } |
| 2698 | else |
| 2699 | { |
| 2700 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2701 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2702 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2703 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2704 | } |
| 2705 | } |
| 2706 | |
| 2707 | |
| 2708 | VOID |
| 2709 | halbtc8192e1ant_ActionWifiConnectedSpecialPacket( |
| 2710 | IN PBTC_COEXIST pBtCoexist |
| 2711 | ) |
| 2712 | { |
| 2713 | // power save state |
| 2714 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->bt_link_info.bHidOnly) |
| 2715 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x0); |
| 2716 | else |
| 2717 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2718 | |
| 2719 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) |
| 2720 | { |
| 2721 | halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, |
| 2722 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT); |
| 2723 | } |
| 2724 | else |
| 2725 | { |
| 2726 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2727 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2728 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2729 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2730 | } |
| 2731 | } |
| 2732 | |
| 2733 | VOID |
| 2734 | halbtc8192e1ant_ActionWifiConnected( |
| 2735 | IN PBTC_COEXIST pBtCoexist |
| 2736 | ) |
| 2737 | { |
| 2738 | BOOLEAN bWifiConnected=FALSE, bWifiBusy=FALSE; |
| 2739 | BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; |
| 2740 | BOOLEAN bUnder4way=FALSE; |
| 2741 | u4Byte wifiBw; |
| 2742 | |
| 2743 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], CoexForWifiConnect()===>\n")); |
| 2744 | |
| 2745 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 2746 | if(!bWifiConnected) |
| 2747 | { |
| 2748 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], CoexForWifiConnect(), return for wifi not connected<===\n")); |
| 2749 | return; |
| 2750 | } |
| 2751 | |
| 2752 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way); |
| 2753 | if(bUnder4way) |
| 2754 | { |
| 2755 | halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); |
| 2756 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n")); |
| 2757 | return; |
| 2758 | } |
| 2759 | |
| 2760 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); |
| 2761 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); |
| 2762 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); |
| 2763 | if(bScan || bLink || bRoam) |
| 2764 | { |
| 2765 | halbtc8192e1ant_ActionWifiConnectedScan(pBtCoexist); |
| 2766 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); |
| 2767 | return; |
| 2768 | } |
| 2769 | |
| 2770 | // power save state |
| 2771 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->bt_link_info.bHidOnly) |
| 2772 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x0); |
| 2773 | else |
| 2774 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 2775 | |
| 2776 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); |
| 2777 | if(!bWifiBusy) |
| 2778 | { |
| 2779 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) |
| 2780 | { |
| 2781 | halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, |
| 2782 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); |
| 2783 | } |
| 2784 | else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || |
| 2785 | (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) |
| 2786 | { |
| 2787 | halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, |
| 2788 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE); |
| 2789 | } |
| 2790 | else |
| 2791 | { |
| 2792 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2793 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2794 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2795 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2796 | } |
| 2797 | } |
| 2798 | else |
| 2799 | { |
| 2800 | if(BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) |
| 2801 | { |
| 2802 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2803 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2804 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 5); |
| 2805 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2806 | } |
| 2807 | else if(BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) |
| 2808 | { |
| 2809 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2810 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2811 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, true, 5); |
| 2812 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2813 | } |
| 2814 | else if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) |
| 2815 | { |
| 2816 | halbtc8192e1ant_ActionWifiConnectedBtAclBusy(pBtCoexist, |
| 2817 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); |
| 2818 | } |
| 2819 | else if( (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || |
| 2820 | (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) |
| 2821 | { |
| 2822 | halbtc8192e1ant_ActionBtScoHidOnlyBusy(pBtCoexist, |
| 2823 | BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY); |
| 2824 | } |
| 2825 | else |
| 2826 | { |
| 2827 | halbtc8192e1ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0); |
| 2828 | halbtc8192e1ant_DacSwing(pBtCoexist, NORMAL_EXEC, FALSE, 0); |
| 2829 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); |
| 2830 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); |
| 2831 | } |
| 2832 | } |
| 2833 | } |
| 2834 | |
| 2835 | VOID |
| 2836 | halbtc8192e1ant_RunSwCoexistMechanism( |
| 2837 | IN PBTC_COEXIST pBtCoexist |
| 2838 | ) |
| 2839 | { |
| 2840 | BOOLEAN bWifiUnder5G=FALSE, bWifiBusy=FALSE, bWifiConnected=FALSE; |
| 2841 | u1Byte btInfoOriginal=0, btRetryCnt=0; |
| 2842 | u1Byte algorithm=0; |
| 2843 | |
| 2844 | return; |
| 2845 | |
| 2846 | algorithm = halbtc8192e1ant_ActionAlgorithm(pBtCoexist); |
| 2847 | pCoexDm->curAlgorithm = algorithm; |
| 2848 | |
| 2849 | if(halbtc8192e1ant_IsCommonAction(pBtCoexist)) |
| 2850 | { |
| 2851 | } |
| 2852 | else |
| 2853 | { |
| 2854 | switch(pCoexDm->curAlgorithm) |
| 2855 | { |
| 2856 | case BT_8192E_1ANT_COEX_ALGO_SCO: |
| 2857 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = SCO.\n")); |
| 2858 | halbtc8192e1ant_ActionSco(pBtCoexist); |
| 2859 | break; |
| 2860 | case BT_8192E_1ANT_COEX_ALGO_HID: |
| 2861 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HID.\n")); |
| 2862 | halbtc8192e1ant_ActionHid(pBtCoexist); |
| 2863 | break; |
| 2864 | case BT_8192E_1ANT_COEX_ALGO_A2DP: |
| 2865 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = A2DP.\n")); |
| 2866 | halbtc8192e1ant_ActionA2dp(pBtCoexist); |
| 2867 | break; |
| 2868 | case BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS: |
| 2869 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); |
| 2870 | halbtc8192e1ant_ActionA2dpPanHs(pBtCoexist); |
| 2871 | break; |
| 2872 | case BT_8192E_1ANT_COEX_ALGO_PANEDR: |
| 2873 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = PAN(EDR).\n")); |
| 2874 | halbtc8192e1ant_ActionPanEdr(pBtCoexist); |
| 2875 | break; |
| 2876 | case BT_8192E_1ANT_COEX_ALGO_PANHS: |
| 2877 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HS mode.\n")); |
| 2878 | halbtc8192e1ant_ActionPanHs(pBtCoexist); |
| 2879 | break; |
| 2880 | case BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP: |
| 2881 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); |
| 2882 | halbtc8192e1ant_ActionPanEdrA2dp(pBtCoexist); |
| 2883 | break; |
| 2884 | case BT_8192E_1ANT_COEX_ALGO_PANEDR_HID: |
| 2885 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); |
| 2886 | halbtc8192e1ant_ActionPanEdrHid(pBtCoexist); |
| 2887 | break; |
| 2888 | case BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR: |
| 2889 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); |
| 2890 | halbtc8192e1ant_ActionHidA2dpPanEdr(pBtCoexist); |
| 2891 | break; |
| 2892 | case BT_8192E_1ANT_COEX_ALGO_HID_A2DP: |
| 2893 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HID+A2DP.\n")); |
| 2894 | halbtc8192e1ant_ActionHidA2dp(pBtCoexist); |
| 2895 | break; |
| 2896 | default: |
| 2897 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = coexist All Off!!\n")); |
| 2898 | halbtc8192e1ant_CoexAllOff(pBtCoexist); |
| 2899 | break; |
| 2900 | } |
| 2901 | pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; |
| 2902 | } |
| 2903 | } |
| 2904 | |
| 2905 | VOID |
| 2906 | halbtc8192e1ant_RunCoexistMechanism( |
| 2907 | IN PBTC_COEXIST pBtCoexist |
| 2908 | ) |
| 2909 | { |
| 2910 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 2911 | BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; |
| 2912 | |
| 2913 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n")); |
| 2914 | |
| 2915 | if(pBtCoexist->manual_control) |
| 2916 | { |
| 2917 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n")); |
| 2918 | return; |
| 2919 | } |
| 2920 | |
| 2921 | if(pBtCoexist->bStopCoexDm) |
| 2922 | { |
| 2923 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n")); |
| 2924 | return; |
| 2925 | } |
| 2926 | |
| 2927 | if(pCoexSta->bUnderIps) |
| 2928 | { |
| 2929 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is under IPS !!!\n")); |
| 2930 | return; |
| 2931 | } |
| 2932 | |
| 2933 | halbtc8192e1ant_RunSwCoexistMechanism(pBtCoexist); |
| 2934 | |
| 2935 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 2936 | if(pCoexSta->bC2hBtInquiryPage) |
| 2937 | { |
| 2938 | halbtc8192e1ant_ActionBtInquiry(pBtCoexist); |
| 2939 | return; |
| 2940 | } |
| 2941 | |
| 2942 | // 1ss or 2ss |
| 2943 | if(pBtLinkInfo->bScoExist) |
| 2944 | { |
| 2945 | halbtc8192e1ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); |
| 2946 | } |
| 2947 | else if(bBtHsOn) |
| 2948 | { |
| 2949 | if(pBtLinkInfo->bHidOnly) |
| 2950 | halbtc8192e1ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); |
| 2951 | else |
| 2952 | halbtc8192e1ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1); |
| 2953 | } |
| 2954 | else |
| 2955 | halbtc8192e1ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2); |
| 2956 | |
| 2957 | if(bBtHsOn) |
| 2958 | { |
| 2959 | halbtc8192e1ant_ActionHs(pBtCoexist); |
| 2960 | return; |
| 2961 | } |
| 2962 | |
| 2963 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 2964 | if(!bWifiConnected) |
| 2965 | { |
| 2966 | BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; |
| 2967 | |
| 2968 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is non connected-idle !!!\n")); |
| 2969 | |
| 2970 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); |
| 2971 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); |
| 2972 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); |
| 2973 | |
| 2974 | if(bScan || bLink || bRoam) |
| 2975 | halbtc8192e1ant_ActionWifiNotConnectedAssoAuthScan(pBtCoexist); |
| 2976 | else |
| 2977 | halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); |
| 2978 | } |
| 2979 | else |
| 2980 | { |
| 2981 | halbtc8192e1ant_ActionWifiConnected(pBtCoexist); |
| 2982 | } |
| 2983 | } |
| 2984 | |
| 2985 | VOID |
| 2986 | halbtc8192e1ant_InitCoexDm( |
| 2987 | IN PBTC_COEXIST pBtCoexist |
| 2988 | ) |
| 2989 | { |
| 2990 | // force to reset coex mechanism |
| 2991 | halbtc8192e1ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); |
| 2992 | halbtc8192e1ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0); |
| 2993 | |
| 2994 | // sw all off |
| 2995 | halbtc8192e1ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); |
| 2996 | halbtc8192e1ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); |
| 2997 | |
| 2998 | halbtc8192e1ant_SwitchSsType(pBtCoexist, FORCE_EXEC, 2); |
| 2999 | |
| 3000 | halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); |
| 3001 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); |
| 3002 | } |
| 3003 | |
| 3004 | //============================================================ |
| 3005 | // work around function start with wa_halbtc8192e1ant_ |
| 3006 | //============================================================ |
| 3007 | //============================================================ |
| 3008 | // extern function start with EXhalbtc8192e1ant_ |
| 3009 | //============================================================ |
| 3010 | VOID |
| 3011 | EXhalbtc8192e1ant_InitHwConfig( |
| 3012 | IN PBTC_COEXIST pBtCoexist |
| 3013 | ) |
| 3014 | { |
| 3015 | u4Byte u4Tmp=0; |
| 3016 | u16 u2Tmp=0; |
| 3017 | u1Byte u1Tmp=0; |
| 3018 | |
| 3019 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 1Ant Init HW Config!!\n")); |
| 3020 | |
| 3021 | // backup rf 0x1e value |
| 3022 | pCoexDm->btRf0x1eBackup = |
| 3023 | pBtCoexist->btc_get_rf_reg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); |
| 3024 | |
| 3025 | // antenna sw ctrl to bt |
| 3026 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x4f, 0x6); |
| 3027 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x944, 0x24); |
| 3028 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x930, 0x700700); |
| 3029 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x92c, 0x20); |
| 3030 | if(pBtCoexist->chipInterface == BTC_INTF_USB) |
| 3031 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x64, 0x30430004); |
| 3032 | else |
| 3033 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x64, 0x30030004); |
| 3034 | |
| 3035 | halbtc8192e1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); |
| 3036 | |
| 3037 | // antenna switch control parameter |
| 3038 | pBtCoexist->btc_write_4byte(pBtCoexist, 0x858, 0x55555555); |
| 3039 | |
| 3040 | // coex parameters |
| 3041 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x778, 0x1); |
| 3042 | // 0x790[5:0]=0x5 |
| 3043 | u1Tmp = pBtCoexist->btc_read_1byte(pBtCoexist, 0x790); |
| 3044 | u1Tmp &= 0xc0; |
| 3045 | u1Tmp |= 0x5; |
| 3046 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x790, u1Tmp); |
| 3047 | |
| 3048 | // enable counter statistics |
| 3049 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x76e, 0x4); |
| 3050 | |
| 3051 | // enable PTA |
| 3052 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x40, 0x20); |
| 3053 | // enable mailbox interface |
| 3054 | u2Tmp = pBtCoexist->btc_read_2byte(pBtCoexist, 0x40); |
| 3055 | u2Tmp |= BIT9; |
| 3056 | pBtCoexist->btc_write_2byte(pBtCoexist, 0x40, u2Tmp); |
| 3057 | |
| 3058 | // enable PTA I2C mailbox |
| 3059 | u1Tmp = pBtCoexist->btc_read_1byte(pBtCoexist, 0x101); |
| 3060 | u1Tmp |= BIT4; |
| 3061 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x101, u1Tmp); |
| 3062 | |
| 3063 | // enable bt clock when wifi is disabled. |
| 3064 | u1Tmp = pBtCoexist->btc_read_1byte(pBtCoexist, 0x93); |
| 3065 | u1Tmp |= BIT0; |
| 3066 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x93, u1Tmp); |
| 3067 | // enable bt clock when suspend. |
| 3068 | u1Tmp = pBtCoexist->btc_read_1byte(pBtCoexist, 0x7); |
| 3069 | u1Tmp |= BIT0; |
| 3070 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x7, u1Tmp); |
| 3071 | } |
| 3072 | |
| 3073 | VOID |
| 3074 | EXhalbtc8192e1ant_InitCoexDm( |
| 3075 | IN PBTC_COEXIST pBtCoexist |
| 3076 | ) |
| 3077 | { |
| 3078 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n")); |
| 3079 | |
| 3080 | pBtCoexist->bStopCoexDm = FALSE; |
| 3081 | |
| 3082 | halbtc8192e1ant_InitCoexDm(pBtCoexist); |
| 3083 | } |
| 3084 | |
| 3085 | VOID |
| 3086 | EXhalbtc8192e1ant_DisplayCoexInfo( |
| 3087 | IN PBTC_COEXIST pBtCoexist |
| 3088 | ) |
| 3089 | { |
| 3090 | struct btc_board_info * pBoardInfo=&pBtCoexist->board_info; |
| 3091 | PBTC_STACK_INFO pStackInfo=&pBtCoexist->stack_info; |
| 3092 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 3093 | pu1Byte cliBuf=pBtCoexist->cli_buf; |
| 3094 | u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; |
| 3095 | u4Byte u4Tmp[4]; |
| 3096 | BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE; |
| 3097 | BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; |
| 3098 | s4Byte wifiRssi=0, btHsRssi=0; |
| 3099 | u4Byte wifiBw, wifiTrafficDir; |
| 3100 | u1Byte wifiDot11Chnl, wifiHsChnl; |
| 3101 | u4Byte fwVer=0, btPatchVer=0; |
| 3102 | |
| 3103 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); |
| 3104 | CL_PRINTF(cliBuf); |
| 3105 | |
| 3106 | if(pBtCoexist->manual_control) |
| 3107 | { |
| 3108 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============"); |
| 3109 | CL_PRINTF(cliBuf); |
| 3110 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); |
| 3111 | CL_PRINTF(cliBuf); |
| 3112 | } |
| 3113 | if(pBtCoexist->bStopCoexDm) |
| 3114 | { |
| 3115 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Coex is STOPPED]============"); |
| 3116 | CL_PRINTF(cliBuf); |
| 3117 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n =========================================="); |
| 3118 | CL_PRINTF(cliBuf); |
| 3119 | } |
| 3120 | |
| 3121 | if(!pBoardInfo->bt_exist) |
| 3122 | { |
| 3123 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); |
| 3124 | CL_PRINTF(cliBuf); |
| 3125 | return; |
| 3126 | } |
| 3127 | |
| 3128 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ |
| 3129 | pBoardInfo->pg_ant_num, pBoardInfo->btdm_ant_num); |
| 3130 | CL_PRINTF(cliBuf); |
| 3131 | |
| 3132 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ |
| 3133 | ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); |
| 3134 | CL_PRINTF(cliBuf); |
| 3135 | |
| 3136 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); |
| 3137 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); |
| 3138 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ |
| 3139 | GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer); |
| 3140 | CL_PRINTF(cliBuf); |
| 3141 | |
| 3142 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 3143 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl); |
| 3144 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl); |
| 3145 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \ |
| 3146 | wifiDot11Chnl, wifiHsChnl, bBtHsOn); |
| 3147 | CL_PRINTF(cliBuf); |
| 3148 | |
| 3149 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \ |
| 3150 | pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], |
| 3151 | pCoexDm->wifiChnlInfo[2]); |
| 3152 | CL_PRINTF(cliBuf); |
| 3153 | |
| 3154 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); |
| 3155 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi); |
| 3156 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \ |
| 3157 | wifiRssi, btHsRssi); |
| 3158 | CL_PRINTF(cliBuf); |
| 3159 | |
| 3160 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); |
| 3161 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); |
| 3162 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); |
| 3163 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \ |
| 3164 | bLink, bRoam, bScan); |
| 3165 | CL_PRINTF(cliBuf); |
| 3166 | |
| 3167 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); |
| 3168 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 3169 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); |
| 3170 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); |
| 3171 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \ |
| 3172 | (bWifiUnder5G? "5G":"2.4G"), |
| 3173 | ((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))), |
| 3174 | ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink"))); |
| 3175 | CL_PRINTF(cliBuf); |
| 3176 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ |
| 3177 | ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": |
| 3178 | ( (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), |
| 3179 | pCoexSta->btRssi, pCoexSta->btRetryCnt); |
| 3180 | CL_PRINTF(cliBuf); |
| 3181 | |
| 3182 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ |
| 3183 | pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); |
| 3184 | CL_PRINTF(cliBuf); |
| 3185 | pBtCoexist->btc_disp_dbg_msg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); |
| 3186 | |
| 3187 | btInfoExt = pCoexSta->btInfoExt; |
| 3188 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ |
| 3189 | (btInfoExt&BIT0)? "Basic rate":"EDR rate"); |
| 3190 | CL_PRINTF(cliBuf); |
| 3191 | |
| 3192 | for(i=0; i<BT_INFO_SRC_8192E_1ANT_MAX; i++) |
| 3193 | { |
| 3194 | if(pCoexSta->btInfoC2hCnt[i]) |
| 3195 | { |
| 3196 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8192e1Ant[i], \ |
| 3197 | pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], |
| 3198 | pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], |
| 3199 | pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], |
| 3200 | pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); |
| 3201 | CL_PRINTF(cliBuf); |
| 3202 | } |
| 3203 | } |
| 3204 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s, (0x%x/0x%x)", "PS state, IPS/LPS, (lps/rpwm)", \ |
| 3205 | ((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")), |
| 3206 | ((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")), |
| 3207 | pBtCoexist->btInfo.lps1Ant, |
| 3208 | pBtCoexist->btInfo.rpwm_1ant); |
| 3209 | CL_PRINTF(cliBuf); |
| 3210 | pBtCoexist->btc_disp_dbg_msg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD); |
| 3211 | |
| 3212 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", \ |
| 3213 | pCoexDm->curSsType); |
| 3214 | CL_PRINTF(cliBuf); |
| 3215 | |
| 3216 | if(!pBtCoexist->manual_control) |
| 3217 | { |
| 3218 | // Sw mechanism |
| 3219 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); |
| 3220 | CL_PRINTF(cliBuf); |
| 3221 | |
| 3222 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig/ btLna]", \ |
| 3223 | pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->limited_dig, pCoexDm->bCurBtLnaConstrain); |
| 3224 | CL_PRINTF(cliBuf); |
| 3225 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ |
| 3226 | pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); |
| 3227 | CL_PRINTF(cliBuf); |
| 3228 | |
| 3229 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \ |
| 3230 | (pBtCoexist->btInfo.reject_agg_pkt? "Yes":"No"), (pBtCoexist->btInfo.b_bt_ctrl_agg_buf_size? "Yes":"No"), |
| 3231 | pBtCoexist->btInfo.aggBufSize); |
| 3232 | CL_PRINTF(cliBuf); |
| 3233 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \ |
| 3234 | pBtCoexist->btInfo.ra_mask); |
| 3235 | CL_PRINTF(cliBuf); |
| 3236 | |
| 3237 | // Fw mechanism |
| 3238 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); |
| 3239 | CL_PRINTF(cliBuf); |
| 3240 | |
| 3241 | psTdmaCase = pCoexDm->curPsTdma; |
| 3242 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \ |
| 3243 | pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], |
| 3244 | pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], |
| 3245 | pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); |
| 3246 | CL_PRINTF(cliBuf); |
| 3247 | |
| 3248 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ |
| 3249 | pCoexDm->errorCondition); |
| 3250 | CL_PRINTF(cliBuf); |
| 3251 | |
| 3252 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwrLvl/ IgnWlanAct", \ |
| 3253 | pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct); |
| 3254 | CL_PRINTF(cliBuf); |
| 3255 | } |
| 3256 | |
| 3257 | // Hw setting |
| 3258 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); |
| 3259 | CL_PRINTF(cliBuf); |
| 3260 | |
| 3261 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ |
| 3262 | pCoexDm->btRf0x1eBackup); |
| 3263 | CL_PRINTF(cliBuf); |
| 3264 | |
| 3265 | u4Tmp[0] = pBtCoexist->btc_read_4byte(pBtCoexist, 0xc04); |
| 3266 | u4Tmp[1] = pBtCoexist->btc_read_4byte(pBtCoexist, 0xd04); |
| 3267 | u4Tmp[2] = pBtCoexist->btc_read_4byte(pBtCoexist, 0x90c); |
| 3268 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xc04/ 0xd04/ 0x90c", \ |
| 3269 | u4Tmp[0], u4Tmp[1], u4Tmp[2]); |
| 3270 | CL_PRINTF(cliBuf); |
| 3271 | |
| 3272 | u1Tmp[0] = pBtCoexist->btc_read_1byte(pBtCoexist, 0x778); |
| 3273 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \ |
| 3274 | u1Tmp[0]); |
| 3275 | CL_PRINTF(cliBuf); |
| 3276 | |
| 3277 | u1Tmp[0] = pBtCoexist->btc_read_1byte(pBtCoexist, 0x92c); |
| 3278 | u4Tmp[0] = pBtCoexist->btc_read_4byte(pBtCoexist, 0x930); |
| 3279 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x92c/ 0x930", \ |
| 3280 | (u1Tmp[0]), u4Tmp[0]); |
| 3281 | CL_PRINTF(cliBuf); |
| 3282 | |
| 3283 | u1Tmp[0] = pBtCoexist->btc_read_1byte(pBtCoexist, 0x40); |
| 3284 | u1Tmp[1] = pBtCoexist->btc_read_1byte(pBtCoexist, 0x4f); |
| 3285 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x40/ 0x4f", \ |
| 3286 | u1Tmp[0], u1Tmp[1]); |
| 3287 | CL_PRINTF(cliBuf); |
| 3288 | |
| 3289 | u4Tmp[0] = pBtCoexist->btc_read_4byte(pBtCoexist, 0x550); |
| 3290 | u1Tmp[0] = pBtCoexist->btc_read_1byte(pBtCoexist, 0x522); |
| 3291 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ |
| 3292 | u4Tmp[0], u1Tmp[0]); |
| 3293 | CL_PRINTF(cliBuf); |
| 3294 | |
| 3295 | u4Tmp[0] = pBtCoexist->btc_read_4byte(pBtCoexist, 0xc50); |
| 3296 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \ |
| 3297 | u4Tmp[0]); |
| 3298 | CL_PRINTF(cliBuf); |
| 3299 | |
| 3300 | u4Tmp[0] = pBtCoexist->btc_read_4byte(pBtCoexist, 0x6c0); |
| 3301 | u4Tmp[1] = pBtCoexist->btc_read_4byte(pBtCoexist, 0x6c4); |
| 3302 | u4Tmp[2] = pBtCoexist->btc_read_4byte(pBtCoexist, 0x6c8); |
| 3303 | u1Tmp[0] = pBtCoexist->btc_read_1byte(pBtCoexist, 0x6cc); |
| 3304 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ |
| 3305 | u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); |
| 3306 | CL_PRINTF(cliBuf); |
| 3307 | |
| 3308 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \ |
| 3309 | pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); |
| 3310 | CL_PRINTF(cliBuf); |
| 3311 | CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \ |
| 3312 | pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); |
| 3313 | CL_PRINTF(cliBuf); |
| 3314 | #if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 1) |
| 3315 | halbtc8192e1ant_MonitorBtCtr(pBtCoexist); |
| 3316 | #endif |
| 3317 | |
| 3318 | pBtCoexist->btc_disp_dbg_msg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); |
| 3319 | } |
| 3320 | |
| 3321 | |
| 3322 | VOID |
| 3323 | EXhalbtc8192e1ant_IpsNotify( |
| 3324 | IN PBTC_COEXIST pBtCoexist, |
| 3325 | IN u1Byte type |
| 3326 | ) |
| 3327 | { |
| 3328 | u4Byte u4Tmp=0; |
| 3329 | |
| 3330 | if(pBtCoexist->manual_control || pBtCoexist->bStopCoexDm) |
| 3331 | return; |
| 3332 | |
| 3333 | if(BTC_IPS_ENTER == type) |
| 3334 | { |
| 3335 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n")); |
| 3336 | pCoexSta->bUnderIps = true; |
| 3337 | halbtc8192e1ant_CoexAllOff(pBtCoexist); |
| 3338 | } |
| 3339 | else if(BTC_IPS_LEAVE == type) |
| 3340 | { |
| 3341 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n")); |
| 3342 | pCoexSta->bUnderIps = FALSE; |
| 3343 | } |
| 3344 | } |
| 3345 | |
| 3346 | VOID |
| 3347 | EXhalbtc8192e1ant_LpsNotify( |
| 3348 | IN PBTC_COEXIST pBtCoexist, |
| 3349 | IN u1Byte type |
| 3350 | ) |
| 3351 | { |
| 3352 | if(pBtCoexist->manual_control || pBtCoexist->bStopCoexDm) |
| 3353 | return; |
| 3354 | |
| 3355 | if(BTC_LPS_ENABLE == type) |
| 3356 | { |
| 3357 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n")); |
| 3358 | pCoexSta->bUnderLps = true; |
| 3359 | } |
| 3360 | else if(BTC_LPS_DISABLE == type) |
| 3361 | { |
| 3362 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n")); |
| 3363 | pCoexSta->bUnderLps = FALSE; |
| 3364 | } |
| 3365 | } |
| 3366 | |
| 3367 | VOID |
| 3368 | EXhalbtc8192e1ant_ScanNotify( |
| 3369 | IN PBTC_COEXIST pBtCoexist, |
| 3370 | IN u1Byte type |
| 3371 | ) |
| 3372 | { |
| 3373 | BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; |
| 3374 | |
| 3375 | if(pBtCoexist->manual_control || |
| 3376 | pBtCoexist->bStopCoexDm || |
| 3377 | pBtCoexist->btInfo.bBtDisabled ) |
| 3378 | return; |
| 3379 | |
| 3380 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 3381 | if(pCoexSta->bC2hBtInquiryPage) |
| 3382 | { |
| 3383 | halbtc8192e1ant_ActionBtInquiry(pBtCoexist); |
| 3384 | return; |
| 3385 | } |
| 3386 | else if(bBtHsOn) |
| 3387 | { |
| 3388 | halbtc8192e1ant_ActionHs(pBtCoexist); |
| 3389 | return; |
| 3390 | } |
| 3391 | |
| 3392 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 3393 | if(BTC_SCAN_START == type) |
| 3394 | { |
| 3395 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n")); |
| 3396 | if(!bWifiConnected) // non-connected scan |
| 3397 | { |
| 3398 | halbtc8192e1ant_ActionWifiNotConnectedAssoAuthScan(pBtCoexist); |
| 3399 | } |
| 3400 | else // wifi is connected |
| 3401 | { |
| 3402 | halbtc8192e1ant_ActionWifiConnectedScan(pBtCoexist); |
| 3403 | } |
| 3404 | } |
| 3405 | else if(BTC_SCAN_FINISH == type) |
| 3406 | { |
| 3407 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n")); |
| 3408 | if(!bWifiConnected) // non-connected scan |
| 3409 | { |
| 3410 | halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); |
| 3411 | } |
| 3412 | else |
| 3413 | { |
| 3414 | halbtc8192e1ant_ActionWifiConnected(pBtCoexist); |
| 3415 | } |
| 3416 | } |
| 3417 | } |
| 3418 | |
| 3419 | VOID |
| 3420 | EXhalbtc8192e1ant_ConnectNotify( |
| 3421 | IN PBTC_COEXIST pBtCoexist, |
| 3422 | IN u1Byte type |
| 3423 | ) |
| 3424 | { |
| 3425 | BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; |
| 3426 | |
| 3427 | if(pBtCoexist->manual_control || |
| 3428 | pBtCoexist->bStopCoexDm || |
| 3429 | pBtCoexist->btInfo.bBtDisabled ) |
| 3430 | return; |
| 3431 | |
| 3432 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 3433 | if(pCoexSta->bC2hBtInquiryPage) |
| 3434 | { |
| 3435 | halbtc8192e1ant_ActionBtInquiry(pBtCoexist); |
| 3436 | return; |
| 3437 | } |
| 3438 | else if(bBtHsOn) |
| 3439 | { |
| 3440 | halbtc8192e1ant_ActionHs(pBtCoexist); |
| 3441 | return; |
| 3442 | } |
| 3443 | |
| 3444 | if(BTC_ASSOCIATE_START == type) |
| 3445 | { |
| 3446 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n")); |
| 3447 | halbtc8192e1ant_ActionWifiNotConnectedAssoAuthScan(pBtCoexist); |
| 3448 | } |
| 3449 | else if(BTC_ASSOCIATE_FINISH == type) |
| 3450 | { |
| 3451 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n")); |
| 3452 | |
| 3453 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 3454 | if(!bWifiConnected) // non-connected scan |
| 3455 | { |
| 3456 | halbtc8192e1ant_ActionWifiNotConnected(pBtCoexist); |
| 3457 | } |
| 3458 | else |
| 3459 | { |
| 3460 | halbtc8192e1ant_ActionWifiConnected(pBtCoexist); |
| 3461 | } |
| 3462 | } |
| 3463 | } |
| 3464 | |
| 3465 | VOID |
| 3466 | EXhalbtc8192e1ant_MediaStatusNotify( |
| 3467 | IN PBTC_COEXIST pBtCoexist, |
| 3468 | IN u1Byte type |
| 3469 | ) |
| 3470 | { |
| 3471 | u1Byte H2C_Parameter[3] ={0}; |
| 3472 | u4Byte wifiBw; |
| 3473 | u1Byte wifiCentralChnl; |
| 3474 | |
| 3475 | if(pBtCoexist->manual_control || |
| 3476 | pBtCoexist->bStopCoexDm || |
| 3477 | pBtCoexist->btInfo.bBtDisabled ) |
| 3478 | return; |
| 3479 | |
| 3480 | if(BTC_MEDIA_CONNECT == type) |
| 3481 | { |
| 3482 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n")); |
| 3483 | } |
| 3484 | else |
| 3485 | { |
| 3486 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n")); |
| 3487 | } |
| 3488 | |
| 3489 | // only 2.4G we need to inform bt the chnl mask |
| 3490 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); |
| 3491 | if( (BTC_MEDIA_CONNECT == type) && |
| 3492 | (wifiCentralChnl <= 14) ) |
| 3493 | { |
| 3494 | H2C_Parameter[0] = 0x1; |
| 3495 | H2C_Parameter[1] = wifiCentralChnl; |
| 3496 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); |
| 3497 | if(BTC_WIFI_BW_HT40 == wifiBw) |
| 3498 | H2C_Parameter[2] = 0x30; |
| 3499 | else |
| 3500 | H2C_Parameter[2] = 0x20; |
| 3501 | } |
| 3502 | |
| 3503 | pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; |
| 3504 | pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; |
| 3505 | pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; |
| 3506 | |
| 3507 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x66=0x%x\n", |
| 3508 | H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); |
| 3509 | |
| 3510 | pBtCoexist->btc_fill_h2c(pBtCoexist, 0x66, 3, H2C_Parameter); |
| 3511 | } |
| 3512 | |
| 3513 | VOID |
| 3514 | EXhalbtc8192e1ant_SpecialPacketNotify( |
| 3515 | IN PBTC_COEXIST pBtCoexist, |
| 3516 | IN u1Byte type |
| 3517 | ) |
| 3518 | { |
| 3519 | BOOLEAN bBtHsOn=FALSE; |
| 3520 | |
| 3521 | if(pBtCoexist->manual_control || |
| 3522 | pBtCoexist->bStopCoexDm || |
| 3523 | pBtCoexist->btInfo.bBtDisabled ) |
| 3524 | return; |
| 3525 | |
| 3526 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); |
| 3527 | if(pCoexSta->bC2hBtInquiryPage) |
| 3528 | { |
| 3529 | halbtc8192e1ant_ActionBtInquiry(pBtCoexist); |
| 3530 | return; |
| 3531 | } |
| 3532 | else if(bBtHsOn) |
| 3533 | { |
| 3534 | halbtc8192e1ant_ActionHs(pBtCoexist); |
| 3535 | return; |
| 3536 | } |
| 3537 | |
| 3538 | if( BTC_PACKET_DHCP == type || |
| 3539 | BTC_PACKET_EAPOL == type ) |
| 3540 | { |
| 3541 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet(%d) notify\n", type)); |
| 3542 | halbtc8192e1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); |
| 3543 | } |
| 3544 | } |
| 3545 | |
| 3546 | VOID |
| 3547 | EXhalbtc8192e1ant_BtInfoNotify( |
| 3548 | IN PBTC_COEXIST pBtCoexist, |
| 3549 | IN pu1Byte tmpBuf, |
| 3550 | IN u1Byte length |
| 3551 | ) |
| 3552 | { |
| 3553 | PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->bt_link_info; |
| 3554 | u1Byte btInfo=0; |
| 3555 | u1Byte i, rspSource=0; |
| 3556 | static u4Byte setBtPsdMode=0; |
| 3557 | BOOLEAN bBtBusy=FALSE, limited_dig=FALSE; |
| 3558 | BOOLEAN bWifiConnected=FALSE; |
| 3559 | BOOLEAN b_bt_ctrl_agg_buf_size=FALSE; |
| 3560 | |
| 3561 | pCoexSta->bC2hBtInfoReqSent = FALSE; |
| 3562 | |
| 3563 | rspSource = tmpBuf[0]&0xf; |
| 3564 | if(rspSource >= BT_INFO_SRC_8192E_1ANT_MAX) |
| 3565 | rspSource = BT_INFO_SRC_8192E_1ANT_WIFI_FW; |
| 3566 | pCoexSta->btInfoC2hCnt[rspSource]++; |
| 3567 | |
| 3568 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); |
| 3569 | for(i=0; i<length; i++) |
| 3570 | { |
| 3571 | pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i]; |
| 3572 | if(i == 1) |
| 3573 | btInfo = tmpBuf[i]; |
| 3574 | if(i == length-1) |
| 3575 | { |
| 3576 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i])); |
| 3577 | } |
| 3578 | else |
| 3579 | { |
| 3580 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i])); |
| 3581 | } |
| 3582 | } |
| 3583 | |
| 3584 | if(pBtCoexist->btInfo.bBtDisabled) |
| 3585 | { |
| 3586 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), return for BT is disabled <===\n")); |
| 3587 | return; |
| 3588 | } |
| 3589 | |
| 3590 | if(pBtCoexist->manual_control) |
| 3591 | { |
| 3592 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n")); |
| 3593 | return; |
| 3594 | } |
| 3595 | if(pBtCoexist->bStopCoexDm) |
| 3596 | { |
| 3597 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), return for Coex STOPPED!!<===\n")); |
| 3598 | return; |
| 3599 | } |
| 3600 | |
| 3601 | if(BT_INFO_SRC_8192E_1ANT_WIFI_FW != rspSource) |
| 3602 | { |
| 3603 | pCoexSta->btRetryCnt = // [3:0] |
| 3604 | pCoexSta->btInfoC2h[rspSource][2]&0xf; |
| 3605 | |
| 3606 | pCoexSta->btRssi = |
| 3607 | pCoexSta->btInfoC2h[rspSource][3]*2+10; |
| 3608 | |
| 3609 | pCoexSta->btInfoExt = |
| 3610 | pCoexSta->btInfoC2h[rspSource][4]; |
| 3611 | |
| 3612 | // Here we need to resend some wifi info to BT |
| 3613 | // because bt is reset and loss of the info. |
| 3614 | if( (pCoexSta->btInfoExt & BIT1) ) |
| 3615 | { |
| 3616 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n")); |
| 3617 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); |
| 3618 | if(bWifiConnected) |
| 3619 | { |
| 3620 | EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); |
| 3621 | } |
| 3622 | else |
| 3623 | { |
| 3624 | EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); |
| 3625 | } |
| 3626 | |
| 3627 | setBtPsdMode = 0; |
| 3628 | } |
| 3629 | |
| 3630 | // test-chip bt patch only rsp the status for BT_RSP, |
| 3631 | // so temporary we consider the following only under BT_RSP |
| 3632 | if(BT_INFO_SRC_8192E_1ANT_BT_RSP == rspSource) |
| 3633 | { |
| 3634 | if( (pCoexSta->btInfoExt & BIT3) ) |
| 3635 | { |
| 3636 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); |
| 3637 | halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); |
| 3638 | } |
| 3639 | else |
| 3640 | { |
| 3641 | // BT already NOT ignore Wlan active, do nothing here. |
| 3642 | } |
| 3643 | #if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) |
| 3644 | if( (pCoexSta->btInfoExt & BIT4) ) |
| 3645 | { |
| 3646 | // BT auto report already enabled, do nothing |
| 3647 | } |
| 3648 | else |
| 3649 | { |
| 3650 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit4 check, set BT to enable Auto Report!!\n")); |
| 3651 | halbtc8192e1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, true); |
| 3652 | } |
| 3653 | #endif |
| 3654 | } |
| 3655 | } |
| 3656 | |
| 3657 | // check BIT2 first ==> check if bt is under inquiry or page scan |
| 3658 | if(btInfo & BT_INFO_8192E_1ANT_B_INQ_PAGE) |
| 3659 | pCoexSta->bC2hBtInquiryPage = true; |
| 3660 | else |
| 3661 | pCoexSta->bC2hBtInquiryPage = FALSE; |
| 3662 | |
| 3663 | // set link exist status |
| 3664 | if(!(btInfo&BT_INFO_8192E_1ANT_B_CONNECTION)) |
| 3665 | { |
| 3666 | pCoexSta->bBtLinkExist = FALSE; |
| 3667 | pCoexSta->bPanExist = FALSE; |
| 3668 | pCoexSta->bA2dpExist = FALSE; |
| 3669 | pCoexSta->bHidExist = FALSE; |
| 3670 | pCoexSta->bScoExist = FALSE; |
| 3671 | } |
| 3672 | else // connection exists |
| 3673 | { |
| 3674 | pCoexSta->bBtLinkExist = true; |
| 3675 | if(btInfo & BT_INFO_8192E_1ANT_B_FTP) |
| 3676 | pCoexSta->bPanExist = true; |
| 3677 | else |
| 3678 | pCoexSta->bPanExist = FALSE; |
| 3679 | if(btInfo & BT_INFO_8192E_1ANT_B_A2DP) |
| 3680 | pCoexSta->bA2dpExist = true; |
| 3681 | else |
| 3682 | pCoexSta->bA2dpExist = FALSE; |
| 3683 | if(btInfo & BT_INFO_8192E_1ANT_B_HID) |
| 3684 | pCoexSta->bHidExist = true; |
| 3685 | else |
| 3686 | pCoexSta->bHidExist = FALSE; |
| 3687 | if(btInfo & BT_INFO_8192E_1ANT_B_SCO_ESCO) |
| 3688 | pCoexSta->bScoExist = true; |
| 3689 | else |
| 3690 | pCoexSta->bScoExist = FALSE; |
| 3691 | } |
| 3692 | |
| 3693 | halbtc8192e1ant_UpdateBtLinkInfo(pBtCoexist); |
| 3694 | |
| 3695 | if(!(btInfo&BT_INFO_8192E_1ANT_B_CONNECTION)) |
| 3696 | { |
| 3697 | pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE; |
| 3698 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), bt non-connected idle!!!\n")); |
| 3699 | } |
| 3700 | else if(btInfo == BT_INFO_8192E_1ANT_B_CONNECTION) // connection exists but no busy |
| 3701 | { |
| 3702 | pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE; |
| 3703 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), bt connected-idle!!!\n")); |
| 3704 | } |
| 3705 | else if((btInfo&BT_INFO_8192E_1ANT_B_SCO_ESCO) || |
| 3706 | (btInfo&BT_INFO_8192E_1ANT_B_SCO_BUSY)) |
| 3707 | { |
| 3708 | pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_SCO_BUSY; |
| 3709 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), bt sco busy!!!\n")); |
| 3710 | } |
| 3711 | else if( (btInfo&BT_INFO_8192E_1ANT_B_ACL_BUSY) || |
| 3712 | (btInfo&BT_INFO_8192E_1ANT_B_A2DP) || |
| 3713 | (btInfo&BT_INFO_8192E_1ANT_B_FTP) ) |
| 3714 | { |
| 3715 | if(BT_8192E_1ANT_BT_STATUS_ACL_BUSY != pCoexDm->btStatus) |
| 3716 | pCoexDm->bAutoTdmaAdjust = FALSE; |
| 3717 | pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_ACL_BUSY; |
| 3718 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), bt acl busy!!!\n")); |
| 3719 | } |
| 3720 | else |
| 3721 | { |
| 3722 | pCoexDm->btStatus = BT_8192E_1ANT_BT_STATUS_MAX; |
| 3723 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), bt non-defined state!!!\n")); |
| 3724 | } |
| 3725 | |
| 3726 | // ra mask check |
| 3727 | if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist) |
| 3728 | { |
| 3729 | halbtc8192e1ant_Updatera_mask(pBtCoexist, NORMAL_EXEC, BTC_RATE_DISABLE, 0x00000003); // disable tx cck 1M/2M |
| 3730 | } |
| 3731 | else |
| 3732 | { |
| 3733 | halbtc8192e1ant_Updatera_mask(pBtCoexist, NORMAL_EXEC, BTC_RATE_ENABLE, 0x00000003); // enable tx cck 1M/2M |
| 3734 | } |
| 3735 | |
| 3736 | if( (BT_8192E_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) || |
| 3737 | (BT_8192E_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || |
| 3738 | (BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) |
| 3739 | { |
| 3740 | bBtBusy = true; |
| 3741 | limited_dig = true; |
| 3742 | if(pBtLinkInfo->bHidExist) |
| 3743 | b_bt_ctrl_agg_buf_size = true; |
| 3744 | } |
| 3745 | else |
| 3746 | { |
| 3747 | bBtBusy = FALSE; |
| 3748 | limited_dig = FALSE; |
| 3749 | } |
| 3750 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); |
| 3751 | |
| 3752 | //============================================ |
| 3753 | // Aggregation related setting |
| 3754 | //============================================ |
| 3755 | // if sco, reject AddBA |
| 3756 | //pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejApAggPkt); |
| 3757 | |
| 3758 | // decide BT control aggregation buf size or not |
| 3759 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &b_bt_ctrl_agg_buf_size); |
| 3760 | // real update aggregation setting |
| 3761 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); |
| 3762 | //============================================ |
| 3763 | |
| 3764 | pCoexDm->limited_dig = limited_dig; |
| 3765 | pBtCoexist->btc_set(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig); |
| 3766 | |
| 3767 | halbtc8192e1ant_RunCoexistMechanism(pBtCoexist); |
| 3768 | } |
| 3769 | |
| 3770 | VOID |
| 3771 | EXhalbtc8192e1ant_StackOperationNotify( |
| 3772 | IN PBTC_COEXIST pBtCoexist, |
| 3773 | IN u1Byte type |
| 3774 | ) |
| 3775 | { |
| 3776 | if(BTC_STACK_OP_INQ_PAGE_PAIR_START == type) |
| 3777 | { |
| 3778 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], StackOP Inquiry/page/pair start notify\n")); |
| 3779 | } |
| 3780 | else if(BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type) |
| 3781 | { |
| 3782 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], StackOP Inquiry/page/pair finish notify\n")); |
| 3783 | } |
| 3784 | } |
| 3785 | |
| 3786 | VOID |
| 3787 | EXhalbtc8192e1ant_HaltNotify( |
| 3788 | IN PBTC_COEXIST pBtCoexist |
| 3789 | ) |
| 3790 | { |
| 3791 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n")); |
| 3792 | |
| 3793 | pBtCoexist->bStopCoexDm = true; |
| 3794 | halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true); |
| 3795 | |
| 3796 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 3797 | |
| 3798 | halbtc8192e1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); |
| 3799 | pBtCoexist->btc_write_1byte(pBtCoexist, 0x4f, 0xf); |
| 3800 | |
| 3801 | EXhalbtc8192e1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); |
| 3802 | } |
| 3803 | |
| 3804 | VOID |
| 3805 | EXhalbtc8192e1ant_PnpNotify( |
| 3806 | IN PBTC_COEXIST pBtCoexist, |
| 3807 | IN u1Byte pnpState |
| 3808 | ) |
| 3809 | { |
| 3810 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify\n")); |
| 3811 | |
| 3812 | if(BTC_WIFI_PNP_SLEEP == pnpState) |
| 3813 | { |
| 3814 | pBtCoexist->bStopCoexDm = true; |
| 3815 | halbtc8192e1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, true); |
| 3816 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 3817 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); |
| 3818 | } |
| 3819 | else if(BTC_WIFI_PNP_WAKE_UP == pnpState) |
| 3820 | { |
| 3821 | |
| 3822 | } |
| 3823 | } |
| 3824 | |
| 3825 | VOID |
| 3826 | EXhalbtc8192e1ant_Periodical( |
| 3827 | IN PBTC_COEXIST pBtCoexist |
| 3828 | ) |
| 3829 | { |
| 3830 | static u1Byte disVerInfoCnt=0; |
| 3831 | u4Byte fwVer=0, btPatchVer=0; |
| 3832 | struct btc_board_info * pBoardInfo=&pBtCoexist->board_info; |
| 3833 | PBTC_STACK_INFO pStackInfo=&pBtCoexist->stack_info; |
| 3834 | |
| 3835 | BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ==========================Periodical===========================\n")); |
| 3836 | |
| 3837 | if(disVerInfoCnt <= 5) |
| 3838 | { |
| 3839 | disVerInfoCnt += 1; |
| 3840 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n")); |
| 3841 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", \ |
| 3842 | pBoardInfo->pg_ant_num, pBoardInfo->btdm_ant_num, pBoardInfo->btdm_ant_pos)); |
| 3843 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", \ |
| 3844 | ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); |
| 3845 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); |
| 3846 | pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); |
| 3847 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", \ |
| 3848 | GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer)); |
| 3849 | BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n")); |
| 3850 | } |
| 3851 | #if(BT_AUTO_REPORT_ONLY_8192E_1ANT == 0) |
| 3852 | halbtc8192e1ant_QueryBtInfo(pBtCoexist); |
| 3853 | halbtc8192e1ant_MonitorBtCtr(pBtCoexist); |
| 3854 | halbtc8192e1ant_MonitorBtEnableDisable(pBtCoexist); |
| 3855 | #else |
| 3856 | if( halbtc8192e1ant_IsWifiStatusChanged(pBtCoexist) || |
| 3857 | pCoexDm->bAutoTdmaAdjust) |
| 3858 | { |
| 3859 | halbtc8192e1ant_RunCoexistMechanism(pBtCoexist); |
| 3860 | } |
| 3861 | #endif |
| 3862 | } |
| 3863 | |
| 3864 | VOID |
| 3865 | EXhalbtc8192e1ant_DbgControl( |
| 3866 | IN PBTC_COEXIST pBtCoexist, |
| 3867 | IN u1Byte opCode, |
| 3868 | IN u1Byte opLen, |
| 3869 | IN pu1Byte pData |
| 3870 | ) |
| 3871 | { |
| 3872 | switch(opCode) |
| 3873 | { |
| 3874 | case BTC_DBG_SET_COEX_NORMAL: |
| 3875 | pBtCoexist->manual_control = FALSE; |
| 3876 | halbtc8192e1ant_InitCoexDm(pBtCoexist); |
| 3877 | break; |
| 3878 | case BTC_DBG_SET_COEX_WIFI_ONLY: |
| 3879 | pBtCoexist->manual_control = true; |
| 3880 | halbtc8192e1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); |
| 3881 | halbtc8192e1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); |
| 3882 | break; |
| 3883 | case BTC_DBG_SET_COEX_BT_ONLY: |
| 3884 | // todo |
| 3885 | break; |
| 3886 | default: |
| 3887 | break; |
| 3888 | } |
| 3889 | } |
| 3890 | #endif |
| 3891 | |